From db82f6cda525c3e519cfac0b4aec714df7cc93df Mon Sep 17 00:00:00 2001 From: Richard Zhu Date: Fri, 24 Oct 2025 15:31:52 +0800 Subject: [PATCH] arm64: dts: imx95-19x19-evk: Add vpcie3v3aux regulator for PCIe[0,1] MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Refer to PCI Express M.2 Specification r5.1 sec3.1.1 Power Sources and Grounds. PCI Express M.2 Socket 1 utilizes a 3.3 V power source. The voltage source, 3.3 V, is expected to be available during the system’s stand-by/suspend state to support wake event processing on the communications card. Add vpcie3v3aux regulator to let this 3.3 V power source always on for PCIe M.2 Key E connector(PCIe0) on i.MX95 19x19 EVK board. PCIe1 uses one standard PCIe slot connector, but combines the +3.3v and +3.3Vaux into a same 3.3v power source, and intends to let it always on. Add vpcie3v3aux regulator to let this 3.3 V power source always on for PCIe1 on i.MX95 19x19 EVK board too. Signed-off-by: Richard Zhu Reviewed-by: Frank Li Signed-off-by: Shawn Guo --- arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts index 0f470d3eb9af4..aaa0da55a22bc 100644 --- a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts @@ -542,6 +542,7 @@ pinctrl-names = "default"; reset-gpio = <&i2c7_pcal6524 5 GPIO_ACTIVE_LOW>; vpcie-supply = <®_pcie0>; + vpcie3v3aux-supply = <®_pcie0>; supports-clkreq; status = "okay"; }; @@ -558,6 +559,7 @@ pinctrl-names = "default"; reset-gpio = <&i2c7_pcal6524 16 GPIO_ACTIVE_LOW>; vpcie-supply = <®_slot_pwr>; + vpcie3v3aux-supply = <®_slot_pwr>; status = "okay"; }; -- 2.47.3