From dbef257ab7fabc845fe359cbe74b08d3b590550e Mon Sep 17 00:00:00 2001 From: Thorsten Blum Date: Wed, 19 Feb 2025 12:48:00 +0100 Subject: [PATCH] xtensa: ptrace: Remove zero-length alignment array Use a compiler attribute to align the areg field to 16 bytes instead of using a zero-length alignment array. Signed-off-by: Thorsten Blum Message-Id: <20250219114759.20110-2-thorsten.blum@linux.dev> Signed-off-by: Max Filippov --- arch/xtensa/include/asm/ptrace.h | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/arch/xtensa/include/asm/ptrace.h b/arch/xtensa/include/asm/ptrace.h index 86c70117371bb..4871e5a4d6fbe 100644 --- a/arch/xtensa/include/asm/ptrace.h +++ b/arch/xtensa/include/asm/ptrace.h @@ -72,13 +72,10 @@ struct pt_regs { /* Additional configurable registers that are used by the compiler. */ xtregs_opt_t xtregs_opt; - /* Make sure the areg field is 16 bytes aligned. */ - int align[0] __attribute__ ((aligned(16))); - /* current register frame. * Note: The ESF for kernel exceptions ends after 16 registers! */ - unsigned long areg[XCHAL_NUM_AREGS]; + unsigned long areg[XCHAL_NUM_AREGS] __aligned(16); }; # define arch_has_single_step() (1) -- 2.47.2