From dc220915ddb2d1c646a7d0816b398e73ed5a5d50 Mon Sep 17 00:00:00 2001 From: Rob Clark Date: Fri, 9 Jan 2026 07:37:29 -0800 Subject: [PATCH] drm/msm: Fix GMEM_BASE for gen8 This should also be zero for gen8. This does change a7xx-gen1 to zero. It was almost certainly incorrect before, but we have no such devices in CI currently. Fixes: 288a93200892 ("drm/msm/adreno: Introduce A8x GPU Support") Signed-off-by: Rob Clark Patchwork: https://patchwork.freedesktop.org/patch/697779/ Message-ID: <20260109153730.130462-3-robin.clark@oss.qualcomm.com> --- drivers/gpu/drm/msm/adreno/adreno_gpu.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c index 1c80909e63cab..d5fe6f6f0decc 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c @@ -376,8 +376,7 @@ int adreno_get_param(struct msm_gpu *gpu, struct msm_context *ctx, *value = adreno_gpu->info->gmem; return 0; case MSM_PARAM_GMEM_BASE: - if (adreno_is_a650_family(adreno_gpu) || - adreno_is_a740_family(adreno_gpu)) + if (adreno_gpu->info->family >= ADRENO_6XX_GEN4) *value = 0; else *value = 0x100000; -- 2.47.3