From dc496829020195bbf9db5bc52c8f14f5aa84bb9e Mon Sep 17 00:00:00 2001 From: Ioana Ciornei Date: Tue, 14 Oct 2025 18:53:56 +0300 Subject: [PATCH] arm64: dts: ls1046a-qds: describe the FPGA based GPIO controller The QIXIS FPGA node is extended so that it describes the GPIO controller responsible for all the status presence lines on both SFP+ cages as well as the IO SLOTs present on the board. Signed-off-by: Ioana Ciornei Reviewed-by: Frank Li Signed-off-by: Shawn Guo --- arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts index 736722b58e77f..812cf1c5d7f4e 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts @@ -166,8 +166,20 @@ fpga: board-control@2,0 { compatible = "fsl,ls1046aqds-fpga", "fsl,fpga-qixis", "simple-mfd"; + #address-cells = <1>; + #size-cells = <1>; reg = <0x2 0x0 0x0000100>; ranges = <0 2 0 0x100>; + + stat_pres2: gpio@c { + compatible = "fsl,ls1046aqds-fpga-gpio-stat-pres2"; + reg = <0xc 1>; + gpio-controller; + #gpio-cells = <2>; + gpio-line-names = + "SLOT1", "SLOT2", "SLOT3", "SLOT4", "SLOT5", "SLOT6", + "SFP1_MOD_DEF", "SFP2_MOD_DEF"; + }; }; }; -- 2.47.3