From df177510665c4e1045bdaadf10d837f1bdc4ea06 Mon Sep 17 00:00:00 2001 From: Edwin Lu Date: Fri, 25 Aug 2023 16:35:43 -0700 Subject: [PATCH] RISC-V: Add Types to Un-Typed Sync Instructions: Updates the sync instructions to ensure that no insn is left without a type attribute. Updates a total of 9 insns to have type "atomic" or type "multi" based on number of assembly instructions generated Tested for regressions using rv32/64 multilib with newlib/linux. gcc/Changelog: * config/riscv/sync-rvwmo.md: updated types to "multi" or "atomic" based on number of assembly lines generated * config/riscv/sync-ztso.md: likewise * config/riscv/sync.md: likewise Reviewed-by: Jeff Law Signed-off-by: Edwin Lu --- gcc/config/riscv/sync-rvwmo.md | 7 ++++--- gcc/config/riscv/sync-ztso.md | 7 ++++--- gcc/config/riscv/sync.md | 14 +++++++++----- 3 files changed, 17 insertions(+), 11 deletions(-) diff --git a/gcc/config/riscv/sync-rvwmo.md b/gcc/config/riscv/sync-rvwmo.md index 1fc7cf16b5bf..cb641ea9ec33 100644 --- a/gcc/config/riscv/sync-rvwmo.md +++ b/gcc/config/riscv/sync-rvwmo.md @@ -41,7 +41,8 @@ else gcc_unreachable (); } - [(set (attr "length") (const_int 4))]) + [(set_attr "type" "atomic") + (set (attr "length") (const_int 4))]) ;; Atomic memory operations. @@ -66,7 +67,7 @@ else return "l\t%0,%1"; } - [(set_attr "type" "atomic") + [(set_attr "type" "multi") (set (attr "length") (const_int 12))]) ;; Implement atomic stores with conservative fences. @@ -92,5 +93,5 @@ else return "s\t%z1,%0"; } - [(set_attr "type" "atomic") + [(set_attr "type" "multi") (set (attr "length") (const_int 12))]) diff --git a/gcc/config/riscv/sync-ztso.md b/gcc/config/riscv/sync-ztso.md index ed94471b96be..7bb15b7ab8cd 100644 --- a/gcc/config/riscv/sync-ztso.md +++ b/gcc/config/riscv/sync-ztso.md @@ -35,7 +35,8 @@ else gcc_unreachable (); } - [(set (attr "length") (const_int 4))]) + [(set_attr "type" "atomic") + (set (attr "length") (const_int 4))]) ;; Atomic memory operations. @@ -56,7 +57,7 @@ else return "l\t%0,%1"; } - [(set_attr "type" "atomic") + [(set_attr "type" "multi") (set (attr "length") (const_int 12))]) (define_insn "atomic_store_ztso" @@ -76,5 +77,5 @@ else return "s\t%z1,%0"; } - [(set_attr "type" "atomic") + [(set_attr "type" "multi") (set (attr "length") (const_int 8))]) diff --git a/gcc/config/riscv/sync.md b/gcc/config/riscv/sync.md index 2f85951508f8..6ff3493b5ced 100644 --- a/gcc/config/riscv/sync.md +++ b/gcc/config/riscv/sync.md @@ -136,7 +136,8 @@ "sc.w%J3\t%6, %7, %1\;" "bnez\t%6, 1b"; } - [(set (attr "length") (const_int 28))]) + [(set_attr "type" "multi") + (set (attr "length") (const_int 28))]) (define_expand "atomic_fetch_nand" [(match_operand:SHORT 0 "register_operand") ;; old value at mem @@ -203,7 +204,8 @@ "sc.w%J3\t%6, %7, %1\;" "bnez\t%6, 1b"; } - [(set (attr "length") (const_int 32))]) + [(set_attr "type" "multi") + (set (attr "length") (const_int 32))]) (define_expand "atomic_fetch_" [(match_operand:SHORT 0 "register_operand") ;; old value at mem @@ -310,7 +312,8 @@ "sc.w%J3\t%5, %5, %1\;" "bnez\t%5, 1b"; } - [(set (attr "length") (const_int 20))]) + [(set_attr "type" "multi") + (set (attr "length") (const_int 20))]) (define_insn "atomic_cas_value_strong" [(set (match_operand:GPR 0 "register_operand" "=&r") @@ -336,7 +339,7 @@ "bnez\t%6,1b\;" "1:"; } - [(set_attr "type" "atomic") + [(set_attr "type" "multi") (set (attr "length") (const_int 16))]) (define_expand "atomic_compare_and_swap" @@ -497,7 +500,8 @@ "bnez\t%7, 1b\;" "1:"; } - [(set (attr "length") (const_int 28))]) + [(set_attr "type" "multi") + (set (attr "length") (const_int 28))]) (define_expand "atomic_test_and_set" [(match_operand:QI 0 "register_operand" "") ;; bool output -- 2.47.2