From e0828a25f5a7f75a2766800a74ae4fc332f531c5 Mon Sep 17 00:00:00 2001 From: Jan Hubicka Date: Thu, 28 Feb 2002 15:49:36 +0000 Subject: [PATCH] i386.h (HARD_REGNO_RENAME_OK): Define. * i386.h (HARD_REGNO_RENAME_OK): Define. * i386.md (fop_?f_comm): Allow memory operand in both arms before reload. From-SVN: r50144 --- gcc/ChangeLog | 6 ++++++ gcc/config/i386/i386.h | 9 +++++++++ gcc/config/i386/i386.md | 10 ++++++---- 3 files changed, 21 insertions(+), 4 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index f922d01756a9..99924569a42e 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +Don Feb 28 16:46:03 CET 2002 Jan Hubicka + + * i386.h (HARD_REGNO_RENAME_OK): Define. + * i386.md (fop_?f_comm): Allow memory operand in both arms + before reload. + 2002-02-23 Zack Weinberg * cppinit.c (merge_include_chains): Check for brack being diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h index 7471560fd09b..64abce202f56 100644 --- a/gcc/config/i386/i386.h +++ b/gcc/config/i386/i386.h @@ -2939,6 +2939,15 @@ extern enum reg_class const regclass_map[]; /* smalled class containing REGNO */ extern struct rtx_def *ix86_compare_op0; /* operand 0 for comparisons */ extern struct rtx_def *ix86_compare_op1; /* operand 1 for comparisons */ +/* Avoid renaming of stack registers, as doing so in combination with + scheduling just increases amount of live registers at time and in + the turn amount of fxch instructions needed. + + ??? Maybe Pentium chips benefits from renaming, someone can try... */ + +#define HARD_REGNO_RENAME_OK(SRC, TARGET) \ + ((SRC) < FIRST_STACK_REG || (SRC) > LAST_STACK_REG) + /* Local variables: version-control: t diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 0816fa87c479..b84643b8d7ee 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -10095,9 +10095,10 @@ (define_insn "*fop_sf_comm" [(set (match_operand:SF 0 "register_operand" "=f") (match_operator:SF 3 "binary_fp_operator" - [(match_operand:SF 1 "register_operand" "%0") + [(match_operand:SF 1 "nonimmediate_operand" "%0") (match_operand:SF 2 "nonimmediate_operand" "fm")]))] - "TARGET_80387 && GET_RTX_CLASS (GET_CODE (operands[3])) == 'c'" + "TARGET_80387 && GET_RTX_CLASS (GET_CODE (operands[3])) == 'c' + && (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)" "* return output_387_binary_op (insn, operands);" [(set (attr "type") (if_then_else (match_operand:SF 3 "mult_operator" "") @@ -10108,9 +10109,10 @@ (define_insn "*fop_df_comm" [(set (match_operand:DF 0 "register_operand" "=f") (match_operator:DF 3 "binary_fp_operator" - [(match_operand:DF 1 "register_operand" "%0") + [(match_operand:DF 1 "nonimmediate_operand" "%0") (match_operand:DF 2 "nonimmediate_operand" "fm")]))] - "TARGET_80387 && GET_RTX_CLASS (GET_CODE (operands[3])) == 'c'" + "TARGET_80387 && GET_RTX_CLASS (GET_CODE (operands[3])) == 'c' + && (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)" "* return output_387_binary_op (insn, operands);" [(set (attr "type") (if_then_else (match_operand:DF 3 "mult_operator" "") -- 2.47.2