From e4d8eb97a469d2397d3ab23f3b32f26e7e6853f2 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Wed, 11 Jun 2025 17:37:35 +0200 Subject: [PATCH] can: rcar_canfd: Repurpose f_dcfg base for other registers Reuse the existing Channel Data Bitrate Configuration Register offset member in the register configuration as the base offset for all related channel-specific registers. Rename the member and update the (incorrect) comment to reflect this. Replace the function-like channel-specific register offset macros by inline functions. This fixes the offsets of all other (currently unused) channel-specific registers on R-Car Gen4 and RZ/G3E, and allows us to replace RCANFD_GEN4_FDCFG() by the more generic rcar_canfd_f_cfdcfg(). Signed-off-by: Geert Uytterhoeven Reviewed-by: Vincent Mailhol Link: https://patch.msgid.link/75c8197c849fc9e360a75d4fa55bc01c1d850433.1749655315.git.geert+renesas@glider.be Signed-off-by: Marc Kleine-Budde --- drivers/net/can/rcar/rcar_canfd.c | 52 ++++++++++++++++++++++--------- 1 file changed, 37 insertions(+), 15 deletions(-) diff --git a/drivers/net/can/rcar/rcar_canfd.c b/drivers/net/can/rcar/rcar_canfd.c index dded509793bb9..8baf8a928da75 100644 --- a/drivers/net/can/rcar/rcar_canfd.c +++ b/drivers/net/can/rcar/rcar_canfd.c @@ -425,19 +425,10 @@ #define RCANFD_C_RPGACC(r) (0x1900 + (0x04 * (r))) /* R-Car Gen4 Classical and CAN FD mode specific register map */ -#define RCANFD_GEN4_FDCFG(m) (0x1404 + (0x20 * (m))) - #define RCANFD_GEN4_GAFL_OFFSET (0x1800) /* CAN FD mode specific register map */ -/* RSCFDnCFDCmXXX -> RCANFD_F_XXX(m) */ -#define RCANFD_F_DCFG(gpriv, m) ((gpriv)->info->regs->f_dcfg + (0x20 * (m))) -#define RCANFD_F_CFDCFG(m) (0x0504 + (0x20 * (m))) -#define RCANFD_F_CFDCTR(m) (0x0508 + (0x20 * (m))) -#define RCANFD_F_CFDSTS(m) (0x050c + (0x20 * (m))) -#define RCANFD_F_CFDCRC(m) (0x0510 + (0x20 * (m))) - /* RSCFDnCFDGAFLXXXj offset */ #define RCANFD_F_GAFL_OFFSET (0x1000) @@ -510,7 +501,7 @@ struct rcar_canfd_regs { u16 cfcc; /* Common FIFO Configuration/Control Register */ u16 cfsts; /* Common FIFO Status Register */ u16 cfpctr; /* Common FIFO Pointer Control Register */ - u16 f_dcfg; /* Global FD Configuration Register */ + u16 coffset; /* Channel Data Bitrate Configuration Register */ u16 rfoffset; /* Receive FIFO buffer access ID register */ u16 cfoffset; /* Transmit/receive FIFO buffer access ID register */ }; @@ -641,7 +632,7 @@ static const struct rcar_canfd_regs rcar_gen3_regs = { .cfcc = 0x0118, .cfsts = 0x0178, .cfpctr = 0x01d8, - .f_dcfg = 0x0500, + .coffset = 0x0500, .rfoffset = 0x3000, .cfoffset = 0x3400, }; @@ -651,7 +642,7 @@ static const struct rcar_canfd_regs rcar_gen4_regs = { .cfcc = 0x0120, .cfsts = 0x01e0, .cfpctr = 0x0240, - .f_dcfg = 0x1400, + .coffset = 0x1400, .rfoffset = 0x6000, .cfoffset = 0x6400, }; @@ -800,6 +791,37 @@ static void rcar_canfd_put_data(struct rcar_canfd_channel *priv, rcar_canfd_write(priv->base, off + i * sizeof(u32), data[i]); } +/* RSCFDnCFDCmXXX -> rcar_canfd_f_xxx(gpriv, ch) */ +static inline unsigned int rcar_canfd_f_dcfg(struct rcar_canfd_global *gpriv, + unsigned int ch) +{ + return gpriv->info->regs->coffset + 0x00 + 0x20 * ch; +} + +static inline unsigned int rcar_canfd_f_cfdcfg(struct rcar_canfd_global *gpriv, + unsigned int ch) +{ + return gpriv->info->regs->coffset + 0x04 + 0x20 * ch; +} + +static inline unsigned int rcar_canfd_f_cfdctr(struct rcar_canfd_global *gpriv, + unsigned int ch) +{ + return gpriv->info->regs->coffset + 0x08 + 0x20 * ch; +} + +static inline unsigned int rcar_canfd_f_cfdsts(struct rcar_canfd_global *gpriv, + unsigned int ch) +{ + return gpriv->info->regs->coffset + 0x0c + 0x20 * ch; +} + +static inline unsigned int rcar_canfd_f_cfdcrc(struct rcar_canfd_global *gpriv, + unsigned int ch) +{ + return gpriv->info->regs->coffset + 0x10 + 0x20 * ch; +} + static void rcar_canfd_tx_failure_cleanup(struct net_device *ndev) { u32 i; @@ -827,8 +849,8 @@ static void rcar_canfd_set_mode(struct rcar_canfd_global *gpriv) for_each_set_bit(ch, &gpriv->channels_mask, gpriv->info->max_channels) - rcar_canfd_set_bit(gpriv->base, RCANFD_GEN4_FDCFG(ch), - val); + rcar_canfd_set_bit(gpriv->base, + rcar_canfd_f_cfdcfg(gpriv, ch), val); } else { if (gpriv->fdmode) rcar_canfd_set_bit(gpriv->base, RCANFD_GRMCFG, @@ -1468,7 +1490,7 @@ static void rcar_canfd_set_bittiming(struct net_device *ndev) cfg = (RCANFD_DCFG_DTSEG1(gpriv, tseg1) | RCANFD_DCFG_DBRP(brp) | RCANFD_DCFG_DSJW(gpriv, sjw) | RCANFD_DCFG_DTSEG2(gpriv, tseg2)); - rcar_canfd_write(priv->base, RCANFD_F_DCFG(gpriv, ch), cfg); + rcar_canfd_write(priv->base, rcar_canfd_f_dcfg(gpriv, ch), cfg); } else { /* Classical CAN only mode */ if (gpriv->info->shared_can_regs) { -- 2.47.2