From e4e2d388da95317ae16a72524c742e88151ea178 Mon Sep 17 00:00:00 2001 From: Julian Seward Date: Mon, 14 Oct 2013 11:41:46 +0000 Subject: [PATCH] PPC32/64: Allow 16 byte icache and dcache lines. Partial fix for #308135. (christophe.leroy@c-s.fr) git-svn-id: svn://svn.valgrind.org/valgrind/trunk@13637 --- coregrind/m_libcproc.c | 2 +- coregrind/m_machine.c | 8 ++++---- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/coregrind/m_libcproc.c b/coregrind/m_libcproc.c index 0b9ae230ec..9a434b3a58 100644 --- a/coregrind/m_libcproc.c +++ b/coregrind/m_libcproc.c @@ -745,7 +745,7 @@ void VG_(invalidate_icache) ( void *ptr, SizeT nbytes ) cls = vai.ppc_icache_line_szB; /* Stay sane .. */ - vg_assert(cls == 32 || cls == 64 || cls == 128); + vg_assert(cls == 16 || cls == 32 || cls == 64 || cls == 128); startaddr &= ~(cls - 1); for (addr = startaddr; addr < endaddr; addr += cls) { diff --git a/coregrind/m_machine.c b/coregrind/m_machine.c index 7dacdc7d04..69bd7ac5b2 100644 --- a/coregrind/m_machine.c +++ b/coregrind/m_machine.c @@ -486,7 +486,7 @@ static void find_ppc_dcbz_sz(VexArchInfo *arch_info) if (!test_block[i]) ++dcbz_szB; } - vg_assert(dcbz_szB == 32 || dcbz_szB == 64 || dcbz_szB == 128); + vg_assert(dcbz_szB == 16 || dcbz_szB == 32 || dcbz_szB == 64 || dcbz_szB == 128); /* dcbzl clears 128B on G5/PPC970, and usually 32B on other platforms */ if (VG_MINIMAL_SETJMP(env_unsup_insn)) { @@ -504,7 +504,7 @@ static void find_ppc_dcbz_sz(VexArchInfo *arch_info) if (!test_block[i]) ++dcbzl_szB; } - vg_assert(dcbzl_szB == 32 || dcbzl_szB == 64 || dcbzl_szB == 128); + vg_assert(dcbzl_szB == 16 || dcbzl_szB == 32 || dcbzl_szB == 64 || dcbzl_szB == 128); } arch_info->ppc_dcbz_szB = dcbz_szB; @@ -1541,7 +1541,7 @@ void VG_(machine_ppc32_set_clszB)( Int szB ) vg_assert(vai.ppc_icache_line_szB == 0 || vai.ppc_icache_line_szB == szB); - vg_assert(szB == 32 || szB == 64 || szB == 128); + vg_assert(szB == 16 || szB == 32 || szB == 64 || szB == 128); vai.ppc_icache_line_szB = szB; } #endif @@ -1559,7 +1559,7 @@ void VG_(machine_ppc64_set_clszB)( Int szB ) vg_assert(vai.ppc_icache_line_szB == 0 || vai.ppc_icache_line_szB == szB); - vg_assert(szB == 32 || szB == 64 || szB == 128); + vg_assert(szB == 16 || szB == 32 || szB == 64 || szB == 128); vai.ppc_icache_line_szB = szB; } #endif -- 2.47.2