From e55e57d240e0bdef604efca5b386978b1c70d513 Mon Sep 17 00:00:00 2001 From: Anshul Dalal Date: Fri, 17 Oct 2025 18:45:24 +0530 Subject: [PATCH] mach-k3: use custom enable_cache U-Boot's provided enable_caches enforces the following sequence: icache_enable -> mmu_setup (as part of dcache_enable) -> dcache_enable Whereas for K3 devices, we would like to add entries to the provided static array (k3_mem_map) as per gd->bd->bi_dram and then call mmu_setup to configure the MMU but also create carveouts for TFA/TEE before we enable caches to prevent speculative accesses to the region. Thus the following desired sequence: add dram banks -> mmu_setup -> carveout TFA/TEE -> icache/dcache enable Therefore this patch adds K3's own implementation of enable_cache for ARM64, allowing for greater control over the cache enablement sequence. Reviewed-by: Dhruva Gole Signed-off-by: Anshul Dalal Tested-by: Wadim Egorov --- arch/arm/mach-k3/common.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c index 5483ac9906c..7f2a4e6260e 100644 --- a/arch/arm/mach-k3/common.c +++ b/arch/arm/mach-k3/common.c @@ -258,6 +258,12 @@ void board_prep_linux(struct bootm_headers *images) ROUND(images->os.end, CONFIG_SYS_CACHELINE_SIZE)); } + +void enable_caches(void) +{ + icache_enable(); + dcache_enable(); +} #endif void spl_enable_cache(void) -- 2.47.3