From e873f4311bc9bd9d8a038390f3f70921ef22d9de Mon Sep 17 00:00:00 2001 From: Uros Bizjak Date: Tue, 21 Jul 2009 11:57:46 +0200 Subject: [PATCH] backport: re PR middle-end/39943 (wrong conversion from unsigned int to float) Backport from mainline: 2009-04-29 Richard Guenther PR target/39943 * config/i386/i386.c (ix86_vectorize_builtin_conversion): Only allow conversion to signed integers. testsuite/ChangeLog: PR target/40809 * gcc.target/i386/pr40809.c: New test. Backport from mainline: 2009-04-29 Richard Guenther PR target/39943 * lib/target-supports.exp (check_effective_target_vect_uintfloat_cvt): New. (check_effective_target_vect_floatuint_cvt): Likewise. * gcc.dg/vect/slp-10.c: Adjust. * gcc.dg/vect/slp-11.c: Adjust. * gcc.dg/vect/slp-12b.c: Adjust. * gcc.dg/vect/slp-33.c: Adjust. * gcc.c-torture/compile/pr39943.c: New testcase. From-SVN: r149851 --- gcc/ChangeLog | 9 ++++ gcc/config/i386/i386.c | 4 +- gcc/testsuite/ChangeLog | 18 ++++++++ gcc/testsuite/gcc.c-torture/compile/pr39943.c | 7 +++ gcc/testsuite/gcc.dg/vect/slp-10.c | 12 ++--- gcc/testsuite/gcc.dg/vect/slp-11.c | 4 +- gcc/testsuite/gcc.dg/vect/slp-12b.c | 2 +- gcc/testsuite/gcc.dg/vect/slp-33.c | 12 ++--- gcc/testsuite/gcc.target/i386/pr40809.c | 23 ++++++++++ gcc/testsuite/lib/target-supports.exp | 45 ++++++++++++++++++- 10 files changed, 118 insertions(+), 18 deletions(-) create mode 100644 gcc/testsuite/gcc.c-torture/compile/pr39943.c create mode 100644 gcc/testsuite/gcc.target/i386/pr40809.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index a221fa9c4487..bd7aed79ce6a 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,12 @@ +2009-07-21 Uros Bizjak + + Backport from mainline: + 2009-04-29 Richard Guenther + + PR target/39943 + * config/i386/i386.c (ix86_vectorize_builtin_conversion): Only + allow conversion to signed integers. + 2009-07-18 Eric Botcazou PR rtl-optimization/40710 diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index bb6e96863119..d5950fec44a5 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -21519,7 +21519,9 @@ ix86_veclibabi_acml (enum built_in_function fn, tree type_out, tree type_in) static tree ix86_vectorize_builtin_conversion (unsigned int code, tree type) { - if (TREE_CODE (type) != VECTOR_TYPE) + if (TREE_CODE (type) != VECTOR_TYPE + /* There are only conversions from/to signed integers. */ + || TYPE_UNSIGNED (TREE_TYPE (type))) return NULL_TREE; switch (code) diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 61480452166b..9419deaf2067 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,21 @@ +2009-07-21 Uros Bizjak + + PR target/40809 + * gcc.target/i386/pr40809.c: New test. + + Backport from mainline: + 2009-04-29 Richard Guenther + + PR target/39943 + * lib/target-supports.exp (check_effective_target_vect_uintfloat_cvt): + New. + (check_effective_target_vect_floatuint_cvt): Likewise. + * gcc.dg/vect/slp-10.c: Adjust. + * gcc.dg/vect/slp-11.c: Adjust. + * gcc.dg/vect/slp-12b.c: Adjust. + * gcc.dg/vect/slp-33.c: Adjust. + * gcc.c-torture/compile/pr39943.c: New testcase. + 2009-07-14 Uros Bizjak * gcc.target/i386/sse-recip-vec.c: Move arrays out of test diff --git a/gcc/testsuite/gcc.c-torture/compile/pr39943.c b/gcc/testsuite/gcc.c-torture/compile/pr39943.c new file mode 100644 index 000000000000..537ba437029a --- /dev/null +++ b/gcc/testsuite/gcc.c-torture/compile/pr39943.c @@ -0,0 +1,7 @@ +void gl_fog_index_pixels(float f, unsigned int n, unsigned int index[]) +{ + unsigned int i; + for (i=0; i #include diff --git a/gcc/testsuite/gcc.dg/vect/slp-33.c b/gcc/testsuite/gcc.dg/vect/slp-33.c index 7ee7a0b04207..288c748af904 100644 --- a/gcc/testsuite/gcc.dg/vect/slp-33.c +++ b/gcc/testsuite/gcc.dg/vect/slp-33.c @@ -102,11 +102,11 @@ int main (void) return 0; } -/* { dg-final { scan-tree-dump-times "vectorized 3 loops" 1 "vect" {target {vect_intfloat_cvt && vect_int_mult} } } } */ -/* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" {target {{! { vect_intfloat_cvt}} && vect_int_mult} } } } */ -/* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" {target {{! { vect_intfloat_cvt}} && {! {vect_int_mult}}} } } } */ -/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 3 "vect" {target {vect_intfloat_cvt && vect_int_mult} } } } */ -/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2 "vect" {target {{! { vect_intfloat_cvt}} && vect_int_mult} } } } */ -/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 0 "vect" {target {{! { vect_intfloat_cvt}} && {! {vect_int_mult}}} } } } */ +/* { dg-final { scan-tree-dump-times "vectorized 3 loops" 1 "vect" {target {vect_uintfloat_cvt && vect_int_mult} } } } */ +/* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" {target {{! { vect_uintfloat_cvt}} && vect_int_mult} } } } */ +/* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" {target {{! { vect_uintfloat_cvt}} && {! {vect_int_mult}}} } } } */ +/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 3 "vect" {target {vect_uintfloat_cvt && vect_int_mult} } } } */ +/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2 "vect" {target {{! { vect_uintfloat_cvt}} && vect_int_mult} } } } */ +/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 0 "vect" {target {{! { vect_uintfloat_cvt}} && {! {vect_int_mult}}} } } } */ /* { dg-final { cleanup-tree-dump "vect" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr40809.c b/gcc/testsuite/gcc.target/i386/pr40809.c new file mode 100644 index 000000000000..979b53154767 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr40809.c @@ -0,0 +1,23 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -ftree-vectorize -msse2" } */ + +#include "sse2-check.h" + +#define N 8 + +unsigned int u4[N] = { 4000000000u, 4000000000u, 4000000000u, 4000000000u, 4000000000u, 4000000000u, 4000000000u, 4000000000u }; +float f4[N]; + +static void +sse2_test (void) +{ + int j; + + for (j = 0; j < N; j++) + f4[j] = u4[j]; + + /* check results: */ + for (j = 0; j < N; j++) + if (f4[j] != 4000000000.0) + abort (); +} diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index 799cd7eee853..8604ab4050f6 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -1121,7 +1121,7 @@ proc check_effective_target_vect_int { } { return $et_vect_int_saved } -# Return 1 if the target supports int->float conversion +# Return 1 if the target supports signed int->float conversion # proc check_effective_target_vect_intfloat_cvt { } { @@ -1144,7 +1144,28 @@ proc check_effective_target_vect_intfloat_cvt { } { } -# Return 1 if the target supports float->int conversion +# Return 1 if the target supports unsigned int->float conversion +# + +proc check_effective_target_vect_uintfloat_cvt { } { + global et_vect_uintfloat_cvt_saved + + if [info exists et_vect_uintfloat_cvt_saved] { + verbose "check_effective_target_vect_uintfloat_cvt: using cached result" 2 + } else { + set et_vect_uintfloat_cvt_saved 0 + if { ([istarget powerpc*-*-*] + && ![istarget powerpc-*-linux*paired*]) } { + set et_vect_uintfloat_cvt_saved 1 + } + } + + verbose "check_effective_target_vect_uintfloat_cvt: returning $et_vect_uintfloat_cvt_saved" 2 + return $et_vect_uintfloat_cvt_saved +} + + +# Return 1 if the target supports signed float->int conversion # proc check_effective_target_vect_floatint_cvt { } { @@ -1164,6 +1185,26 @@ proc check_effective_target_vect_floatint_cvt { } { return $et_vect_floatint_cvt_saved } +# Return 1 if the target supports unsigned float->int conversion +# + +proc check_effective_target_vect_floatuint_cvt { } { + global et_vect_floatuint_cvt_saved + + if [info exists et_vect_floatuint_cvt_saved] { + verbose "check_effective_target_vect_floatuint_cvt: using cached result" 2 + } else { + set et_vect_floatuint_cvt_saved 0 + if { ([istarget powerpc*-*-*] + && ![istarget powerpc-*-linux*paired*]) } { + set et_vect_floatuint_cvt_saved 1 + } + } + + verbose "check_effective_target_vect_floatuint_cvt: returning $et_vect_floatuint_cvt_saved" 2 + return $et_vect_floatuint_cvt_saved +} + # Return 1 is this is an arm target using 32-bit instructions proc check_effective_target_arm32 { } { return [check_no_compiler_messages arm32 assembly { -- 2.47.2