From ebd7d6ae0dc7d65e21460c928519f40ccf95f3b9 Mon Sep 17 00:00:00 2001 From: Cosmin Tanislav Date: Wed, 19 Nov 2025 18:14:24 +0200 Subject: [PATCH] spi: rzv2h-rspi: make clocks chip-specific The Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs have different clocks compared to RZ/V2H. Set the number of clocks and the name of the transfer clock in the chip-specific structure to prepare for adding support for them. Signed-off-by: Cosmin Tanislav Link: https://patch.msgid.link/20251119161434.595677-4-cosmin-gabriel.tanislav.xa@renesas.com Signed-off-by: Mark Brown --- drivers/spi/spi-rzv2h-rspi.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/drivers/spi/spi-rzv2h-rspi.c b/drivers/spi/spi-rzv2h-rspi.c index 7a7a576c17dd4..a1f17ec8727b9 100644 --- a/drivers/spi/spi-rzv2h-rspi.c +++ b/drivers/spi/spi-rzv2h-rspi.c @@ -66,10 +66,11 @@ #define RSPI_SPSRC_CLEAR 0xfd80 #define RSPI_RESET_NUM 2 -#define RSPI_CLK_NUM 3 struct rzv2h_rspi_info { + const char *tclk_name; unsigned int fifo_size; + unsigned int num_clks; }; struct rzv2h_rspi_priv { @@ -373,11 +374,11 @@ static int rzv2h_rspi_probe(struct platform_device *pdev) return PTR_ERR(rspi->base); ret = devm_clk_bulk_get_all_enabled(dev, &clks); - if (ret != RSPI_CLK_NUM) + if (ret != rspi->info->num_clks) return dev_err_probe(dev, ret >= 0 ? -EINVAL : ret, "cannot get clocks\n"); - for (i = 0; i < RSPI_CLK_NUM; i++) { - if (!strcmp(clks[i].id, "tclk")) { + for (i = 0; i < rspi->info->num_clks; i++) { + if (!strcmp(clks[i].id, rspi->info->tclk_name)) { rspi->tclk = clks[i].clk; break; } @@ -452,7 +453,9 @@ static void rzv2h_rspi_remove(struct platform_device *pdev) } static const struct rzv2h_rspi_info rzv2h_info = { + .tclk_name = "tclk", .fifo_size = 16, + .num_clks = 3, }; static const struct of_device_id rzv2h_rspi_match[] = { -- 2.47.3