From ecc6304308f19c159a9df27d0bd5a66f5acbba83 Mon Sep 17 00:00:00 2001 From: Catherine Moore Date: Tue, 24 Jun 2014 18:07:39 -0400 Subject: [PATCH] mips.c (mips_order_regs_for_local_alloc): Delete. 2014-06-24 Catherine Moore Sandra Loosemore gcc/ * config/mips/mips.c (mips_order_regs_for_local_alloc): Delete. * config/mips/mips.h (ADJUST_REG_ALLOC_ORDER): Delete. * config/mips/mips-protos.h (mips_order_regs_for_local_alloc): Delete. Co-Authored-By: Sandra Loosemore From-SVN: r211959 --- gcc/ChangeLog | 7 +++++++ gcc/config/mips/mips-protos.h | 1 - gcc/config/mips/mips.c | 22 ---------------------- gcc/config/mips/mips.h | 7 ------- 4 files changed, 7 insertions(+), 30 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index f603d196b83d..c8cc0b403b1f 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2014-06-24 Catherine Moore + Sandra Loosemore + + * config/mips/mips.c (mips_order_regs_for_local_alloc): Delete. + * config/mips/mips.h (ADJUST_REG_ALLOC_ORDER): Delete. + * config/mips/mips-protos.h (mips_order_regs_for_local_alloc): Delete. + 2014-06-24 Marc Glisse * doc/invoke.texi (Warning Options): Remove duplicated diff --git a/gcc/config/mips/mips-protos.h b/gcc/config/mips/mips-protos.h index 0b32a70251c7..8a517ee02ea7 100644 --- a/gcc/config/mips/mips-protos.h +++ b/gcc/config/mips/mips-protos.h @@ -247,7 +247,6 @@ extern bool mips_expand_ext_as_unaligned_load (rtx, rtx, HOST_WIDE_INT, extern bool mips_expand_ins_as_unaligned_store (rtx, rtx, HOST_WIDE_INT, HOST_WIDE_INT); extern bool mips_mem_fits_mode_p (enum machine_mode mode, rtx x); -extern void mips_order_regs_for_local_alloc (void); extern HOST_WIDE_INT mips_debugger_offset (rtx, HOST_WIDE_INT); extern void mips_push_asm_switch (struct mips_asm_switch *); diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index b1504ee621e4..10efc270298a 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -17497,28 +17497,6 @@ mips_conditional_register_usage (void) } } -/* When generating MIPS16 code, we want to allocate $24 (T_REG) before - other registers for instructions for which it is possible. This - encourages the compiler to use CMP in cases where an XOR would - require some register shuffling. */ - -void -mips_order_regs_for_local_alloc (void) -{ - int i; - - for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) - reg_alloc_order[i] = i; - - if (TARGET_MIPS16) - { - /* It really doesn't matter where we put register 0, since it is - a fixed register anyhow. */ - reg_alloc_order[0] = 24; - reg_alloc_order[24] = 0; - } -} - /* Implement EH_USES. */ bool diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index 7029e046f9a2..1164b4b18085 100644 --- a/gcc/config/mips/mips.h +++ b/gcc/config/mips/mips.h @@ -2046,13 +2046,6 @@ enum reg_class 182,183,184,185,186,187 \ } -/* ADJUST_REG_ALLOC_ORDER is a macro which permits reg_alloc_order - to be rearranged based on a particular function. On the mips16, we - want to allocate $24 (T_REG) before other registers for - instructions for which it is possible. */ - -#define ADJUST_REG_ALLOC_ORDER mips_order_regs_for_local_alloc () - /* True if VALUE is an unsigned 6-bit number. */ #define UIMM6_OPERAND(VALUE) \ -- 2.47.2