From ed45e600194133b127d9c994f2fc0c20cb7be438 Mon Sep 17 00:00:00 2001 From: Taimur Hassan Date: Fri, 17 Apr 2026 17:21:15 -0400 Subject: [PATCH] drm/amd/display: [FW Promotion] Release 0.1.57.0 [Why & How] Modify some IPS related commands. Acked-by: Alex Hung Signed-off-by: Taimur Hassan Signed-off-by: Tom Chung Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher --- .../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 26 ++++++++++++------- 1 file changed, 16 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h index fe9431cea3e52..7ae5f666883dd 100644 --- a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h +++ b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h @@ -1546,8 +1546,9 @@ enum dmub_gpint_command { * DESC: Gets IPS residency in microseconds * ARGS: 0 - Return IPS1 residency * 1 - Return IPS2 residency - * 2 - Return IPS1_RCG residency + * 2 - Return IPS0_RCG residency * 3 - Return IPS1_ONO2_ON residency + * 4 - Return IPS1_Z8_RETENTION residency * RETURN: Total residency in microseconds - lower 32 bits */ DMUB_GPINT__GET_IPS_RESIDENCY_DURATION_US_LO = 124, @@ -1567,17 +1568,18 @@ enum dmub_gpint_command { * DESC: Gets IPS residency * ARGS: 0 - Return IPS1 residency * 1 - Return IPS2 residency - * 2 - Return IPS1_RCG residency + * 2 - Return IPS0_RCG residency * 3 - Return IPS1_ONO2_ON residency + * 4 - Return IPS1_Z8_RETENTION residency * RETURN: Total residency in milli-percent. */ DMUB_GPINT__GET_IPS_RESIDENCY_PERCENT = 127, /** - * DESC: Gets IPS1_RCG histogram counts + * DESC: Gets IPS0_RCG histogram counts * ARGS: Bucket index * RETURN: Total count for the bucket */ - DMUB_GPINT__GET_IPS1_RCG_HISTOGRAM_COUNTER = 128, + DMUB_GPINT__GET_IPS0_RCG_HISTOGRAM_COUNTER = 128, /** * DESC: Gets IPS1_ONO2_ON histogram counts * ARGS: Bucket index @@ -1588,8 +1590,9 @@ enum dmub_gpint_command { * DESC: Gets IPS entry counter during residency measurement * ARGS: 0 - Return IPS1 entry counts * 1 - Return IPS2 entry counts - * 2 - Return IPS1_RCG entry counts - * 3 - Return IPS2_ONO2_ON entry counts + * 2 - Return IPS0_RCG entry counts + * 3 - Return IPS1_ONO2_ON entry counts + * 4 - Return IPS1_Z8_RETENTION entry counts * RETURN: Entry counter for selected IPS mode */ DMUB_GPINT__GET_IPS_RESIDENCY_ENTRY_COUNTER = 130, @@ -1597,8 +1600,9 @@ enum dmub_gpint_command { * DESC: Gets IPS inactive residency in microseconds * ARGS: 0 - Return IPS1_MAX residency * 1 - Return IPS2 residency - * 2 - Return IPS1_RCG residency + * 2 - Return IPS0_RCG residency * 3 - Return IPS1_ONO2_ON residency + * 4 - Return IPS1_Z8_RETENTION residency * RETURN: Total inactive residency in microseconds - lower 32 bits */ DMUB_GPINT__GET_IPS_INACTIVE_RESIDENCY_DURATION_US_LO = 131, @@ -1606,8 +1610,9 @@ enum dmub_gpint_command { * DESC: Gets IPS inactive residency in microseconds * ARGS: 0 - Return IPS1_MAX residency * 1 - Return IPS2 residency - * 2 - Return IPS1_RCG residency + * 2 - Return IPS0_RCG residency * 3 - Return IPS1_ONO2_ON residency + * 4 - Return IPS1_Z8_RETENTION residency * RETURN: Total inactive residency in microseconds - upper 32 bits */ DMUB_GPINT__GET_IPS_INACTIVE_RESIDENCY_DURATION_US_HI = 132, @@ -1615,8 +1620,9 @@ enum dmub_gpint_command { * DESC: Gets IPS residency in microseconds * ARGS: 0 - Return IPS1 residency * 1 - Return IPS2 residency - * 2 - Return IPS1_RCG residency + * 2 - Return IPS0_RCG residency * 3 - Return IPS1_ONO2_ON residency + * 4 - Return IPS1_Z8_RETENTION residency * RETURN: Total residency in microseconds - upper 32 bits */ DMUB_GPINT__GET_IPS_RESIDENCY_DURATION_US_HI = 133, @@ -6513,7 +6519,7 @@ struct dmub_rb_cmd_assr_enable { enum ips_residency_mode { IPS_RESIDENCY__IPS1_MAX, IPS_RESIDENCY__IPS2, - IPS_RESIDENCY__IPS1_RCG, + IPS_RESIDENCY__IPS1_RCG, // refers to IPS0 + RCG IPS_RESIDENCY__IPS1_ONO2_ON, IPS_RESIDENCY__IPS1_Z8_RETENTION, IPS_RESIDENCY__PG_ONO_LAST_SEEN_IN_IPS, -- 2.47.3