From ee086a69c3ba24bad01a9307b44dc58d1a22ad4e Mon Sep 17 00:00:00 2001 From: Gerhard Engleder Date: Tue, 16 Dec 2025 20:37:25 +0100 Subject: [PATCH] serial: 8250_keba: Add ICR defines MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Add defines for better readability of the Indexed Control Register (ICR) access. In enhanced mode SCR and LSR registers are used for ICR access. The behavior of these register is different in this mode and that shall be documented with dedicated defines. Suggested-by: Ilpo Järvinen Signed-off-by: Gerhard Engleder Link: https://patch.msgid.link/20251216193726.55449-3-gerhard@engleder-embedded.com Signed-off-by: Greg Kroah-Hartman --- drivers/tty/serial/8250/8250_keba.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/tty/serial/8250/8250_keba.c b/drivers/tty/serial/8250/8250_keba.c index e9e59ce79138..149953c6a288 100644 --- a/drivers/tty/serial/8250/8250_keba.c +++ b/drivers/tty/serial/8250/8250_keba.c @@ -51,6 +51,10 @@ enum kuart_mode { #define KUART_CAPABILITY_RS232 BIT(KUART_MODE_RS232) #define KUART_CAPABILITY_MASK GENMASK(3, 0) +/* registers for Indexed Control Register access in enhanced mode */ +#define KUART_EMODE_ICR_OFFSET UART_SCR +#define KUART_EMODE_ICR_VALUE UART_LSR + /* Additional Control Register DTR line configuration */ #define UART_ACR_DTRLC_MASK 0x18 #define UART_ACR_DTRLC_COMPAT 0x00 @@ -98,13 +102,13 @@ static void kuart_dtr_line_config(struct uart_8250_port *up, u8 dtrlc) u8 acr; /* set index register to 0 to access ACR register */ - serial_out(up, UART_SCR, UART_ACR); + serial_out(up, KUART_EMODE_ICR_OFFSET, UART_ACR); /* set value register to 0x10 writing DTR mode (1,0) */ - acr = serial_in(up, UART_LSR); + acr = serial_in(up, KUART_EMODE_ICR_VALUE); acr &= ~UART_ACR_DTRLC_MASK; acr |= dtrlc; - serial_out(up, UART_LSR, acr); + serial_out(up, KUART_EMODE_ICR_VALUE, acr); } static int kuart_rs485_config(struct uart_port *port, struct ktermios *termios, -- 2.47.3