From ef2429fe38a6cd9477871aa322347be352ad41a3 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Jo=C3=A3o=20Paulo=20Gon=C3=A7alves?= Date: Mon, 27 Oct 2025 09:17:53 -0300 Subject: [PATCH] arm64: defconfig: Enable i.MX95 drivers for pinctrl, Ethernet and PCIe MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Enable i.MX95 pinctrl driver necessary for booting. Also enable the missing drivers required for Ethernet and PCIe functionality. These drivers are used on i.MX95 boards, including the NXP i.MX95 19x19 EVK. The below configurations were enabled (listed with their DT nodes on imx95.dtsi): * CONFIG_PINCTRL_IMX_SCMI for the `scmi_iomuxc` pinctrl. * CONFIG_CLK_IMX95_BLK_CTL for the HSIO domain clock controller (`hsio_blk_ctl`) used by the PCIe controller. * CONFIG_NXP_NETC_BLK_CTRL for the NETC hardware domain controller (`netc_blk_ctrl`). * CONFIG_NXP_ENETC4 for the Ethernet controller (`enetc_port*`). Signed-off-by: João Paulo Gonçalves Reviewed-by: Krzysztof Kozlowski Signed-off-by: Shawn Guo --- arch/arm64/configs/defconfig | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index e3a2d37bd1042..787d3ae3f5afe 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -354,8 +354,10 @@ CONFIG_FSL_FMAN=y CONFIG_FSL_DPAA_ETH=y CONFIG_FSL_DPAA2_ETH=y CONFIG_FSL_ENETC=y +CONFIG_NXP_ENETC4=m CONFIG_FSL_ENETC_VF=y CONFIG_FSL_ENETC_QOS=y +CONFIG_NXP_NETC_BLK_CTRL=m CONFIG_HIX5HD2_GMAC=y CONFIG_HNS_DSAF=y CONFIG_HNS_ENET=y @@ -615,6 +617,7 @@ CONFIG_PINCTRL_IMX8DXL=y CONFIG_PINCTRL_IMX8ULP=y CONFIG_PINCTRL_IMX91=y CONFIG_PINCTRL_IMX93=y +CONFIG_PINCTRL_IMX_SCMI=y CONFIG_PINCTRL_MSM=y CONFIG_PINCTRL_IPQ5018=y CONFIG_PINCTRL_IPQ5332=y @@ -1349,6 +1352,7 @@ CONFIG_CLK_IMX8MQ=y CONFIG_CLK_IMX8QXP=y CONFIG_CLK_IMX8ULP=y CONFIG_CLK_IMX93=y +CONFIG_CLK_IMX95_BLK_CTL=y CONFIG_TI_SCI_CLK=y CONFIG_COMMON_CLK_MT8192_AUDSYS=y CONFIG_COMMON_CLK_MT8192_CAMSYS=y -- 2.47.3