From f0c4da68ca9e8c99f55965d8e074273a33ab916d Mon Sep 17 00:00:00 2001 From: Carl Love Date: Tue, 3 Oct 2017 10:49:48 -0500 Subject: [PATCH] PPC64, Fix bug in vperm instruction. The ISA says: Let the source vector be the concatenation of the contents of VR[VRA] followed by the contents of VR[VRB]. For each integer value i from 0 to 15, do the following. Let index be the value specified by bits 3:7 of byte element i of VR[VRC]. So, the index value is 5-bits wide ([3:7]), not 4-bits wide. --- VEX/priv/guest_ppc_toIR.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/VEX/priv/guest_ppc_toIR.c b/VEX/priv/guest_ppc_toIR.c index 1785959a19..97664c2f76 100644 --- a/VEX/priv/guest_ppc_toIR.c +++ b/VEX/priv/guest_ppc_toIR.c @@ -24047,12 +24047,12 @@ static Bool dis_av_permute ( UInt theInstr ) IRTemp vC_andF = newTemp(Ity_V128); DIP("vperm v%d,v%d,v%d,v%d\n", vD_addr, vA_addr, vB_addr, vC_addr); - /* Limit the Perm8x16 steering values to 0 .. 15 as that is what + /* Limit the Perm8x16 steering values to 0 .. 31 as that is what IR specifies, and also to hide irrelevant bits from memcheck */ assign( vC_andF, binop(Iop_AndV128, mkexpr(vC), - unop(Iop_Dup8x16, mkU8(0xF))) ); + unop(Iop_Dup8x16, mkU8(0x1F))) ); assign( a_perm, binop(Iop_Perm8x16, mkexpr(vA), mkexpr(vC_andF)) ); assign( b_perm, -- 2.47.2