From f1d6dec60148d1ca7dc660f98e39ff31a9bfb5a0 Mon Sep 17 00:00:00 2001 From: Carl Love Date: Tue, 28 Sep 2021 15:49:10 +0000 Subject: [PATCH] Fix tests for mfspr Split out the mfspr tests into a separate test using command line option "-M". The value in the LR and CTR registers changed. It appears the changes are due to changes in the test program jm-insns.c. Splinting these instructions out will help to minimize the size of future updates when the test program changes. --- NEWS | 1 + none/tests/ppc32/Makefile.am | 1 + none/tests/ppc32/jm-insns.c | 37 ++++++++++++++++++--- none/tests/ppc32/jm-mfspr.stderr.exp | 2 ++ none/tests/ppc32/jm-mfspr.stdout.exp | 13 ++++++++ none/tests/ppc32/jm-mfspr.vgtest | 1 + none/tests/ppc64/Makefile.am | 2 ++ none/tests/ppc64/jm-int_other.stdout.exp-LE | 13 +------- none/tests/ppc64/jm-mfspr.stderr.exp | 2 ++ none/tests/ppc64/jm-mfspr.stdout.exp | 13 ++++++++ none/tests/ppc64/jm-mfspr.stdout.exp-ALT | 13 ++++++++ none/tests/ppc64/jm-mfspr.vgtest | 1 + 12 files changed, 82 insertions(+), 17 deletions(-) create mode 100644 none/tests/ppc32/jm-mfspr.stderr.exp create mode 100644 none/tests/ppc32/jm-mfspr.stdout.exp create mode 100644 none/tests/ppc32/jm-mfspr.vgtest create mode 100644 none/tests/ppc64/jm-mfspr.stderr.exp create mode 100644 none/tests/ppc64/jm-mfspr.stdout.exp create mode 100644 none/tests/ppc64/jm-mfspr.stdout.exp-ALT create mode 100644 none/tests/ppc64/jm-mfspr.vgtest diff --git a/NEWS b/NEWS index 73edd71920..d4601281ee 100644 --- a/NEWS +++ b/NEWS @@ -60,6 +60,7 @@ are not entered into bugzilla tend to get forgotten about or ignored. 443031 Gcc -many change requires explicit .machine directives 443033 Add support for the ISA 3.0 mcrxrx instruction 443034 Sraw, srawi, srad, sradi, mfs +443178 Powerpc, test jm-mfspr expected output needs to be updated. To see details of a given bug, visit https://bugs.kde.org/show_bug.cgi?id=XXXXXX diff --git a/none/tests/ppc32/Makefile.am b/none/tests/ppc32/Makefile.am index 2ca067d486..187cab74f7 100644 --- a/none/tests/ppc32/Makefile.am +++ b/none/tests/ppc32/Makefile.am @@ -16,6 +16,7 @@ EXTRA_DIST = \ jm-fp.stderr.exp jm-fp.stdout.exp jm-fp.vgtest jm-fp.stdout.exp-BE2 \ jm-vmx.stderr.exp jm-vmx.stdout.exp jm-vmx.stdout.exp_Minus_nan \ jm-vmx.vgtest \ + jm-mfspr.stderr.exp jm-mfspr.stdout.exp jm-mfspr.vgtest \ jm-misc.stderr.exp jm-misc.stdout.exp jm-misc.vgtest \ lsw.stderr.exp lsw.stdout.exp lsw.vgtest \ mftocrf.stderr.exp mftocrf.stdout.exp mftocrf.vgtest \ diff --git a/none/tests/ppc32/jm-insns.c b/none/tests/ppc32/jm-insns.c index e452fe0f31..7c35823c69 100644 --- a/none/tests/ppc32/jm-insns.c +++ b/none/tests/ppc32/jm-insns.c @@ -382,6 +382,7 @@ enum test_flags { PPC_FALTIVEC = 0x00050000, PPC_MISC = 0x00060000, PPC_SH_ALGEBRAIC = 0x00070000, + PPC_MFSPR = 0x00080000, PPC_FAMILY = 0x000F0000, /* Flags: these may be combined, so use separate bitfields. */ PPC_CR = 0x01000000, @@ -1444,13 +1445,17 @@ static test_t tests_il_ops_spe_sh[] = { #endif // #ifdef __powerpc64__ { NULL, NULL, }, }; +static test_t tests_il_ops_mfspr[] = { + { &test_mfspr , " mfspr", }, + { &test_mtspr , " mtspr", }, + { NULL, NULL, }, +}; + static test_t tests_il_ops_spe[] = { { &test_rlwimi , " rlwimi", }, { &test_rlwinm , " rlwinm", }, { &test_rlwnm , " rlwnm", }, { &test_mfcr , " mfcr", }, - { &test_mfspr , " mfspr", }, - { &test_mtspr , " mtspr", }, #ifdef __powerpc64__ { &test_rldcl , " rldcl", }, { &test_rldcr , " rldcr", }, @@ -4037,6 +4042,11 @@ static test_table_t all_tests[] = { "PPC integer logical insns with one arg with flags update", 0x01010201, }, + { + tests_il_ops_mfspr , + "PPC mfspr instructions", + 0x00080207, + }, { tests_il_ops_spe , "PPC logical insns with special forms", @@ -5776,7 +5786,11 @@ static test_loop_t int_sh_algebraic[] = { &test_int_special, }; -static test_loop_t int_loops[] = { +static test_loop_t int_mfspr[] = { + &test_int_special, +}; + + static test_loop_t int_loops[] = { &test_int_one_arg, &test_int_two_args, &test_int_three_args, @@ -7513,7 +7527,7 @@ static int check_name (const char* name, const char *filter, typedef struct insn_sel_flags_t_struct { int one_arg, two_args, three_args; int arith, logical, compare, ldst; - int integer, floats, p405, altivec, faltivec, misc, sh_algebraic; + int integer, floats, p405, altivec, faltivec, misc, sh_algebraic, mfspr; int cr; } insn_sel_flags_t; @@ -7554,6 +7568,7 @@ static void do_tests ( insn_sel_flags_t seln_flags, (family == PPC_ALTIVEC && !seln_flags.altivec) || (family == PPC_MISC && !seln_flags.misc) || (family == PPC_SH_ALGEBRAIC && !seln_flags.sh_algebraic) || + (family == PPC_MFSPR && !seln_flags.mfspr) || (family == PPC_FALTIVEC && !seln_flags.faltivec)) continue; /* Check flags update */ @@ -7570,6 +7585,9 @@ static void do_tests ( insn_sel_flags_t seln_flags, case PPC_SH_ALGEBRAIC: loop = &int_sh_algebraic[0]; break; + case PPC_MFSPR: + loop = &int_mfspr[0]; + break; case PPC_MISC: loop = &misc_loops[0]; break; @@ -7678,6 +7696,7 @@ static void usage (void) "\t-a: test altivec instructions\n" "\t-m: test miscellaneous instructions\n" "\t-s: test shift algebraic (sraw, srawi, srad, sradi) instructions\n" + "\t-M: test mfspr instructions\n" "\t-A: test all (int, fp, altivec) instructions\n" "\t-v: be verbose\n" "\t-h: display this help and exit\n" @@ -7712,6 +7731,7 @@ int main (int argc, char **argv) flags.faltivec = 0; flags.cr = -1; flags.sh_algebraic = 0; + flags.mfspr = 0; while ((c = getopt(argc, argv, "123t:f:n:r:uvh")) != -1) { switch (c) { @@ -7815,6 +7835,7 @@ int main (int argc, char **argv) flags.altivec = 1; flags.faltivec = 1; flags.algebraic = 1; + flags.mfspr = 1; } // Default cr update if (flags.cr == -1) @@ -7851,10 +7872,11 @@ int main (int argc, char **argv) flags.altivec = 0; flags.faltivec = 0; flags.sh_algebraic = 0; + flags.mfspr = 0; // Flags flags.cr = 2; - while ((c = getopt(argc, argv, "ilcLfmsahvA")) != -1) { + while ((c = getopt(argc, argv, "ilcLfmMsahvA")) != -1) { switch (c) { case 'i': flags.arith = 1; @@ -7864,6 +7886,10 @@ int main (int argc, char **argv) flags.logical = 1; flags.sh_algebraic = 1; break; + case 'M': + flags.logical = 1; + flags.mfspr = 1; + break; case 'l': flags.logical = 1; flags.integer = 1; @@ -7956,6 +7982,7 @@ int main (int argc, char **argv) printf(" altivec = %d\n", flags.altivec); printf(" faltivec = %d\n", flags.faltivec); printf(" sh_algebraic = %d\n", flags.sh_algebraic); + printf(" mfspr = %d\n", flags.mfspr); printf(" cr update: \n"); printf(" cr = %d\n", flags.cr); printf("\n"); diff --git a/none/tests/ppc32/jm-mfspr.stderr.exp b/none/tests/ppc32/jm-mfspr.stderr.exp new file mode 100644 index 0000000000..139597f9cb --- /dev/null +++ b/none/tests/ppc32/jm-mfspr.stderr.exp @@ -0,0 +1,2 @@ + + diff --git a/none/tests/ppc32/jm-mfspr.stdout.exp b/none/tests/ppc32/jm-mfspr.stdout.exp new file mode 100644 index 0000000000..bfab0acbbf --- /dev/null +++ b/none/tests/ppc32/jm-mfspr.stdout.exp @@ -0,0 +1,13 @@ +PPC mfspr instructions: + mfspr 1 (00000000) -> mtxer -> mfxer => 00000000 + mfspr 1 (000f423f) -> mtxer -> mfxer => 0000003f + mfspr 1 (ffffffff) -> mtxer -> mfxer => e000007f + mfspr 8 (00000000) -> mtlr -> mflr => 00000000 + mfspr 8 (000f423f) -> mtlr -> mflr => 000f423f + mfspr 8 (ffffffff) -> mtlr -> mflr => ffffffff + mfspr 9 (00000000) -> mtctr -> mfctr => 00000000 + mfspr 9 (000f423f) -> mtctr -> mfctr => 000f423f + mfspr 9 (ffffffff) -> mtctr -> mfctr => ffffffff + + +All done. Tested 2 different instructions diff --git a/none/tests/ppc32/jm-mfspr.vgtest b/none/tests/ppc32/jm-mfspr.vgtest new file mode 100644 index 0000000000..07ea056e41 --- /dev/null +++ b/none/tests/ppc32/jm-mfspr.vgtest @@ -0,0 +1 @@ +prog: jm-insns -M diff --git a/none/tests/ppc64/Makefile.am b/none/tests/ppc64/Makefile.am index 1f40d94ca3..4fae9f7dd4 100644 --- a/none/tests/ppc64/Makefile.am +++ b/none/tests/ppc64/Makefile.am @@ -12,6 +12,8 @@ EXTRA_DIST = \ jm-int-sh_algebraic.stdout.exp-LE \ jm-int-sh_algebraic.stdout.exp-LE-ISA3_0 \ jm-int-sh_algebraic.vgtest \ + jm-mfspr.stderr.exp jm-mfspr.stdout.exp jm-mfspr.stdout.exp-ALT \ + jm-mfspr.vgtest \ jm-int_other.stderr.exp jm-int_other.stdout.exp jm-int_other.vgtest \ jm-int_other.stdout.exp-LE \ jm-fp.stderr.exp jm-fp.stdout.exp jm-fp.vgtest jm-fp.stdout.exp-LE jm-fp.stdout.exp-LE2 jm-fp.stdout.exp-BE2 \ diff --git a/none/tests/ppc64/jm-int_other.stdout.exp-LE b/none/tests/ppc64/jm-int_other.stdout.exp-LE index 08fac66165..f7dc3675b3 100644 --- a/none/tests/ppc64/jm-int_other.stdout.exp-LE +++ b/none/tests/ppc64/jm-int_other.stdout.exp-LE @@ -617,17 +617,6 @@ PPC logical insns with special forms: mfcr (0000001cbe991def) => 00000000be991def (be991def 00000000) mfcr (ffffffffffffffff) => 00000000ffffffff (ffffffff 00000000) - mfspr 1 (00000000) -> mtxer -> mfxer => 0000000000000000 - mfspr 1 (be991def) -> mtxer -> mfxer => 00000000a000006f - mfspr 1 (ffffffff) -> mtxer -> mfxer => 00000000e000007f - mfspr 8 (00000000) -> mtlr -> mflr => 0000000000000000 - mfspr 8 (be991def) -> mtlr -> mflr => ffffffffbe991def - mfspr 8 (ffffffff) -> mtlr -> mflr => ffffffffffffffff - mfspr 9 (00000000) -> mtctr -> mfctr => 0000000000000000 - mfspr 9 (be991def) -> mtctr -> mfctr => ffffffffbe991def - mfspr 9 (ffffffff) -> mtctr -> mfctr => ffffffffffffffff - - rldcl 0000000000000000, 0000000000000000, 0 => 0000000000000000 (00000000 00000000) rldcl 0000000000000000, 0000000000000000, 7 => 0000000000000000 (00000000 00000000) rldcl 0000000000000000, 0000000000000000, 14 => 0000000000000000 (00000000 00000000) @@ -3859,4 +3848,4 @@ PPC integer store insns with three register args: stdux 0000001cbe991def, 8 => 0000001cbe991def, 8 (00000000 00000000) stdux ffffffffffffffff, 16 => ffffffffffffffff, 16 (00000000 00000000) -All done. Tested 123 different instructions +All done. Tested 121 different instructions diff --git a/none/tests/ppc64/jm-mfspr.stderr.exp b/none/tests/ppc64/jm-mfspr.stderr.exp new file mode 100644 index 0000000000..139597f9cb --- /dev/null +++ b/none/tests/ppc64/jm-mfspr.stderr.exp @@ -0,0 +1,2 @@ + + diff --git a/none/tests/ppc64/jm-mfspr.stdout.exp b/none/tests/ppc64/jm-mfspr.stdout.exp new file mode 100644 index 0000000000..f9cc36fd33 --- /dev/null +++ b/none/tests/ppc64/jm-mfspr.stdout.exp @@ -0,0 +1,13 @@ +PPC mfspr instructions: + mfspr 1 (00000000) -> mtxer -> mfxer => 0000000000000000 + mfspr 1 (be991def) -> mtxer -> mfxer => 00000000a000006f + mfspr 1 (ffffffff) -> mtxer -> mfxer => 00000000e000007f + mfspr 8 (00000000) -> mtlr -> mflr => 0000000000000000 + mfspr 8 (be991def) -> mtlr -> mflr => ffffffffbe991def + mfspr 8 (ffffffff) -> mtlr -> mflr => ffffffffffffffff + mfspr 9 (00000000) -> mtctr -> mfctr => 0000000000000000 + mfspr 9 (be991def) -> mtctr -> mfctr => ffffffffbe991def + mfspr 9 (ffffffff) -> mtctr -> mfctr => ffffffffffffffff + + +All done. Tested 2 different instructions diff --git a/none/tests/ppc64/jm-mfspr.stdout.exp-ALT b/none/tests/ppc64/jm-mfspr.stdout.exp-ALT new file mode 100644 index 0000000000..7801fac6c4 --- /dev/null +++ b/none/tests/ppc64/jm-mfspr.stdout.exp-ALT @@ -0,0 +1,13 @@ +PPC mfspr instructions: + mfspr 1 (00000000) -> mtxer -> mfxer => 0000000000000000 + mfspr 1 (be991def) -> mtxer -> mfxer => 00000000a000006f + mfspr 1 (ffffffff) -> mtxer -> mfxer => 00000000e000007f + mfspr 8 (00000000) -> mtlr -> mflr => 0000000000000000 + mfspr 8 (be991def) -> mtlr -> mflr => 0000001cbe991def + mfspr 8 (ffffffff) -> mtlr -> mflr => ffffffffffffffff + mfspr 9 (00000000) -> mtctr -> mfctr => 0000000000000000 + mfspr 9 (be991def) -> mtctr -> mfctr => 0000001cbe991def + mfspr 9 (ffffffff) -> mtctr -> mfctr => ffffffffffffffff + + +All done. Tested 2 different instructions diff --git a/none/tests/ppc64/jm-mfspr.vgtest b/none/tests/ppc64/jm-mfspr.vgtest new file mode 100644 index 0000000000..07ea056e41 --- /dev/null +++ b/none/tests/ppc64/jm-mfspr.vgtest @@ -0,0 +1 @@ +prog: jm-insns -M -- 2.47.2