From f2d32942026c05acc49d5f445dd38931419967aa Mon Sep 17 00:00:00 2001 From: Benjamin Schneider Date: Mon, 25 Nov 2024 13:14:52 -0800 Subject: [PATCH] cpufreq: enable 1200Mhz clock speed for armada-37xx MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit This frequency was disabled because of stability problems whose source could not be accurately identified[1]. After seven months of testing, the evidence points to an incorrectly configured bootloader as the source of the historical instability. Testing was performed on two A3720 devices with this frequency enabled and the ondemand policy in use. Marvell merged[2] changes to their bootloader source needed to address the stability issue. This driver should expose this frequency option to users. [1] https://github.com/torvalds/linux/commit/484f2b7c61b9ae58cc00c5127bcbcd9177af8dfe [2] https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell/pull/44 Signed-off-by: Benjamin Schneider Reviewed-by: Pali Rohár Reviewed-by: Andrew Lunn Acked-by: Gregory CLEMENT Signed-off-by: Viresh Kumar --- drivers/cpufreq/armada-37xx-cpufreq.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/drivers/cpufreq/armada-37xx-cpufreq.c b/drivers/cpufreq/armada-37xx-cpufreq.c index bea41ccabf1f0..f28a4435fba71 100644 --- a/drivers/cpufreq/armada-37xx-cpufreq.c +++ b/drivers/cpufreq/armada-37xx-cpufreq.c @@ -102,11 +102,7 @@ struct armada_37xx_dvfs { }; static struct armada_37xx_dvfs armada_37xx_dvfs[] = { - /* - * The cpufreq scaling for 1.2 GHz variant of the SOC is currently - * unstable because we do not know how to configure it properly. - */ - /* {.cpu_freq_max = 1200*1000*1000, .divider = {1, 2, 4, 6} }, */ + {.cpu_freq_max = 1200*1000*1000, .divider = {1, 2, 4, 6} }, {.cpu_freq_max = 1000*1000*1000, .divider = {1, 2, 4, 5} }, {.cpu_freq_max = 800*1000*1000, .divider = {1, 2, 3, 4} }, {.cpu_freq_max = 600*1000*1000, .divider = {2, 4, 5, 6} }, -- 2.47.3