From f2dd012ae6cd1f488103e6c17b46fef64d1b96fd Mon Sep 17 00:00:00 2001 From: Andrea Corallo Date: Wed, 19 Apr 2023 18:08:57 +0200 Subject: [PATCH] arm: Mve backend + testsuite fixes 2 Hi all, this patch improves a number of MVE tests in the testsuite for more precise and better coverage using check-function-bodies instead of scan-assembler checks. Also all intrusctions prescribed in the ACLE[1] are now checked. Also a number of simple fixes are done in the backend to fix capitalization and spacing. Best Regards Andrea [1] gcc/ChangeLog: * config/arm/mve.md (mve_vrndq_m_f, mve_vrev64q_f) (mve_vrev32q_fv8hf, mve_vcvttq_f32_f16v4sf) (mve_vcvtbq_f32_f16v4sf, mve_vcvtq_to_f_) (mve_vrev64q_, mve_vcvtq_from_f_) (mve_vmovltq_, mve_vmovlbq_) (mve_vcvtpq_, mve_vcvtnq_) (mve_vcvtmq_, mve_vcvtaq_) (mve_vmvnq_n_, mve_vrev16q_v16qi) (mve_vctpq, mve_vbrsrq_n_f) (mve_vbrsrq_n_, mve_vandq_f, mve_vbicq_f) (mve_vctpq_m, mve_vcvtbq_f16_f32v8hf) (mve_vcvttq_f16_f32v8hf, mve_veorq_f) (mve_vmlaldavxq_s, mve_vmlsldavq_s) (mve_vmlsldavxq_s, mve_vornq_f, mve_vorrq_f) (mve_vrmlaldavhxq_sv4si, mve_vcvtq_m_to_f_) (mve_vshlcq_, mve_vmvnq_m_) (mve_vpselq_, mve_vcvtbq_m_f16_f32v8hf) (mve_vcvtbq_m_f32_f16v4sf, mve_vcvttq_m_f16_f32v8hf) (mve_vcvttq_m_f32_f16v4sf, mve_vmlaldavq_p_) (mve_vmlsldavaq_s, mve_vmlsldavaxq_s) (mve_vmlsldavq_p_s, mve_vmlsldavxq_p_s) (mve_vmvnq_m_n_, mve_vorrq_m_n_) (mve_vpselq_f, mve_vrev32q_m_fv8hf) (mve_vrev32q_m_, mve_vrev64q_m_f) (mve_vrmlaldavhaxq_sv4si, mve_vrmlaldavhxq_p_sv4si) (mve_vrmlsldavhaxq_sv4si, mve_vrmlsldavhq_p_sv4si) (mve_vrmlsldavhxq_p_sv4si, mve_vrev16q_m_v16qi) (mve_vrmlaldavhq_p_v4si, mve_vrmlsldavhaq_sv4si) (mve_vandq_m_, mve_vbicq_m_) (mve_veorq_m_, mve_vornq_m_) (mve_vorrq_m_, mve_vandq_m_f) (mve_vbicq_m_f, mve_veorq_m_f, mve_vornq_m_f) (mve_vorrq_m_f) (mve_vstrdq_scatter_shifted_offset_p_v2di_insn) (mve_vstrdq_scatter_shifted_offset_v2di_insn) (mve_vstrdq_scatter_base_wb_p_v2di) : Fix spacing and capitalization in the emitted asm. gcc/testsuite/ChangeLog: * gcc.target/arm/mve/intrinsics/asrl.c: Use check-function-bodies instead of scan-assembler checks. Use extern "C" for C++ testing. * gcc.target/arm/mve/intrinsics/lsll.c: Likewise. * gcc.target/arm/mve/intrinsics/sqrshr.c: Likewise. * gcc.target/arm/mve/intrinsics/sqrshrl_sat48.c: Likewise. * gcc.target/arm/mve/intrinsics/sqshl.c: Likewise. * gcc.target/arm/mve/intrinsics/sqshll.c: Likewise. * gcc.target/arm/mve/intrinsics/srshr.c: Likewise. * gcc.target/arm/mve/intrinsics/srshrl.c: Likewise. * gcc.target/arm/mve/intrinsics/uqrshl.c: Likewise. * gcc.target/arm/mve/intrinsics/uqrshll_sat48.c: Likewise. * gcc.target/arm/mve/intrinsics/uqshl.c: Likewise. * gcc.target/arm/mve/intrinsics/uqshll.c: Likewise. * gcc.target/arm/mve/intrinsics/urshr.c: Likewise. * gcc.target/arm/mve/intrinsics/urshrl.c: Likewise. * gcc.target/arm/mve/intrinsics/vadciq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vadciq_m_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vadciq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vadciq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vadcq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vadcq_m_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vadcq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vadcq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vandq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vandq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vandq_m_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vandq_m_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vandq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vandq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vandq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vandq_m_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vandq_m_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vandq_m_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vandq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vandq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vandq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vandq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vandq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vandq_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vandq_x_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vandq_x_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vandq_x_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vandq_x_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vandq_x_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vandq_x_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vandq_x_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vandq_x_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vbicq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vbicq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vbicq_m_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vbicq_m_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vbicq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vbicq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vbicq_m_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vbicq_m_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vbicq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vbicq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vbicq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vbicq_m_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vbicq_m_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vbicq_m_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vbicq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vbicq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vbicq_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vbicq_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vbicq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vbicq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vbicq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vbicq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vbicq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vbicq_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vbicq_x_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vbicq_x_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vbicq_x_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vbicq_x_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vbicq_x_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vbicq_x_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vbicq_x_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vbicq_x_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vbrsrq_m_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vbrsrq_m_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vbrsrq_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vbrsrq_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vbrsrq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vbrsrq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vbrsrq_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vbrsrq_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vbrsrq_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vbrsrq_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vbrsrq_x_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vbrsrq_x_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vctp16q.c: Likewise. * gcc.target/arm/mve/intrinsics/vctp16q_m.c: Likewise. * gcc.target/arm/mve/intrinsics/vctp32q.c: Likewise. * gcc.target/arm/mve/intrinsics/vctp32q_m.c: Likewise. * gcc.target/arm/mve/intrinsics/vctp64q.c: Likewise. * gcc.target/arm/mve/intrinsics/vctp64q_m.c: Likewise. * gcc.target/arm/mve/intrinsics/vctp8q.c: Likewise. * gcc.target/arm/mve/intrinsics/vctp8q_m.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtaq_m_s16_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtaq_m_s32_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtaq_m_u16_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtaq_m_u32_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtaq_s16_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtaq_s32_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtaq_u16_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtaq_u32_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtaq_x_s16_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtaq_x_s32_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtaq_x_u16_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtaq_x_u32_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtbq_f16_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtbq_f32_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtbq_m_f16_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtbq_m_f32_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtbq_x_f32_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtmq_m_s16_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtmq_m_s32_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtmq_m_u16_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtmq_m_u32_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtmq_s16_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtmq_s32_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtmq_u16_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtmq_u32_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtmq_x_s16_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtmq_x_s32_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtmq_x_u16_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtmq_x_u32_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtnq_m_s16_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtnq_m_s32_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtnq_m_u16_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtnq_m_u32_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtnq_s16_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtnq_s32_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtnq_u16_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtnq_u32_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtnq_x_s16_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtnq_x_s32_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtnq_x_u16_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtnq_x_u32_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtpq_m_s16_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtpq_m_s32_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtpq_m_u16_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtpq_m_u32_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtpq_s16_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtpq_s32_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtpq_u16_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtpq_u32_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtpq_x_s16_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtpq_x_s32_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtpq_x_u16_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtpq_x_u32_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtq_f16_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtq_f16_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtq_f32_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtq_f32_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtq_m_f16_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtq_m_f16_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtq_m_f32_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtq_m_f32_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtq_m_n_f16_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtq_m_n_f16_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtq_m_n_f32_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtq_m_n_f32_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtq_m_n_s16_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtq_m_n_s32_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtq_m_n_u16_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtq_m_n_u32_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtq_m_s16_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtq_m_s32_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtq_m_u16_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtq_m_u32_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtq_n_f16_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtq_n_f16_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtq_n_f32_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtq_n_f32_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtq_n_s16_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtq_n_s32_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtq_n_u16_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtq_n_u32_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtq_s16_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtq_s32_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtq_u16_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtq_u32_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtq_x_f16_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtq_x_f16_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtq_x_f32_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtq_x_f32_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtq_x_n_f16_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtq_x_n_f16_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtq_x_n_f32_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtq_x_n_f32_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtq_x_n_s16_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtq_x_n_s32_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtq_x_n_u16_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtq_x_n_u32_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtq_x_s16_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtq_x_s32_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtq_x_u16_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvtq_x_u32_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvttq_f16_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvttq_f32_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvttq_m_f16_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvttq_m_f32_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcvttq_x_f32_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/veorq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/veorq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/veorq_m_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/veorq_m_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/veorq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/veorq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/veorq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/veorq_m_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/veorq_m_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/veorq_m_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/veorq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/veorq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/veorq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/veorq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/veorq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/veorq_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/veorq_x_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/veorq_x_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/veorq_x_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/veorq_x_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/veorq_x_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/veorq_x_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/veorq_x_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/veorq_x_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vfmaq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vfmaq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vfmaq_m_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vfmaq_m_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vfmaq_m_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vfmaq_m_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vfmaq_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vfmaq_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vfmasq_n_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vfmasq_n_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vfmsq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vfmsq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vfmsq_m_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vfmsq_m_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmladavq_p_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmladavq_p_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmladavq_p_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmladavq_p_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmladavq_p_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmladavq_p_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmladavq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmladavq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmladavq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmladavq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmladavq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmladavq_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmladavxq_p_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmladavxq_p_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmladavxq_p_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmladavxq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmladavxq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmladavxq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlaldavaq_p_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlaldavaq_p_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlaldavaq_p_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlaldavaq_p_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlaldavaq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlaldavaq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlaldavaq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlaldavaq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlaldavaxq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlaldavaxq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlaldavq_p_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlaldavq_p_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlaldavq_p_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlaldavq_p_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlaldavq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlaldavq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlaldavq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlaldavq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlaldavxq_p_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlaldavxq_p_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlaldavxq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlaldavxq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlaq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlaq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlaq_m_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlaq_m_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlaq_m_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlaq_m_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlaq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlaq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlaq_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlaq_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlaq_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlaq_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlsdavaq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlsdavaq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlsdavaq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlsdavaxq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlsdavaxq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlsdavaxq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlsdavq_p_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlsdavq_p_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlsdavq_p_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlsdavq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlsdavq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlsdavq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlsdavxq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlsdavxq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlsdavxq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlsldavaq_p_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlsldavaq_p_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlsldavaq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlsldavaq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlsldavaxq_p_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlsldavaxq_p_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlsldavaxq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlsldavaxq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlsldavq_p_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlsldavq_p_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlsldavq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlsldavq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlsldavxq_p_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlsldavxq_p_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlsldavxq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmlsldavxq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmovlbq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmovlbq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmovlbq_m_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmovlbq_m_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmovlbq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmovlbq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmovlbq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmovlbq_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmovlbq_x_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmovlbq_x_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmovlbq_x_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmovlbq_x_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmovltq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmovltq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmovltq_m_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmovltq_m_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmovltq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmovltq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmovltq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmovltq_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmovltq_x_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmovltq_x_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmovltq_x_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmovltq_x_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmovnbq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmovnbq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmovnbq_m_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmovnbq_m_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmovnbq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmovnbq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmovnbq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmovnbq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmovntq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmovntq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmovntq_m_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmovntq_m_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmovntq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmovntq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmovntq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmovntq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmvnq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmvnq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmvnq_m_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmvnq_m_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmvnq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmvnq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmvnq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmvnq_m_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmvnq_m_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmvnq_m_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmvnq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmvnq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmvnq_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmvnq_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmvnq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmvnq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmvnq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmvnq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmvnq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmvnq_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmvnq_x_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmvnq_x_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmvnq_x_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmvnq_x_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmvnq_x_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmvnq_x_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmvnq_x_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vmvnq_x_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vmvnq_x_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vmvnq_x_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vornq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vornq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vornq_m_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vornq_m_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vornq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vornq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vornq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vornq_m_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vornq_m_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vornq_m_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vornq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vornq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vornq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vornq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vornq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vornq_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vornq_x_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vornq_x_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vornq_x_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vornq_x_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vornq_x_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vornq_x_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vornq_x_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vornq_x_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vorrq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vorrq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vorrq_m_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vorrq_m_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vorrq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vorrq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vorrq_m_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vorrq_m_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vorrq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vorrq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vorrq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vorrq_m_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vorrq_m_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vorrq_m_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vorrq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vorrq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vorrq_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vorrq_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vorrq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vorrq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vorrq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vorrq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vorrq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vorrq_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vorrq_x_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vorrq_x_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vorrq_x_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vorrq_x_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vorrq_x_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vorrq_x_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vorrq_x_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vorrq_x_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vpnot.c: Likewise. * gcc.target/arm/mve/intrinsics/vpselq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vpselq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vpselq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vpselq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vpselq_s64.c: Likewise. * gcc.target/arm/mve/intrinsics/vpselq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vpselq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vpselq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vpselq_u64.c: Likewise. * gcc.target/arm/mve/intrinsics/vpselq_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqmovnbq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqmovnbq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqmovnbq_m_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqmovnbq_m_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqmovnbq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqmovnbq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqmovnbq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqmovnbq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqmovntq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqmovntq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqmovntq_m_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqmovntq_m_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqmovntq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqmovntq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqmovntq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqmovntq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqmovunbq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqmovunbq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqmovunbq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqmovunbq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqmovuntq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqmovuntq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqmovuntq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqmovuntq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrdmladhq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrdmladhq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrdmladhq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrdmladhxq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrdmladhxq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrdmladhxq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrdmulhq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrdmulhq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrdmulhq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrshlq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrshlq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrshlq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrshlq_m_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrshlq_m_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrshlq_m_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrshlq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrshlq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrshlq_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrshlq_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrshlq_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrshlq_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrshlq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrshlq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrshlq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrshlq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrshlq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrshlq_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrshrnbq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrshrnbq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrshrnbq_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrshrnbq_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrshrntq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrshrntq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrshrntq_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrshrntq_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrshrunbq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrshrunbq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrshrunbq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrshrunbq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrshruntq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrshruntq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrshruntq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqrshruntq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshlq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshlq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshlq_m_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshlq_m_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshlq_m_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshlq_m_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshlq_m_r_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshlq_m_r_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshlq_m_r_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshlq_m_r_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshlq_m_r_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshlq_m_r_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshlq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshlq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshlq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshlq_m_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshlq_m_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshlq_m_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshlq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshlq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshlq_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshlq_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshlq_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshlq_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshlq_r_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshlq_r_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshlq_r_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshlq_r_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshlq_r_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshlq_r_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshlq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshlq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshlq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshlq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshlq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshlq_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshluq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshluq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshluq_m_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshluq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshluq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshluq_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshrnbq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshrnbq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshrnbq_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshrnbq_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshrntq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshrntq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshrntq_m_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshrntq_m_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshrntq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshrntq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshrntq_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshrntq_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshrunbq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshrunbq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshrunbq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshrunbq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshruntq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshruntq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshruntq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqshruntq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqsubq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqsubq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqsubq_m_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqsubq_m_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqsubq_m_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqsubq_m_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqsubq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqsubq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqsubq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqsubq_m_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqsubq_m_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqsubq_m_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqsubq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqsubq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqsubq_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqsubq_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqsubq_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqsubq_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqsubq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqsubq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqsubq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vqsubq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vqsubq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vqsubq_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vrev16q_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vrev16q_m_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vrev16q_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vrev16q_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vrev16q_x_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vrev16q_x_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vrev32q_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrev32q_m_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrev32q_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrev32q_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vrev32q_m_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrev32q_m_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vrev32q_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrev32q_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vrev32q_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrev32q_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vrev32q_x_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrev32q_x_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrev32q_x_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vrev32q_x_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrev32q_x_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vrev64q_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrev64q_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrev64q_m_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrev64q_m_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrev64q_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrev64q_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrev64q_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vrev64q_m_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrev64q_m_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrev64q_m_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vrev64q_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrev64q_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrev64q_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vrev64q_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrev64q_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrev64q_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vrev64q_x_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrev64q_x_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrev64q_x_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrev64q_x_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrev64q_x_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vrev64q_x_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrev64q_x_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrev64q_x_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vrhaddq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrhaddq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrhaddq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vrhaddq_m_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrhaddq_m_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrhaddq_m_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vrhaddq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrhaddq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrhaddq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vrhaddq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrhaddq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrhaddq_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vrhaddq_x_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrhaddq_x_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrhaddq_x_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vrhaddq_x_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrhaddq_x_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrhaddq_x_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrmlaldavhaq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrmlaldavhaq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrmlaldavhaxq_p_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrmlaldavhaxq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrmlaldavhq_p_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrmlaldavhq_p_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrmlaldavhq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrmlaldavhq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrmlaldavhxq_p_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrmlaldavhxq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrmlsldavhaq_p_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrmlsldavhaq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrmlsldavhaxq_p_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrmlsldavhaxq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrmlsldavhq_p_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrmlsldavhq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrmlsldavhxq_p_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrmlsldavhxq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrmulhq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrmulhq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrmulhq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vrmulhq_m_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrmulhq_m_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrmulhq_m_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vrmulhq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrmulhq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrmulhq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vrmulhq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrmulhq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrmulhq_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vrmulhq_x_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrmulhq_x_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrmulhq_x_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vrmulhq_x_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrmulhq_x_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrmulhq_x_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vrndaq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrndaq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrndaq_m_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrndaq_m_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrndaq_x_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrndaq_x_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrndmq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrndmq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrndmq_m_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrndmq_m_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrndmq_x_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrndmq_x_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrndnq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrndnq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrndnq_m_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrndnq_m_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrndnq_x_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrndnq_x_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrndpq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrndpq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrndpq_m_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrndpq_m_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrndpq_x_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrndpq_x_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrndq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrndq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrndq_m_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrndq_m_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrndq_x_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrndq_x_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrndxq_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrndxq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrndxq_m_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrndxq_m_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrndxq_x_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrndxq_x_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshrnbq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshrnbq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshrnbq_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshrnbq_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshrntq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshrntq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshrntq_m_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshrntq_m_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshrntq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshrntq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshrntq_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshrntq_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshrq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshrq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshrq_m_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshrq_m_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshrq_m_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshrq_m_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshrq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshrq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshrq_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshrq_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshrq_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshrq_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshrq_x_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshrq_x_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshrq_x_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshrq_x_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshrq_x_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vrshrq_x_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vsbciq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vsbciq_m_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vsbciq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vsbciq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vsbcq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vsbcq_m_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vsbcq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vsbcq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlcq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlcq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlcq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlcq_m_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlcq_m_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlcq_m_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlcq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlcq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlcq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlcq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlcq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlcq_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vshllbq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vshllbq_m_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vshllbq_m_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vshllbq_m_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vshllbq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vshllbq_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vshllbq_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vshllbq_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vshllbq_x_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vshllbq_x_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vshllbq_x_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vshllbq_x_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlltq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlltq_m_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlltq_m_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlltq_m_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlltq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlltq_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlltq_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlltq_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlltq_x_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlltq_x_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlltq_x_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlltq_x_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlq_m_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlq_m_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlq_m_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlq_m_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlq_m_r_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlq_m_r_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlq_m_r_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlq_m_r_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlq_m_r_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlq_m_r_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlq_m_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlq_m_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlq_m_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlq_m_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlq_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlq_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlq_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlq_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlq_r_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlq_r_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlq_r_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlq_r_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlq_r_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlq_r_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlq_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlq_x_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlq_x_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlq_x_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlq_x_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlq_x_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlq_x_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlq_x_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlq_x_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlq_x_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlq_x_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlq_x_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vshlq_x_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vshrnbq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vshrnbq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vshrnbq_m_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vshrnbq_m_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vshrnbq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vshrnbq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vshrnbq_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vshrnbq_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vshrntq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vshrntq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vshrntq_m_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vshrntq_m_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vshrntq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vshrntq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vshrntq_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vshrntq_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vshrq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vshrq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vshrq_m_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vshrq_m_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vshrq_m_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vshrq_m_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vshrq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vshrq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vshrq_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vshrq_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vshrq_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vshrq_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vshrq_x_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vshrq_x_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vshrq_x_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vshrq_x_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vshrq_x_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vsliq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vsliq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vsliq_m_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vsliq_m_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vsliq_m_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vsliq_m_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vsliq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vsliq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vsliq_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vsliq_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vsliq_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vsliq_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vsriq_m_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vsriq_m_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vsriq_m_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vsriq_m_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vsriq_m_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vsriq_m_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vsriq_n_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vsriq_n_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vsriq_n_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vsriq_n_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vsriq_n_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vsriq_n_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vst1q_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vst1q_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vst1q_p_f16.c: Likewise. * gcc.target/arm/mve/intrinsics/vst1q_p_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vst1q_p_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vst1q_p_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vst1q_p_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vst1q_p_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vst1q_p_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vst1q_p_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vst1q_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vst1q_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vst1q_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vst1q_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vst1q_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vst1q_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_p_s64.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_p_u64.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_s64.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_u64.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_s64.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_u64.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_s64.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_u64.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_p_s64.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_p_u64.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_s64.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_u64.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_p_s64.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_p_u64.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_s64.c: Likewise. * gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_u64.c: Likewise. --- gcc/config/arm/mve.md | 64 +++++++++--------- .../gcc.target/arm/mve/intrinsics/asrl.c | 21 +++++- .../gcc.target/arm/mve/intrinsics/lsll.c | 33 ++++++++- .../gcc.target/arm/mve/intrinsics/sqrshr.c | 21 +++++- .../arm/mve/intrinsics/sqrshrl_sat48.c | 21 +++++- .../gcc.target/arm/mve/intrinsics/sqshl.c | 21 +++++- .../gcc.target/arm/mve/intrinsics/sqshll.c | 21 +++++- .../gcc.target/arm/mve/intrinsics/srshr.c | 21 +++++- .../gcc.target/arm/mve/intrinsics/srshrl.c | 21 +++++- .../gcc.target/arm/mve/intrinsics/uqrshl.c | 33 ++++++++- .../arm/mve/intrinsics/uqrshll_sat48.c | 33 ++++++++- .../gcc.target/arm/mve/intrinsics/uqshl.c | 33 ++++++++- .../gcc.target/arm/mve/intrinsics/uqshll.c | 33 ++++++++- .../gcc.target/arm/mve/intrinsics/urshr.c | 35 ++++++++-- .../gcc.target/arm/mve/intrinsics/urshrl.c | 33 ++++++++- .../arm/mve/intrinsics/vadciq_m_s32.c | 50 ++++++++++++-- .../arm/mve/intrinsics/vadciq_m_u32.c | 50 ++++++++++++-- .../arm/mve/intrinsics/vadciq_s32.c | 40 +++++++++-- .../arm/mve/intrinsics/vadciq_u32.c | 40 +++++++++-- .../arm/mve/intrinsics/vadcq_m_s32.c | 62 +++++++++++++++-- .../arm/mve/intrinsics/vadcq_m_u32.c | 62 +++++++++++++++-- .../gcc.target/arm/mve/intrinsics/vadcq_s32.c | 52 ++++++++++++-- .../gcc.target/arm/mve/intrinsics/vadcq_u32.c | 52 ++++++++++++-- .../gcc.target/arm/mve/intrinsics/vandq_f16.c | 24 ++++++- .../gcc.target/arm/mve/intrinsics/vandq_f32.c | 24 ++++++- .../arm/mve/intrinsics/vandq_m_f16.c | 34 ++++++++-- .../arm/mve/intrinsics/vandq_m_f32.c | 34 ++++++++-- .../arm/mve/intrinsics/vandq_m_s16.c | 34 ++++++++-- .../arm/mve/intrinsics/vandq_m_s32.c | 34 ++++++++-- .../arm/mve/intrinsics/vandq_m_s8.c | 34 ++++++++-- .../arm/mve/intrinsics/vandq_m_u16.c | 34 ++++++++-- .../arm/mve/intrinsics/vandq_m_u32.c | 34 ++++++++-- .../arm/mve/intrinsics/vandq_m_u8.c | 34 ++++++++-- .../gcc.target/arm/mve/intrinsics/vandq_s16.c | 24 ++++++- .../gcc.target/arm/mve/intrinsics/vandq_s32.c | 24 ++++++- .../gcc.target/arm/mve/intrinsics/vandq_s8.c | 24 ++++++- .../gcc.target/arm/mve/intrinsics/vandq_u16.c | 24 ++++++- .../gcc.target/arm/mve/intrinsics/vandq_u32.c | 24 ++++++- .../gcc.target/arm/mve/intrinsics/vandq_u8.c | 24 ++++++- .../arm/mve/intrinsics/vandq_x_f16.c | 33 ++++++++- .../arm/mve/intrinsics/vandq_x_f32.c | 33 ++++++++- .../arm/mve/intrinsics/vandq_x_s16.c | 33 ++++++++- .../arm/mve/intrinsics/vandq_x_s32.c | 33 ++++++++- .../arm/mve/intrinsics/vandq_x_s8.c | 33 ++++++++- .../arm/mve/intrinsics/vandq_x_u16.c | 33 ++++++++- .../arm/mve/intrinsics/vandq_x_u32.c | 33 ++++++++- .../arm/mve/intrinsics/vandq_x_u8.c | 33 ++++++++- .../gcc.target/arm/mve/intrinsics/vbicq_f16.c | 23 ++++++- .../gcc.target/arm/mve/intrinsics/vbicq_f32.c | 23 ++++++- .../arm/mve/intrinsics/vbicq_m_f16.c | 34 ++++++++-- .../arm/mve/intrinsics/vbicq_m_f32.c | 34 ++++++++-- .../arm/mve/intrinsics/vbicq_m_n_s16.c | 37 ++++++++-- .../arm/mve/intrinsics/vbicq_m_n_s32.c | 33 ++++++++- .../arm/mve/intrinsics/vbicq_m_n_u16.c | 33 ++++++++- .../arm/mve/intrinsics/vbicq_m_n_u32.c | 33 ++++++++- .../arm/mve/intrinsics/vbicq_m_s16.c | 34 ++++++++-- .../arm/mve/intrinsics/vbicq_m_s32.c | 34 ++++++++-- .../arm/mve/intrinsics/vbicq_m_s8.c | 34 ++++++++-- .../arm/mve/intrinsics/vbicq_m_u16.c | 34 ++++++++-- .../arm/mve/intrinsics/vbicq_m_u32.c | 34 ++++++++-- .../arm/mve/intrinsics/vbicq_m_u8.c | 34 ++++++++-- .../arm/mve/intrinsics/vbicq_n_s16.c | 23 ++++++- .../arm/mve/intrinsics/vbicq_n_s32.c | 23 ++++++- .../arm/mve/intrinsics/vbicq_n_u16.c | 23 ++++++- .../arm/mve/intrinsics/vbicq_n_u32.c | 23 ++++++- .../gcc.target/arm/mve/intrinsics/vbicq_s16.c | 23 ++++++- .../gcc.target/arm/mve/intrinsics/vbicq_s32.c | 23 ++++++- .../gcc.target/arm/mve/intrinsics/vbicq_s8.c | 23 ++++++- .../gcc.target/arm/mve/intrinsics/vbicq_u16.c | 23 ++++++- .../gcc.target/arm/mve/intrinsics/vbicq_u32.c | 23 ++++++- .../gcc.target/arm/mve/intrinsics/vbicq_u8.c | 23 ++++++- .../arm/mve/intrinsics/vbicq_x_f16.c | 33 ++++++++- .../arm/mve/intrinsics/vbicq_x_f32.c | 33 ++++++++- .../arm/mve/intrinsics/vbicq_x_s16.c | 33 ++++++++- .../arm/mve/intrinsics/vbicq_x_s32.c | 33 ++++++++- .../arm/mve/intrinsics/vbicq_x_s8.c | 33 ++++++++- .../arm/mve/intrinsics/vbicq_x_u16.c | 33 ++++++++- .../arm/mve/intrinsics/vbicq_x_u32.c | 33 ++++++++- .../arm/mve/intrinsics/vbicq_x_u8.c | 33 ++++++++- .../arm/mve/intrinsics/vbrsrq_m_n_f16.c | 34 ++++++++-- .../arm/mve/intrinsics/vbrsrq_m_n_f32.c | 34 ++++++++-- .../arm/mve/intrinsics/vbrsrq_m_n_s16.c | 34 ++++++++-- .../arm/mve/intrinsics/vbrsrq_m_n_s32.c | 34 ++++++++-- .../arm/mve/intrinsics/vbrsrq_m_n_s8.c | 34 ++++++++-- .../arm/mve/intrinsics/vbrsrq_m_n_u16.c | 34 ++++++++-- .../arm/mve/intrinsics/vbrsrq_m_n_u32.c | 34 ++++++++-- .../arm/mve/intrinsics/vbrsrq_m_n_u8.c | 34 ++++++++-- .../arm/mve/intrinsics/vbrsrq_n_f16.c | 24 ++++++- .../arm/mve/intrinsics/vbrsrq_n_f32.c | 24 ++++++- .../arm/mve/intrinsics/vbrsrq_n_s16.c | 24 ++++++- .../arm/mve/intrinsics/vbrsrq_n_s32.c | 24 ++++++- .../arm/mve/intrinsics/vbrsrq_n_s8.c | 24 ++++++- .../arm/mve/intrinsics/vbrsrq_n_u16.c | 24 ++++++- .../arm/mve/intrinsics/vbrsrq_n_u32.c | 24 ++++++- .../arm/mve/intrinsics/vbrsrq_n_u8.c | 24 ++++++- .../arm/mve/intrinsics/vbrsrq_x_n_f16.c | 34 ++++++++-- .../arm/mve/intrinsics/vbrsrq_x_n_f32.c | 34 ++++++++-- .../arm/mve/intrinsics/vbrsrq_x_n_s16.c | 34 ++++++++-- .../arm/mve/intrinsics/vbrsrq_x_n_s32.c | 34 ++++++++-- .../arm/mve/intrinsics/vbrsrq_x_n_s8.c | 34 ++++++++-- .../arm/mve/intrinsics/vbrsrq_x_n_u16.c | 34 ++++++++-- .../arm/mve/intrinsics/vbrsrq_x_n_u32.c | 34 ++++++++-- .../arm/mve/intrinsics/vbrsrq_x_n_u8.c | 34 ++++++++-- .../arm/mve/intrinsics/vcmpgtq_n_f16.c | 2 +- .../gcc.target/arm/mve/intrinsics/vctp16q.c | 33 +++++++-- .../gcc.target/arm/mve/intrinsics/vctp16q_m.c | 42 ++++++++++-- .../gcc.target/arm/mve/intrinsics/vctp32q.c | 33 +++++++-- .../gcc.target/arm/mve/intrinsics/vctp32q_m.c | 42 ++++++++++-- .../gcc.target/arm/mve/intrinsics/vctp64q.c | 33 +++++++-- .../gcc.target/arm/mve/intrinsics/vctp64q_m.c | 42 ++++++++++-- .../gcc.target/arm/mve/intrinsics/vctp8q.c | 33 +++++++-- .../gcc.target/arm/mve/intrinsics/vctp8q_m.c | 42 ++++++++++-- .../arm/mve/intrinsics/vcvtaq_m_s16_f16.c | 33 ++++++++- .../arm/mve/intrinsics/vcvtaq_m_s32_f32.c | 33 ++++++++- .../arm/mve/intrinsics/vcvtaq_m_u16_f16.c | 33 ++++++++- .../arm/mve/intrinsics/vcvtaq_m_u32_f32.c | 33 ++++++++- .../arm/mve/intrinsics/vcvtaq_s16_f16.c | 17 ++++- .../arm/mve/intrinsics/vcvtaq_s32_f32.c | 17 ++++- .../arm/mve/intrinsics/vcvtaq_u16_f16.c | 19 +++++- .../arm/mve/intrinsics/vcvtaq_u32_f32.c | 19 +++++- .../arm/mve/intrinsics/vcvtaq_x_s16_f16.c | 22 +++++- .../arm/mve/intrinsics/vcvtaq_x_s32_f32.c | 22 +++++- .../arm/mve/intrinsics/vcvtaq_x_u16_f16.c | 22 +++++- .../arm/mve/intrinsics/vcvtaq_x_u32_f32.c | 22 +++++- .../arm/mve/intrinsics/vcvtbq_f16_f32.c | 17 ++++- .../arm/mve/intrinsics/vcvtbq_f32_f16.c | 17 ++++- .../arm/mve/intrinsics/vcvtbq_m_f16_f32.c | 26 ++++--- .../arm/mve/intrinsics/vcvtbq_m_f32_f16.c | 26 ++++--- .../arm/mve/intrinsics/vcvtbq_x_f32_f16.c | 22 +++++- .../arm/mve/intrinsics/vcvtmq_m_s16_f16.c | 33 ++++++++- .../arm/mve/intrinsics/vcvtmq_m_s32_f32.c | 33 ++++++++- .../arm/mve/intrinsics/vcvtmq_m_u16_f16.c | 33 ++++++++- .../arm/mve/intrinsics/vcvtmq_m_u32_f32.c | 33 ++++++++- .../arm/mve/intrinsics/vcvtmq_s16_f16.c | 17 ++++- .../arm/mve/intrinsics/vcvtmq_s32_f32.c | 17 ++++- .../arm/mve/intrinsics/vcvtmq_u16_f16.c | 19 +++++- .../arm/mve/intrinsics/vcvtmq_u32_f32.c | 19 +++++- .../arm/mve/intrinsics/vcvtmq_x_s16_f16.c | 22 +++++- .../arm/mve/intrinsics/vcvtmq_x_s32_f32.c | 22 +++++- .../arm/mve/intrinsics/vcvtmq_x_u16_f16.c | 22 +++++- .../arm/mve/intrinsics/vcvtmq_x_u32_f32.c | 22 +++++- .../arm/mve/intrinsics/vcvtnq_m_s16_f16.c | 33 ++++++++- .../arm/mve/intrinsics/vcvtnq_m_s32_f32.c | 33 ++++++++- .../arm/mve/intrinsics/vcvtnq_m_u16_f16.c | 33 ++++++++- .../arm/mve/intrinsics/vcvtnq_m_u32_f32.c | 33 ++++++++- .../arm/mve/intrinsics/vcvtnq_s16_f16.c | 17 ++++- .../arm/mve/intrinsics/vcvtnq_s32_f32.c | 17 ++++- .../arm/mve/intrinsics/vcvtnq_u16_f16.c | 19 +++++- .../arm/mve/intrinsics/vcvtnq_u32_f32.c | 17 ++++- .../arm/mve/intrinsics/vcvtnq_x_s16_f16.c | 22 +++++- .../arm/mve/intrinsics/vcvtnq_x_s32_f32.c | 22 +++++- .../arm/mve/intrinsics/vcvtnq_x_u16_f16.c | 22 +++++- .../arm/mve/intrinsics/vcvtnq_x_u32_f32.c | 22 +++++- .../arm/mve/intrinsics/vcvtpq_m_s16_f16.c | 33 ++++++++- .../arm/mve/intrinsics/vcvtpq_m_s32_f32.c | 33 ++++++++- .../arm/mve/intrinsics/vcvtpq_m_u16_f16.c | 33 ++++++++- .../arm/mve/intrinsics/vcvtpq_m_u32_f32.c | 33 ++++++++- .../arm/mve/intrinsics/vcvtpq_s16_f16.c | 17 ++++- .../arm/mve/intrinsics/vcvtpq_s32_f32.c | 17 ++++- .../arm/mve/intrinsics/vcvtpq_u16_f16.c | 19 +++++- .../arm/mve/intrinsics/vcvtpq_u32_f32.c | 19 +++++- .../arm/mve/intrinsics/vcvtpq_x_s16_f16.c | 22 +++++- .../arm/mve/intrinsics/vcvtpq_x_s32_f32.c | 22 +++++- .../arm/mve/intrinsics/vcvtpq_x_u16_f16.c | 22 +++++- .../arm/mve/intrinsics/vcvtpq_x_u32_f32.c | 22 +++++- .../arm/mve/intrinsics/vcvtq_f16_s16.c | 30 ++++++++- .../arm/mve/intrinsics/vcvtq_f16_u16.c | 30 ++++++++- .../arm/mve/intrinsics/vcvtq_f32_s32.c | 30 ++++++++- .../arm/mve/intrinsics/vcvtq_f32_u32.c | 30 ++++++++- .../arm/mve/intrinsics/vcvtq_m_f16_s16.c | 33 ++++++++- .../arm/mve/intrinsics/vcvtq_m_f16_u16.c | 33 ++++++++- .../arm/mve/intrinsics/vcvtq_m_f32_s32.c | 33 ++++++++- .../arm/mve/intrinsics/vcvtq_m_f32_u32.c | 33 ++++++++- .../arm/mve/intrinsics/vcvtq_m_n_f16_s16.c | 34 ++++++++-- .../arm/mve/intrinsics/vcvtq_m_n_f16_u16.c | 34 ++++++++-- .../arm/mve/intrinsics/vcvtq_m_n_f32_s32.c | 34 ++++++++-- .../arm/mve/intrinsics/vcvtq_m_n_f32_u32.c | 38 +++++++++-- .../arm/mve/intrinsics/vcvtq_m_n_s16_f16.c | 34 ++++++++-- .../arm/mve/intrinsics/vcvtq_m_n_s32_f32.c | 34 ++++++++-- .../arm/mve/intrinsics/vcvtq_m_n_u16_f16.c | 34 ++++++++-- .../arm/mve/intrinsics/vcvtq_m_n_u32_f32.c | 34 ++++++++-- .../arm/mve/intrinsics/vcvtq_m_s16_f16.c | 33 ++++++++- .../arm/mve/intrinsics/vcvtq_m_s32_f32.c | 33 ++++++++- .../arm/mve/intrinsics/vcvtq_m_u16_f16.c | 33 ++++++++- .../arm/mve/intrinsics/vcvtq_m_u32_f32.c | 33 ++++++++- .../arm/mve/intrinsics/vcvtq_n_f16_s16.c | 24 ++++++- .../arm/mve/intrinsics/vcvtq_n_f16_u16.c | 24 ++++++- .../arm/mve/intrinsics/vcvtq_n_f32_s32.c | 24 ++++++- .../arm/mve/intrinsics/vcvtq_n_f32_u32.c | 24 ++++++- .../arm/mve/intrinsics/vcvtq_n_s16_f16.c | 17 ++++- .../arm/mve/intrinsics/vcvtq_n_s32_f32.c | 17 ++++- .../arm/mve/intrinsics/vcvtq_n_u16_f16.c | 17 ++++- .../arm/mve/intrinsics/vcvtq_n_u32_f32.c | 17 ++++- .../arm/mve/intrinsics/vcvtq_s16_f16.c | 17 ++++- .../arm/mve/intrinsics/vcvtq_s32_f32.c | 17 ++++- .../arm/mve/intrinsics/vcvtq_u16_f16.c | 19 +++++- .../arm/mve/intrinsics/vcvtq_u32_f32.c | 19 +++++- .../arm/mve/intrinsics/vcvtq_x_f16_s16.c | 34 ++++++++-- .../arm/mve/intrinsics/vcvtq_x_f16_u16.c | 34 ++++++++-- .../arm/mve/intrinsics/vcvtq_x_f32_s32.c | 34 ++++++++-- .../arm/mve/intrinsics/vcvtq_x_f32_u32.c | 34 ++++++++-- .../arm/mve/intrinsics/vcvtq_x_n_f16_s16.c | 34 ++++++++-- .../arm/mve/intrinsics/vcvtq_x_n_f16_u16.c | 34 ++++++++-- .../arm/mve/intrinsics/vcvtq_x_n_f32_s32.c | 34 ++++++++-- .../arm/mve/intrinsics/vcvtq_x_n_f32_u32.c | 38 +++++++++-- .../arm/mve/intrinsics/vcvtq_x_n_s16_f16.c | 22 +++++- .../arm/mve/intrinsics/vcvtq_x_n_s32_f32.c | 22 +++++- .../arm/mve/intrinsics/vcvtq_x_n_u16_f16.c | 22 +++++- .../arm/mve/intrinsics/vcvtq_x_n_u32_f32.c | 22 +++++- .../arm/mve/intrinsics/vcvtq_x_s16_f16.c | 22 +++++- .../arm/mve/intrinsics/vcvtq_x_s32_f32.c | 22 +++++- .../arm/mve/intrinsics/vcvtq_x_u16_f16.c | 22 +++++- .../arm/mve/intrinsics/vcvtq_x_u32_f32.c | 22 +++++- .../arm/mve/intrinsics/vcvttq_f16_f32.c | 17 ++++- .../arm/mve/intrinsics/vcvttq_f32_f16.c | 17 ++++- .../arm/mve/intrinsics/vcvttq_m_f16_f32.c | 26 ++++--- .../arm/mve/intrinsics/vcvttq_m_f32_f16.c | 26 ++++--- .../arm/mve/intrinsics/vcvttq_x_f32_f16.c | 22 +++++- .../gcc.target/arm/mve/intrinsics/veorq_f16.c | 24 ++++++- .../gcc.target/arm/mve/intrinsics/veorq_f32.c | 24 ++++++- .../arm/mve/intrinsics/veorq_m_f16.c | 34 ++++++++-- .../arm/mve/intrinsics/veorq_m_f32.c | 34 ++++++++-- .../arm/mve/intrinsics/veorq_m_s16.c | 34 ++++++++-- .../arm/mve/intrinsics/veorq_m_s32.c | 34 ++++++++-- .../arm/mve/intrinsics/veorq_m_s8.c | 34 ++++++++-- .../arm/mve/intrinsics/veorq_m_u16.c | 34 ++++++++-- .../arm/mve/intrinsics/veorq_m_u32.c | 34 ++++++++-- .../arm/mve/intrinsics/veorq_m_u8.c | 34 ++++++++-- .../gcc.target/arm/mve/intrinsics/veorq_s16.c | 24 ++++++- .../gcc.target/arm/mve/intrinsics/veorq_s32.c | 24 ++++++- .../gcc.target/arm/mve/intrinsics/veorq_s8.c | 24 ++++++- .../gcc.target/arm/mve/intrinsics/veorq_u16.c | 24 ++++++- .../gcc.target/arm/mve/intrinsics/veorq_u32.c | 24 ++++++- .../gcc.target/arm/mve/intrinsics/veorq_u8.c | 24 ++++++- .../arm/mve/intrinsics/veorq_x_f16.c | 34 ++++++++-- .../arm/mve/intrinsics/veorq_x_f32.c | 34 ++++++++-- .../arm/mve/intrinsics/veorq_x_s16.c | 34 ++++++++-- .../arm/mve/intrinsics/veorq_x_s32.c | 34 ++++++++-- .../arm/mve/intrinsics/veorq_x_s8.c | 34 ++++++++-- .../arm/mve/intrinsics/veorq_x_u16.c | 34 ++++++++-- .../arm/mve/intrinsics/veorq_x_u32.c | 34 ++++++++-- .../arm/mve/intrinsics/veorq_x_u8.c | 34 ++++++++-- .../gcc.target/arm/mve/intrinsics/vfmaq_f16.c | 32 +++++++-- .../gcc.target/arm/mve/intrinsics/vfmaq_f32.c | 32 +++++++-- .../arm/mve/intrinsics/vfmaq_m_f16.c | 42 +++++++++--- .../arm/mve/intrinsics/vfmaq_m_f32.c | 42 +++++++++--- .../arm/mve/intrinsics/vfmaq_m_n_f16.c | 58 +++++++++++++--- .../arm/mve/intrinsics/vfmaq_m_n_f32.c | 58 +++++++++++++--- .../arm/mve/intrinsics/vfmaq_n_f16.c | 44 ++++++++++-- .../arm/mve/intrinsics/vfmaq_n_f32.c | 44 ++++++++++-- .../arm/mve/intrinsics/vfmasq_m_n_f16.c | 2 +- .../arm/mve/intrinsics/vfmasq_m_n_f32.c | 2 +- .../arm/mve/intrinsics/vfmasq_n_f16.c | 44 ++++++++++-- .../arm/mve/intrinsics/vfmasq_n_f32.c | 44 ++++++++++-- .../gcc.target/arm/mve/intrinsics/vfmsq_f16.c | 32 +++++++-- .../gcc.target/arm/mve/intrinsics/vfmsq_f32.c | 32 +++++++-- .../arm/mve/intrinsics/vfmsq_m_f16.c | 42 +++++++++--- .../arm/mve/intrinsics/vfmsq_m_f32.c | 42 +++++++++--- .../arm/mve/intrinsics/vhcaddq_rot270_m_s16.c | 34 ++++++++-- .../arm/mve/intrinsics/vhcaddq_rot270_m_s32.c | 34 ++++++++-- .../arm/mve/intrinsics/vhcaddq_rot270_m_s8.c | 34 ++++++++-- .../arm/mve/intrinsics/vhcaddq_rot270_s16.c | 24 ++++++- .../arm/mve/intrinsics/vhcaddq_rot270_s32.c | 24 ++++++- .../arm/mve/intrinsics/vhcaddq_rot270_s8.c | 24 ++++++- .../arm/mve/intrinsics/vhcaddq_rot270_x_s16.c | 33 ++++++++- .../arm/mve/intrinsics/vhcaddq_rot270_x_s32.c | 33 ++++++++- .../arm/mve/intrinsics/vhcaddq_rot270_x_s8.c | 33 ++++++++- .../arm/mve/intrinsics/vhcaddq_rot90_m_s16.c | 34 ++++++++-- .../arm/mve/intrinsics/vhcaddq_rot90_m_s32.c | 34 ++++++++-- .../arm/mve/intrinsics/vhcaddq_rot90_m_s8.c | 34 ++++++++-- .../arm/mve/intrinsics/vhcaddq_rot90_s16.c | 24 ++++++- .../arm/mve/intrinsics/vhcaddq_rot90_s32.c | 24 ++++++- .../arm/mve/intrinsics/vhcaddq_rot90_s8.c | 24 ++++++- .../arm/mve/intrinsics/vhcaddq_rot90_x_s16.c | 33 ++++++++- .../arm/mve/intrinsics/vhcaddq_rot90_x_s32.c | 33 ++++++++- .../arm/mve/intrinsics/vhcaddq_rot90_x_s8.c | 33 ++++++++- .../arm/mve/intrinsics/vmladavq_p_s16.c | 40 +++++++++-- .../arm/mve/intrinsics/vmladavq_p_s32.c | 40 +++++++++-- .../arm/mve/intrinsics/vmladavq_p_s8.c | 40 +++++++++-- .../arm/mve/intrinsics/vmladavq_p_u16.c | 40 +++++++++-- .../arm/mve/intrinsics/vmladavq_p_u32.c | 40 +++++++++-- .../arm/mve/intrinsics/vmladavq_p_u8.c | 40 +++++++++-- .../arm/mve/intrinsics/vmladavq_s16.c | 32 +++++++-- .../arm/mve/intrinsics/vmladavq_s32.c | 32 +++++++-- .../arm/mve/intrinsics/vmladavq_s8.c | 32 +++++++-- .../arm/mve/intrinsics/vmladavq_u16.c | 32 +++++++-- .../arm/mve/intrinsics/vmladavq_u32.c | 32 +++++++-- .../arm/mve/intrinsics/vmladavq_u8.c | 32 +++++++-- .../arm/mve/intrinsics/vmladavxq_p_s16.c | 40 +++++++++-- .../arm/mve/intrinsics/vmladavxq_p_s32.c | 40 +++++++++-- .../arm/mve/intrinsics/vmladavxq_p_s8.c | 40 +++++++++-- .../arm/mve/intrinsics/vmladavxq_s16.c | 32 +++++++-- .../arm/mve/intrinsics/vmladavxq_s32.c | 32 +++++++-- .../arm/mve/intrinsics/vmladavxq_s8.c | 32 +++++++-- .../arm/mve/intrinsics/vmlaldavaq_p_s16.c | 40 +++++++++-- .../arm/mve/intrinsics/vmlaldavaq_p_s32.c | 40 +++++++++-- .../arm/mve/intrinsics/vmlaldavaq_p_u16.c | 56 ++++++++++++++-- .../arm/mve/intrinsics/vmlaldavaq_p_u32.c | 56 ++++++++++++++-- .../arm/mve/intrinsics/vmlaldavaq_s16.c | 32 +++++++-- .../arm/mve/intrinsics/vmlaldavaq_s32.c | 32 +++++++-- .../arm/mve/intrinsics/vmlaldavaq_u16.c | 44 ++++++++++-- .../arm/mve/intrinsics/vmlaldavaq_u32.c | 44 ++++++++++-- .../arm/mve/intrinsics/vmlaldavaxq_p_s16.c | 2 +- .../arm/mve/intrinsics/vmlaldavaxq_p_s32.c | 2 +- .../arm/mve/intrinsics/vmlaldavaxq_s16.c | 2 +- .../arm/mve/intrinsics/vmlaldavaxq_s32.c | 2 +- .../arm/mve/intrinsics/vmlaldavq_p_s16.c | 40 +++++++++-- .../arm/mve/intrinsics/vmlaldavq_p_s32.c | 40 +++++++++-- .../arm/mve/intrinsics/vmlaldavq_p_u16.c | 40 +++++++++-- .../arm/mve/intrinsics/vmlaldavq_p_u32.c | 40 +++++++++-- .../arm/mve/intrinsics/vmlaldavq_s16.c | 32 +++++++-- .../arm/mve/intrinsics/vmlaldavq_s32.c | 32 +++++++-- .../arm/mve/intrinsics/vmlaldavq_u16.c | 32 +++++++-- .../arm/mve/intrinsics/vmlaldavq_u32.c | 32 +++++++-- .../arm/mve/intrinsics/vmlaldavxq_p_s16.c | 40 +++++++++-- .../arm/mve/intrinsics/vmlaldavxq_p_s32.c | 40 +++++++++-- .../arm/mve/intrinsics/vmlaldavxq_s16.c | 32 +++++++-- .../arm/mve/intrinsics/vmlaldavxq_s32.c | 32 +++++++-- .../arm/mve/intrinsics/vmlaq_m_n_s16.c | 42 +++++++++--- .../arm/mve/intrinsics/vmlaq_m_n_s32.c | 42 +++++++++--- .../arm/mve/intrinsics/vmlaq_m_n_s8.c | 42 +++++++++--- .../arm/mve/intrinsics/vmlaq_m_n_u16.c | 58 +++++++++++++--- .../arm/mve/intrinsics/vmlaq_m_n_u32.c | 58 +++++++++++++--- .../arm/mve/intrinsics/vmlaq_m_n_u8.c | 58 +++++++++++++--- .../arm/mve/intrinsics/vmlaq_n_s16.c | 32 +++++++-- .../arm/mve/intrinsics/vmlaq_n_s32.c | 32 +++++++-- .../arm/mve/intrinsics/vmlaq_n_s8.c | 32 +++++++-- .../arm/mve/intrinsics/vmlaq_n_u16.c | 44 ++++++++++-- .../arm/mve/intrinsics/vmlaq_n_u32.c | 44 ++++++++++-- .../arm/mve/intrinsics/vmlaq_n_u8.c | 44 ++++++++++-- .../arm/mve/intrinsics/vmlsdavaq_p_s16.c | 33 ++++++++- .../arm/mve/intrinsics/vmlsdavaq_p_s32.c | 33 ++++++++- .../arm/mve/intrinsics/vmlsdavaq_p_s8.c | 33 ++++++++- .../arm/mve/intrinsics/vmlsdavaq_s16.c | 24 ++++++- .../arm/mve/intrinsics/vmlsdavaq_s32.c | 24 ++++++- .../arm/mve/intrinsics/vmlsdavaq_s8.c | 24 ++++++- .../arm/mve/intrinsics/vmlsdavaxq_p_s16.c | 33 ++++++++- .../arm/mve/intrinsics/vmlsdavaxq_p_s32.c | 33 ++++++++- .../arm/mve/intrinsics/vmlsdavaxq_p_s8.c | 33 ++++++++- .../arm/mve/intrinsics/vmlsdavaxq_s16.c | 24 ++++++- .../arm/mve/intrinsics/vmlsdavaxq_s32.c | 24 ++++++- .../arm/mve/intrinsics/vmlsdavaxq_s8.c | 24 ++++++- .../arm/mve/intrinsics/vmlsdavq_p_s16.c | 32 ++++++++- .../arm/mve/intrinsics/vmlsdavq_p_s32.c | 32 ++++++++- .../arm/mve/intrinsics/vmlsdavq_p_s8.c | 32 ++++++++- .../arm/mve/intrinsics/vmlsdavq_s16.c | 24 ++++++- .../arm/mve/intrinsics/vmlsdavq_s32.c | 24 ++++++- .../arm/mve/intrinsics/vmlsdavq_s8.c | 24 ++++++- .../arm/mve/intrinsics/vmlsdavxq_p_s16.c | 32 ++++++++- .../arm/mve/intrinsics/vmlsdavxq_p_s32.c | 32 ++++++++- .../arm/mve/intrinsics/vmlsdavxq_p_s8.c | 32 ++++++++- .../arm/mve/intrinsics/vmlsdavxq_s16.c | 24 ++++++- .../arm/mve/intrinsics/vmlsdavxq_s32.c | 24 ++++++- .../arm/mve/intrinsics/vmlsdavxq_s8.c | 24 ++++++- .../arm/mve/intrinsics/vmlsldavaq_p_s16.c | 32 ++++++++- .../arm/mve/intrinsics/vmlsldavaq_p_s32.c | 32 ++++++++- .../arm/mve/intrinsics/vmlsldavaq_s16.c | 24 ++++++- .../arm/mve/intrinsics/vmlsldavaq_s32.c | 24 ++++++- .../arm/mve/intrinsics/vmlsldavaxq_p_s16.c | 32 ++++++++- .../arm/mve/intrinsics/vmlsldavaxq_p_s32.c | 32 ++++++++- .../arm/mve/intrinsics/vmlsldavaxq_s16.c | 24 ++++++- .../arm/mve/intrinsics/vmlsldavaxq_s32.c | 24 ++++++- .../arm/mve/intrinsics/vmlsldavq_p_s16.c | 32 ++++++++- .../arm/mve/intrinsics/vmlsldavq_p_s32.c | 32 ++++++++- .../arm/mve/intrinsics/vmlsldavq_s16.c | 24 ++++++- .../arm/mve/intrinsics/vmlsldavq_s32.c | 24 ++++++- .../arm/mve/intrinsics/vmlsldavxq_p_s16.c | 32 ++++++++- .../arm/mve/intrinsics/vmlsldavxq_p_s32.c | 32 ++++++++- .../arm/mve/intrinsics/vmlsldavxq_s16.c | 24 ++++++- .../arm/mve/intrinsics/vmlsldavxq_s32.c | 24 ++++++- .../arm/mve/intrinsics/vmovlbq_m_s16.c | 33 ++++++++- .../arm/mve/intrinsics/vmovlbq_m_s8.c | 33 ++++++++- .../arm/mve/intrinsics/vmovlbq_m_u16.c | 33 ++++++++- .../arm/mve/intrinsics/vmovlbq_m_u8.c | 33 ++++++++- .../arm/mve/intrinsics/vmovlbq_s16.c | 28 ++++++-- .../arm/mve/intrinsics/vmovlbq_s8.c | 24 ++++++- .../arm/mve/intrinsics/vmovlbq_u16.c | 28 ++++++-- .../arm/mve/intrinsics/vmovlbq_u8.c | 28 ++++++-- .../arm/mve/intrinsics/vmovlbq_x_s16.c | 33 ++++++++- .../arm/mve/intrinsics/vmovlbq_x_s8.c | 33 ++++++++- .../arm/mve/intrinsics/vmovlbq_x_u16.c | 33 ++++++++- .../arm/mve/intrinsics/vmovlbq_x_u8.c | 33 ++++++++- .../arm/mve/intrinsics/vmovltq_m_s16.c | 33 ++++++++- .../arm/mve/intrinsics/vmovltq_m_s8.c | 33 ++++++++- .../arm/mve/intrinsics/vmovltq_m_u16.c | 33 ++++++++- .../arm/mve/intrinsics/vmovltq_m_u8.c | 33 ++++++++- .../arm/mve/intrinsics/vmovltq_s16.c | 28 ++++++-- .../arm/mve/intrinsics/vmovltq_s8.c | 24 ++++++- .../arm/mve/intrinsics/vmovltq_u16.c | 28 ++++++-- .../arm/mve/intrinsics/vmovltq_u8.c | 28 ++++++-- .../arm/mve/intrinsics/vmovltq_x_s16.c | 33 ++++++++- .../arm/mve/intrinsics/vmovltq_x_s8.c | 33 ++++++++- .../arm/mve/intrinsics/vmovltq_x_u16.c | 33 ++++++++- .../arm/mve/intrinsics/vmovltq_x_u8.c | 33 ++++++++- .../arm/mve/intrinsics/vmovnbq_m_s16.c | 33 ++++++++- .../arm/mve/intrinsics/vmovnbq_m_s32.c | 33 ++++++++- .../arm/mve/intrinsics/vmovnbq_m_u16.c | 33 ++++++++- .../arm/mve/intrinsics/vmovnbq_m_u32.c | 33 ++++++++- .../arm/mve/intrinsics/vmovnbq_s16.c | 24 ++++++- .../arm/mve/intrinsics/vmovnbq_s32.c | 24 ++++++- .../arm/mve/intrinsics/vmovnbq_u16.c | 24 ++++++- .../arm/mve/intrinsics/vmovnbq_u32.c | 24 ++++++- .../arm/mve/intrinsics/vmovntq_m_s16.c | 33 ++++++++- .../arm/mve/intrinsics/vmovntq_m_s32.c | 33 ++++++++- .../arm/mve/intrinsics/vmovntq_m_u16.c | 33 ++++++++- .../arm/mve/intrinsics/vmovntq_m_u32.c | 33 ++++++++- .../arm/mve/intrinsics/vmovntq_s16.c | 24 ++++++- .../arm/mve/intrinsics/vmovntq_s32.c | 24 ++++++- .../arm/mve/intrinsics/vmovntq_u16.c | 24 ++++++- .../arm/mve/intrinsics/vmovntq_u32.c | 24 ++++++- .../arm/mve/intrinsics/vmvnq_m_n_s16.c | 37 ++++++++-- .../arm/mve/intrinsics/vmvnq_m_n_s32.c | 37 ++++++++-- .../arm/mve/intrinsics/vmvnq_m_n_u16.c | 37 ++++++++-- .../arm/mve/intrinsics/vmvnq_m_n_u32.c | 37 ++++++++-- .../arm/mve/intrinsics/vmvnq_m_s16.c | 33 ++++++++- .../arm/mve/intrinsics/vmvnq_m_s32.c | 33 ++++++++- .../arm/mve/intrinsics/vmvnq_m_s8.c | 33 ++++++++- .../arm/mve/intrinsics/vmvnq_m_u16.c | 33 ++++++++- .../arm/mve/intrinsics/vmvnq_m_u32.c | 33 ++++++++- .../arm/mve/intrinsics/vmvnq_m_u8.c | 33 ++++++++- .../arm/mve/intrinsics/vmvnq_n_s16.c | 17 ++++- .../arm/mve/intrinsics/vmvnq_n_s32.c | 19 +++++- .../arm/mve/intrinsics/vmvnq_n_u16.c | 19 +++++- .../arm/mve/intrinsics/vmvnq_n_u32.c | 19 +++++- .../gcc.target/arm/mve/intrinsics/vmvnq_s16.c | 28 ++++++-- .../gcc.target/arm/mve/intrinsics/vmvnq_s32.c | 28 ++++++-- .../gcc.target/arm/mve/intrinsics/vmvnq_s8.c | 24 ++++++- .../gcc.target/arm/mve/intrinsics/vmvnq_u16.c | 28 ++++++-- .../gcc.target/arm/mve/intrinsics/vmvnq_u32.c | 28 ++++++-- .../gcc.target/arm/mve/intrinsics/vmvnq_u8.c | 28 ++++++-- .../arm/mve/intrinsics/vmvnq_x_n_s16.c | 24 ++++++- .../arm/mve/intrinsics/vmvnq_x_n_s32.c | 24 ++++++- .../arm/mve/intrinsics/vmvnq_x_n_u16.c | 24 ++++++- .../arm/mve/intrinsics/vmvnq_x_n_u32.c | 24 ++++++- .../arm/mve/intrinsics/vmvnq_x_s16.c | 34 ++++++++-- .../arm/mve/intrinsics/vmvnq_x_s32.c | 34 ++++++++-- .../arm/mve/intrinsics/vmvnq_x_s8.c | 34 ++++++++-- .../arm/mve/intrinsics/vmvnq_x_u16.c | 34 ++++++++-- .../arm/mve/intrinsics/vmvnq_x_u32.c | 34 ++++++++-- .../arm/mve/intrinsics/vmvnq_x_u8.c | 34 ++++++++-- .../gcc.target/arm/mve/intrinsics/vornq_f16.c | 24 ++++++- .../gcc.target/arm/mve/intrinsics/vornq_f32.c | 24 ++++++- .../arm/mve/intrinsics/vornq_m_f16.c | 34 ++++++++-- .../arm/mve/intrinsics/vornq_m_f32.c | 34 ++++++++-- .../arm/mve/intrinsics/vornq_m_s16.c | 34 ++++++++-- .../arm/mve/intrinsics/vornq_m_s32.c | 34 ++++++++-- .../arm/mve/intrinsics/vornq_m_s8.c | 34 ++++++++-- .../arm/mve/intrinsics/vornq_m_u16.c | 34 ++++++++-- .../arm/mve/intrinsics/vornq_m_u32.c | 34 ++++++++-- .../arm/mve/intrinsics/vornq_m_u8.c | 34 ++++++++-- .../gcc.target/arm/mve/intrinsics/vornq_s16.c | 24 ++++++- .../gcc.target/arm/mve/intrinsics/vornq_s32.c | 24 ++++++- .../gcc.target/arm/mve/intrinsics/vornq_s8.c | 24 ++++++- .../gcc.target/arm/mve/intrinsics/vornq_u16.c | 24 ++++++- .../gcc.target/arm/mve/intrinsics/vornq_u32.c | 24 ++++++- .../gcc.target/arm/mve/intrinsics/vornq_u8.c | 24 ++++++- .../arm/mve/intrinsics/vornq_x_f16.c | 33 ++++++++- .../arm/mve/intrinsics/vornq_x_f32.c | 33 ++++++++- .../arm/mve/intrinsics/vornq_x_s16.c | 33 ++++++++- .../arm/mve/intrinsics/vornq_x_s32.c | 33 ++++++++- .../arm/mve/intrinsics/vornq_x_s8.c | 33 ++++++++- .../arm/mve/intrinsics/vornq_x_u16.c | 33 ++++++++- .../arm/mve/intrinsics/vornq_x_u32.c | 33 ++++++++- .../arm/mve/intrinsics/vornq_x_u8.c | 33 ++++++++- .../gcc.target/arm/mve/intrinsics/vorrq_f16.c | 24 ++++++- .../gcc.target/arm/mve/intrinsics/vorrq_f32.c | 24 ++++++- .../arm/mve/intrinsics/vorrq_m_f16.c | 34 ++++++++-- .../arm/mve/intrinsics/vorrq_m_f32.c | 34 ++++++++-- .../arm/mve/intrinsics/vorrq_m_n_s16.c | 37 ++++++++-- .../arm/mve/intrinsics/vorrq_m_n_s32.c | 33 ++++++++- .../arm/mve/intrinsics/vorrq_m_n_u16.c | 33 ++++++++- .../arm/mve/intrinsics/vorrq_m_n_u32.c | 33 ++++++++- .../arm/mve/intrinsics/vorrq_m_s16.c | 34 ++++++++-- .../arm/mve/intrinsics/vorrq_m_s32.c | 34 ++++++++-- .../arm/mve/intrinsics/vorrq_m_s8.c | 34 ++++++++-- .../arm/mve/intrinsics/vorrq_m_u16.c | 34 ++++++++-- .../arm/mve/intrinsics/vorrq_m_u32.c | 34 ++++++++-- .../arm/mve/intrinsics/vorrq_m_u8.c | 34 ++++++++-- .../arm/mve/intrinsics/vorrq_n_s16.c | 30 ++++++++- .../arm/mve/intrinsics/vorrq_n_s32.c | 30 ++++++++- .../arm/mve/intrinsics/vorrq_n_u16.c | 30 ++++++++- .../arm/mve/intrinsics/vorrq_n_u32.c | 32 ++++++++- .../gcc.target/arm/mve/intrinsics/vorrq_s16.c | 24 ++++++- .../gcc.target/arm/mve/intrinsics/vorrq_s32.c | 24 ++++++- .../gcc.target/arm/mve/intrinsics/vorrq_s8.c | 24 ++++++- .../gcc.target/arm/mve/intrinsics/vorrq_u16.c | 24 ++++++- .../gcc.target/arm/mve/intrinsics/vorrq_u32.c | 24 ++++++- .../gcc.target/arm/mve/intrinsics/vorrq_u8.c | 24 ++++++- .../arm/mve/intrinsics/vorrq_x_f16.c | 33 ++++++++- .../arm/mve/intrinsics/vorrq_x_f32.c | 33 ++++++++- .../arm/mve/intrinsics/vorrq_x_s16.c | 33 ++++++++- .../arm/mve/intrinsics/vorrq_x_s32.c | 33 ++++++++- .../arm/mve/intrinsics/vorrq_x_s8.c | 33 ++++++++- .../arm/mve/intrinsics/vorrq_x_u16.c | 33 ++++++++- .../arm/mve/intrinsics/vorrq_x_u32.c | 33 ++++++++- .../arm/mve/intrinsics/vorrq_x_u8.c | 33 ++++++++- .../gcc.target/arm/mve/intrinsics/vpnot.c | 25 +++++-- .../arm/mve/intrinsics/vpselq_f16.c | 28 +++++++- .../arm/mve/intrinsics/vpselq_f32.c | 28 +++++++- .../arm/mve/intrinsics/vpselq_s16.c | 28 +++++++- .../arm/mve/intrinsics/vpselq_s32.c | 28 +++++++- .../arm/mve/intrinsics/vpselq_s64.c | 28 +++++++- .../gcc.target/arm/mve/intrinsics/vpselq_s8.c | 28 +++++++- .../arm/mve/intrinsics/vpselq_u16.c | 28 +++++++- .../arm/mve/intrinsics/vpselq_u32.c | 28 +++++++- .../arm/mve/intrinsics/vpselq_u64.c | 28 +++++++- .../gcc.target/arm/mve/intrinsics/vpselq_u8.c | 28 +++++++- .../arm/mve/intrinsics/vqmovnbq_m_s16.c | 33 ++++++++- .../arm/mve/intrinsics/vqmovnbq_m_s32.c | 33 ++++++++- .../arm/mve/intrinsics/vqmovnbq_m_u16.c | 33 ++++++++- .../arm/mve/intrinsics/vqmovnbq_m_u32.c | 33 ++++++++- .../arm/mve/intrinsics/vqmovnbq_s16.c | 24 ++++++- .../arm/mve/intrinsics/vqmovnbq_s32.c | 24 ++++++- .../arm/mve/intrinsics/vqmovnbq_u16.c | 24 ++++++- .../arm/mve/intrinsics/vqmovnbq_u32.c | 24 ++++++- .../arm/mve/intrinsics/vqmovntq_m_s16.c | 33 ++++++++- .../arm/mve/intrinsics/vqmovntq_m_s32.c | 33 ++++++++- .../arm/mve/intrinsics/vqmovntq_m_u16.c | 33 ++++++++- .../arm/mve/intrinsics/vqmovntq_m_u32.c | 33 ++++++++- .../arm/mve/intrinsics/vqmovntq_s16.c | 24 ++++++- .../arm/mve/intrinsics/vqmovntq_s32.c | 24 ++++++- .../arm/mve/intrinsics/vqmovntq_u16.c | 24 ++++++- .../arm/mve/intrinsics/vqmovntq_u32.c | 24 ++++++- .../arm/mve/intrinsics/vqmovunbq_m_s16.c | 33 ++++++++- .../arm/mve/intrinsics/vqmovunbq_m_s32.c | 33 ++++++++- .../arm/mve/intrinsics/vqmovunbq_s16.c | 24 ++++++- .../arm/mve/intrinsics/vqmovunbq_s32.c | 24 ++++++- .../arm/mve/intrinsics/vqmovuntq_m_s16.c | 33 ++++++++- .../arm/mve/intrinsics/vqmovuntq_m_s32.c | 33 ++++++++- .../arm/mve/intrinsics/vqmovuntq_s16.c | 24 ++++++- .../arm/mve/intrinsics/vqmovuntq_s32.c | 24 ++++++- .../arm/mve/intrinsics/vqrdmladhq_m_s16.c | 2 +- .../arm/mve/intrinsics/vqrdmladhq_m_s32.c | 2 +- .../arm/mve/intrinsics/vqrdmladhq_m_s8.c | 2 +- .../arm/mve/intrinsics/vqrdmladhq_s16.c | 2 +- .../arm/mve/intrinsics/vqrdmladhq_s32.c | 2 +- .../arm/mve/intrinsics/vqrdmladhq_s8.c | 2 +- .../arm/mve/intrinsics/vqrdmladhxq_m_s16.c | 2 +- .../arm/mve/intrinsics/vqrdmladhxq_m_s32.c | 2 +- .../arm/mve/intrinsics/vqrdmladhxq_m_s8.c | 2 +- .../arm/mve/intrinsics/vqrdmladhxq_s16.c | 2 +- .../arm/mve/intrinsics/vqrdmladhxq_s32.c | 2 +- .../arm/mve/intrinsics/vqrdmladhxq_s8.c | 2 +- .../arm/mve/intrinsics/vqrdmlahq_m_n_s16.c | 2 +- .../arm/mve/intrinsics/vqrdmlahq_m_n_s32.c | 2 +- .../arm/mve/intrinsics/vqrdmlahq_m_n_s8.c | 2 +- .../arm/mve/intrinsics/vqrdmlahq_n_s16.c | 2 +- .../arm/mve/intrinsics/vqrdmlahq_n_s32.c | 2 +- .../arm/mve/intrinsics/vqrdmlahq_n_s8.c | 2 +- .../arm/mve/intrinsics/vqrdmlashq_m_n_s16.c | 2 +- .../arm/mve/intrinsics/vqrdmlashq_m_n_s32.c | 2 +- .../arm/mve/intrinsics/vqrdmlashq_m_n_s8.c | 2 +- .../arm/mve/intrinsics/vqrdmlashq_n_s16.c | 2 +- .../arm/mve/intrinsics/vqrdmlashq_n_s32.c | 2 +- .../arm/mve/intrinsics/vqrdmlashq_n_s8.c | 2 +- .../arm/mve/intrinsics/vqrdmlsdhq_m_s16.c | 2 +- .../arm/mve/intrinsics/vqrdmlsdhq_m_s32.c | 2 +- .../arm/mve/intrinsics/vqrdmlsdhq_m_s8.c | 2 +- .../arm/mve/intrinsics/vqrdmlsdhq_s16.c | 2 +- .../arm/mve/intrinsics/vqrdmlsdhq_s32.c | 2 +- .../arm/mve/intrinsics/vqrdmlsdhq_s8.c | 2 +- .../arm/mve/intrinsics/vqrdmlsdhxq_m_s16.c | 2 +- .../arm/mve/intrinsics/vqrdmlsdhxq_m_s32.c | 2 +- .../arm/mve/intrinsics/vqrdmlsdhxq_m_s8.c | 2 +- .../arm/mve/intrinsics/vqrdmlsdhxq_s16.c | 2 +- .../arm/mve/intrinsics/vqrdmlsdhxq_s32.c | 2 +- .../arm/mve/intrinsics/vqrdmlsdhxq_s8.c | 2 +- .../arm/mve/intrinsics/vqrdmulhq_m_n_s16.c | 2 +- .../arm/mve/intrinsics/vqrdmulhq_m_n_s32.c | 2 +- .../arm/mve/intrinsics/vqrdmulhq_m_n_s8.c | 2 +- .../arm/mve/intrinsics/vqrdmulhq_m_s16.c | 2 +- .../arm/mve/intrinsics/vqrdmulhq_m_s32.c | 2 +- .../arm/mve/intrinsics/vqrdmulhq_m_s8.c | 2 +- .../arm/mve/intrinsics/vqrdmulhq_n_s16.c | 2 +- .../arm/mve/intrinsics/vqrdmulhq_n_s32.c | 2 +- .../arm/mve/intrinsics/vqrdmulhq_n_s8.c | 2 +- .../arm/mve/intrinsics/vqrdmulhq_s16.c | 2 +- .../arm/mve/intrinsics/vqrdmulhq_s32.c | 2 +- .../arm/mve/intrinsics/vqrdmulhq_s8.c | 2 +- .../arm/mve/intrinsics/vqrshlq_m_n_s16.c | 33 ++++++++- .../arm/mve/intrinsics/vqrshlq_m_n_s32.c | 33 ++++++++- .../arm/mve/intrinsics/vqrshlq_m_n_s8.c | 33 ++++++++- .../arm/mve/intrinsics/vqrshlq_m_n_u16.c | 33 ++++++++- .../arm/mve/intrinsics/vqrshlq_m_n_u32.c | 33 ++++++++- .../arm/mve/intrinsics/vqrshlq_m_n_u8.c | 33 ++++++++- .../arm/mve/intrinsics/vqrshlq_m_s16.c | 34 ++++++++-- .../arm/mve/intrinsics/vqrshlq_m_s32.c | 34 ++++++++-- .../arm/mve/intrinsics/vqrshlq_m_s8.c | 34 ++++++++-- .../arm/mve/intrinsics/vqrshlq_m_u16.c | 34 ++++++++-- .../arm/mve/intrinsics/vqrshlq_m_u32.c | 34 ++++++++-- .../arm/mve/intrinsics/vqrshlq_m_u8.c | 34 ++++++++-- .../arm/mve/intrinsics/vqrshlq_n_s16.c | 24 ++++++- .../arm/mve/intrinsics/vqrshlq_n_s32.c | 24 ++++++- .../arm/mve/intrinsics/vqrshlq_n_s8.c | 24 ++++++- .../arm/mve/intrinsics/vqrshlq_n_u16.c | 24 ++++++- .../arm/mve/intrinsics/vqrshlq_n_u32.c | 24 ++++++- .../arm/mve/intrinsics/vqrshlq_n_u8.c | 24 ++++++- .../arm/mve/intrinsics/vqrshlq_s16.c | 24 ++++++- .../arm/mve/intrinsics/vqrshlq_s32.c | 24 ++++++- .../arm/mve/intrinsics/vqrshlq_s8.c | 24 ++++++- .../arm/mve/intrinsics/vqrshlq_u16.c | 24 ++++++- .../arm/mve/intrinsics/vqrshlq_u32.c | 24 ++++++- .../arm/mve/intrinsics/vqrshlq_u8.c | 24 ++++++- .../arm/mve/intrinsics/vqrshrnbq_m_n_s16.c | 34 ++++++++-- .../arm/mve/intrinsics/vqrshrnbq_m_n_s32.c | 34 ++++++++-- .../arm/mve/intrinsics/vqrshrnbq_m_n_u16.c | 34 ++++++++-- .../arm/mve/intrinsics/vqrshrnbq_m_n_u32.c | 34 ++++++++-- .../arm/mve/intrinsics/vqrshrnbq_n_s16.c | 24 ++++++- .../arm/mve/intrinsics/vqrshrnbq_n_s32.c | 24 ++++++- .../arm/mve/intrinsics/vqrshrnbq_n_u16.c | 24 ++++++- .../arm/mve/intrinsics/vqrshrnbq_n_u32.c | 24 ++++++- .../arm/mve/intrinsics/vqrshrntq_m_n_s16.c | 34 ++++++++-- .../arm/mve/intrinsics/vqrshrntq_m_n_s32.c | 34 ++++++++-- .../arm/mve/intrinsics/vqrshrntq_m_n_u16.c | 34 ++++++++-- .../arm/mve/intrinsics/vqrshrntq_m_n_u32.c | 34 ++++++++-- .../arm/mve/intrinsics/vqrshrntq_n_s16.c | 24 ++++++- .../arm/mve/intrinsics/vqrshrntq_n_s32.c | 24 ++++++- .../arm/mve/intrinsics/vqrshrntq_n_u16.c | 24 ++++++- .../arm/mve/intrinsics/vqrshrntq_n_u32.c | 24 ++++++- .../arm/mve/intrinsics/vqrshrunbq_m_n_s16.c | 34 ++++++++-- .../arm/mve/intrinsics/vqrshrunbq_m_n_s32.c | 34 ++++++++-- .../arm/mve/intrinsics/vqrshrunbq_n_s16.c | 24 ++++++- .../arm/mve/intrinsics/vqrshrunbq_n_s32.c | 24 ++++++- .../arm/mve/intrinsics/vqrshruntq_m_n_s16.c | 34 ++++++++-- .../arm/mve/intrinsics/vqrshruntq_m_n_s32.c | 34 ++++++++-- .../arm/mve/intrinsics/vqrshruntq_n_s16.c | 24 ++++++- .../arm/mve/intrinsics/vqrshruntq_n_s32.c | 24 ++++++- .../arm/mve/intrinsics/vqshlq_m_n_s16.c | 34 ++++++++-- .../arm/mve/intrinsics/vqshlq_m_n_s32.c | 34 ++++++++-- .../arm/mve/intrinsics/vqshlq_m_n_s8.c | 34 ++++++++-- .../arm/mve/intrinsics/vqshlq_m_n_u16.c | 34 ++++++++-- .../arm/mve/intrinsics/vqshlq_m_n_u32.c | 34 ++++++++-- .../arm/mve/intrinsics/vqshlq_m_n_u8.c | 34 ++++++++-- .../arm/mve/intrinsics/vqshlq_m_r_s16.c | 33 ++++++++- .../arm/mve/intrinsics/vqshlq_m_r_s32.c | 33 ++++++++- .../arm/mve/intrinsics/vqshlq_m_r_s8.c | 33 ++++++++- .../arm/mve/intrinsics/vqshlq_m_r_u16.c | 33 ++++++++- .../arm/mve/intrinsics/vqshlq_m_r_u32.c | 33 ++++++++- .../arm/mve/intrinsics/vqshlq_m_r_u8.c | 33 ++++++++- .../arm/mve/intrinsics/vqshlq_m_s16.c | 34 ++++++++-- .../arm/mve/intrinsics/vqshlq_m_s32.c | 34 ++++++++-- .../arm/mve/intrinsics/vqshlq_m_s8.c | 34 ++++++++-- .../arm/mve/intrinsics/vqshlq_m_u16.c | 34 ++++++++-- .../arm/mve/intrinsics/vqshlq_m_u32.c | 34 ++++++++-- .../arm/mve/intrinsics/vqshlq_m_u8.c | 34 ++++++++-- .../arm/mve/intrinsics/vqshlq_n_s16.c | 24 ++++++- .../arm/mve/intrinsics/vqshlq_n_s32.c | 24 ++++++- .../arm/mve/intrinsics/vqshlq_n_s8.c | 24 ++++++- .../arm/mve/intrinsics/vqshlq_n_u16.c | 24 ++++++- .../arm/mve/intrinsics/vqshlq_n_u32.c | 24 ++++++- .../arm/mve/intrinsics/vqshlq_n_u8.c | 24 ++++++- .../arm/mve/intrinsics/vqshlq_r_s16.c | 24 ++++++- .../arm/mve/intrinsics/vqshlq_r_s32.c | 24 ++++++- .../arm/mve/intrinsics/vqshlq_r_s8.c | 24 ++++++- .../arm/mve/intrinsics/vqshlq_r_u16.c | 24 ++++++- .../arm/mve/intrinsics/vqshlq_r_u32.c | 24 ++++++- .../arm/mve/intrinsics/vqshlq_r_u8.c | 24 ++++++- .../arm/mve/intrinsics/vqshlq_s16.c | 24 ++++++- .../arm/mve/intrinsics/vqshlq_s32.c | 24 ++++++- .../gcc.target/arm/mve/intrinsics/vqshlq_s8.c | 24 ++++++- .../arm/mve/intrinsics/vqshlq_u16.c | 24 ++++++- .../arm/mve/intrinsics/vqshlq_u32.c | 24 ++++++- .../gcc.target/arm/mve/intrinsics/vqshlq_u8.c | 24 ++++++- .../arm/mve/intrinsics/vqshluq_m_n_s16.c | 37 ++++++++-- .../arm/mve/intrinsics/vqshluq_m_n_s32.c | 37 ++++++++-- .../arm/mve/intrinsics/vqshluq_m_n_s8.c | 37 ++++++++-- .../arm/mve/intrinsics/vqshluq_n_s16.c | 28 ++++++-- .../arm/mve/intrinsics/vqshluq_n_s32.c | 28 ++++++-- .../arm/mve/intrinsics/vqshluq_n_s8.c | 28 ++++++-- .../arm/mve/intrinsics/vqshrnbq_m_n_s16.c | 38 +++++++++-- .../arm/mve/intrinsics/vqshrnbq_m_n_s32.c | 38 +++++++++-- .../arm/mve/intrinsics/vqshrnbq_m_n_u16.c | 34 ++++++++-- .../arm/mve/intrinsics/vqshrnbq_m_n_u32.c | 34 ++++++++-- .../arm/mve/intrinsics/vqshrnbq_n_s16.c | 24 ++++++- .../arm/mve/intrinsics/vqshrnbq_n_s32.c | 28 ++++++-- .../arm/mve/intrinsics/vqshrnbq_n_u16.c | 24 ++++++- .../arm/mve/intrinsics/vqshrnbq_n_u32.c | 28 ++++++-- .../arm/mve/intrinsics/vqshrntq_m_n_s16.c | 34 ++++++++-- .../arm/mve/intrinsics/vqshrntq_m_n_s32.c | 34 ++++++++-- .../arm/mve/intrinsics/vqshrntq_m_n_u16.c | 34 ++++++++-- .../arm/mve/intrinsics/vqshrntq_m_n_u32.c | 34 ++++++++-- .../arm/mve/intrinsics/vqshrntq_n_s16.c | 24 ++++++- .../arm/mve/intrinsics/vqshrntq_n_s32.c | 24 ++++++- .../arm/mve/intrinsics/vqshrntq_n_u16.c | 24 ++++++- .../arm/mve/intrinsics/vqshrntq_n_u32.c | 24 ++++++- .../arm/mve/intrinsics/vqshrunbq_m_n_s16.c | 34 ++++++++-- .../arm/mve/intrinsics/vqshrunbq_m_n_s32.c | 34 ++++++++-- .../arm/mve/intrinsics/vqshrunbq_n_s16.c | 24 ++++++- .../arm/mve/intrinsics/vqshrunbq_n_s32.c | 24 ++++++- .../arm/mve/intrinsics/vqshruntq_m_n_s16.c | 34 ++++++++-- .../arm/mve/intrinsics/vqshruntq_m_n_s32.c | 34 ++++++++-- .../arm/mve/intrinsics/vqshruntq_n_s16.c | 24 ++++++- .../arm/mve/intrinsics/vqshruntq_n_s32.c | 24 ++++++- .../arm/mve/intrinsics/vqsubq_m_n_s16.c | 2 +- .../arm/mve/intrinsics/vqsubq_m_n_s32.c | 2 +- .../arm/mve/intrinsics/vqsubq_m_n_s8.c | 2 +- .../arm/mve/intrinsics/vqsubq_m_n_u16.c | 2 +- .../arm/mve/intrinsics/vqsubq_m_n_u32.c | 2 +- .../arm/mve/intrinsics/vqsubq_m_n_u8.c | 2 +- .../arm/mve/intrinsics/vqsubq_m_s16.c | 2 +- .../arm/mve/intrinsics/vqsubq_m_s32.c | 2 +- .../arm/mve/intrinsics/vqsubq_m_s8.c | 2 +- .../arm/mve/intrinsics/vqsubq_m_u16.c | 2 +- .../arm/mve/intrinsics/vqsubq_m_u32.c | 2 +- .../arm/mve/intrinsics/vqsubq_m_u8.c | 2 +- .../arm/mve/intrinsics/vqsubq_n_s16.c | 2 +- .../arm/mve/intrinsics/vqsubq_n_s32.c | 2 +- .../arm/mve/intrinsics/vqsubq_n_s8.c | 2 +- .../arm/mve/intrinsics/vqsubq_n_u16.c | 2 +- .../arm/mve/intrinsics/vqsubq_n_u32.c | 2 +- .../arm/mve/intrinsics/vqsubq_n_u8.c | 2 +- .../arm/mve/intrinsics/vqsubq_s16.c | 2 +- .../arm/mve/intrinsics/vqsubq_s32.c | 2 +- .../gcc.target/arm/mve/intrinsics/vqsubq_s8.c | 2 +- .../arm/mve/intrinsics/vqsubq_u16.c | 2 +- .../arm/mve/intrinsics/vqsubq_u32.c | 2 +- .../gcc.target/arm/mve/intrinsics/vqsubq_u8.c | 2 +- .../arm/mve/intrinsics/vrev16q_m_s8.c | 33 ++++++++- .../arm/mve/intrinsics/vrev16q_m_u8.c | 33 ++++++++- .../arm/mve/intrinsics/vrev16q_s8.c | 24 ++++++- .../arm/mve/intrinsics/vrev16q_u8.c | 28 ++++++-- .../arm/mve/intrinsics/vrev16q_x_s8.c | 33 ++++++++- .../arm/mve/intrinsics/vrev16q_x_u8.c | 33 ++++++++- .../arm/mve/intrinsics/vrev32q_f16.c | 30 ++++++++- .../arm/mve/intrinsics/vrev32q_m_f16.c | 33 ++++++++- .../arm/mve/intrinsics/vrev32q_m_s16.c | 33 ++++++++- .../arm/mve/intrinsics/vrev32q_m_s8.c | 33 ++++++++- .../arm/mve/intrinsics/vrev32q_m_u16.c | 33 ++++++++- .../arm/mve/intrinsics/vrev32q_m_u8.c | 33 ++++++++- .../arm/mve/intrinsics/vrev32q_s16.c | 28 ++++++-- .../arm/mve/intrinsics/vrev32q_s8.c | 24 ++++++- .../arm/mve/intrinsics/vrev32q_u16.c | 28 ++++++-- .../arm/mve/intrinsics/vrev32q_u8.c | 28 ++++++-- .../arm/mve/intrinsics/vrev32q_x_f16.c | 33 ++++++++- .../arm/mve/intrinsics/vrev32q_x_s16.c | 33 ++++++++- .../arm/mve/intrinsics/vrev32q_x_s8.c | 33 ++++++++- .../arm/mve/intrinsics/vrev32q_x_u16.c | 33 ++++++++- .../arm/mve/intrinsics/vrev32q_x_u8.c | 33 ++++++++- .../arm/mve/intrinsics/vrev64q_f16.c | 30 ++++++++- .../arm/mve/intrinsics/vrev64q_f32.c | 30 ++++++++- .../arm/mve/intrinsics/vrev64q_m_f16.c | 33 ++++++++- .../arm/mve/intrinsics/vrev64q_m_f32.c | 33 ++++++++- .../arm/mve/intrinsics/vrev64q_m_s16.c | 33 ++++++++- .../arm/mve/intrinsics/vrev64q_m_s32.c | 33 ++++++++- .../arm/mve/intrinsics/vrev64q_m_s8.c | 33 ++++++++- .../arm/mve/intrinsics/vrev64q_m_u16.c | 33 ++++++++- .../arm/mve/intrinsics/vrev64q_m_u32.c | 33 ++++++++- .../arm/mve/intrinsics/vrev64q_m_u8.c | 33 ++++++++- .../arm/mve/intrinsics/vrev64q_s16.c | 24 ++++++- .../arm/mve/intrinsics/vrev64q_s32.c | 24 ++++++- .../arm/mve/intrinsics/vrev64q_s8.c | 24 ++++++- .../arm/mve/intrinsics/vrev64q_u16.c | 28 ++++++-- .../arm/mve/intrinsics/vrev64q_u32.c | 28 ++++++-- .../arm/mve/intrinsics/vrev64q_u8.c | 28 ++++++-- .../arm/mve/intrinsics/vrev64q_x_f16.c | 33 ++++++++- .../arm/mve/intrinsics/vrev64q_x_f32.c | 33 ++++++++- .../arm/mve/intrinsics/vrev64q_x_s16.c | 33 ++++++++- .../arm/mve/intrinsics/vrev64q_x_s32.c | 33 ++++++++- .../arm/mve/intrinsics/vrev64q_x_s8.c | 33 ++++++++- .../arm/mve/intrinsics/vrev64q_x_u16.c | 33 ++++++++- .../arm/mve/intrinsics/vrev64q_x_u32.c | 33 ++++++++- .../arm/mve/intrinsics/vrev64q_x_u8.c | 33 ++++++++- .../arm/mve/intrinsics/vrhaddq_m_s16.c | 34 ++++++++-- .../arm/mve/intrinsics/vrhaddq_m_s32.c | 34 ++++++++-- .../arm/mve/intrinsics/vrhaddq_m_s8.c | 34 ++++++++-- .../arm/mve/intrinsics/vrhaddq_m_u16.c | 34 ++++++++-- .../arm/mve/intrinsics/vrhaddq_m_u32.c | 34 ++++++++-- .../arm/mve/intrinsics/vrhaddq_m_u8.c | 34 ++++++++-- .../arm/mve/intrinsics/vrhaddq_s16.c | 24 ++++++- .../arm/mve/intrinsics/vrhaddq_s32.c | 24 ++++++- .../arm/mve/intrinsics/vrhaddq_s8.c | 24 ++++++- .../arm/mve/intrinsics/vrhaddq_u16.c | 24 ++++++- .../arm/mve/intrinsics/vrhaddq_u32.c | 24 ++++++- .../arm/mve/intrinsics/vrhaddq_u8.c | 24 ++++++- .../arm/mve/intrinsics/vrhaddq_x_s16.c | 33 ++++++++- .../arm/mve/intrinsics/vrhaddq_x_s32.c | 33 ++++++++- .../arm/mve/intrinsics/vrhaddq_x_s8.c | 33 ++++++++- .../arm/mve/intrinsics/vrhaddq_x_u16.c | 33 ++++++++- .../arm/mve/intrinsics/vrhaddq_x_u32.c | 33 ++++++++- .../arm/mve/intrinsics/vrhaddq_x_u8.c | 33 ++++++++- .../arm/mve/intrinsics/vrmlaldavhaq_p_s32.c | 2 +- .../arm/mve/intrinsics/vrmlaldavhaq_p_u32.c | 2 +- .../arm/mve/intrinsics/vrmlaldavhaq_s32.c | 2 +- .../arm/mve/intrinsics/vrmlaldavhaq_u32.c | 2 +- .../arm/mve/intrinsics/vrmlaldavhaxq_p_s32.c | 32 ++++++++- .../arm/mve/intrinsics/vrmlaldavhaxq_s32.c | 24 ++++++- .../arm/mve/intrinsics/vrmlaldavhq_p_s32.c | 32 ++++++++- .../arm/mve/intrinsics/vrmlaldavhq_p_u32.c | 32 ++++++++- .../arm/mve/intrinsics/vrmlaldavhq_s32.c | 24 ++++++- .../arm/mve/intrinsics/vrmlaldavhq_u32.c | 24 ++++++- .../arm/mve/intrinsics/vrmlaldavhxq_p_s32.c | 32 ++++++++- .../arm/mve/intrinsics/vrmlaldavhxq_s32.c | 24 ++++++- .../arm/mve/intrinsics/vrmlsldavhaq_p_s32.c | 32 ++++++++- .../arm/mve/intrinsics/vrmlsldavhaq_s32.c | 24 ++++++- .../arm/mve/intrinsics/vrmlsldavhaxq_p_s32.c | 32 ++++++++- .../arm/mve/intrinsics/vrmlsldavhaxq_s32.c | 24 ++++++- .../arm/mve/intrinsics/vrmlsldavhq_p_s32.c | 32 ++++++++- .../arm/mve/intrinsics/vrmlsldavhq_s32.c | 24 ++++++- .../arm/mve/intrinsics/vrmlsldavhxq_p_s32.c | 32 ++++++++- .../arm/mve/intrinsics/vrmlsldavhxq_s32.c | 24 ++++++- .../arm/mve/intrinsics/vrmulhq_m_s16.c | 34 ++++++++-- .../arm/mve/intrinsics/vrmulhq_m_s32.c | 34 ++++++++-- .../arm/mve/intrinsics/vrmulhq_m_s8.c | 34 ++++++++-- .../arm/mve/intrinsics/vrmulhq_m_u16.c | 34 ++++++++-- .../arm/mve/intrinsics/vrmulhq_m_u32.c | 34 ++++++++-- .../arm/mve/intrinsics/vrmulhq_m_u8.c | 34 ++++++++-- .../arm/mve/intrinsics/vrmulhq_s16.c | 24 ++++++- .../arm/mve/intrinsics/vrmulhq_s32.c | 24 ++++++- .../arm/mve/intrinsics/vrmulhq_s8.c | 24 ++++++- .../arm/mve/intrinsics/vrmulhq_u16.c | 24 ++++++- .../arm/mve/intrinsics/vrmulhq_u32.c | 24 ++++++- .../arm/mve/intrinsics/vrmulhq_u8.c | 24 ++++++- .../arm/mve/intrinsics/vrmulhq_x_s16.c | 33 ++++++++- .../arm/mve/intrinsics/vrmulhq_x_s32.c | 33 ++++++++- .../arm/mve/intrinsics/vrmulhq_x_s8.c | 33 ++++++++- .../arm/mve/intrinsics/vrmulhq_x_u16.c | 33 ++++++++- .../arm/mve/intrinsics/vrmulhq_x_u32.c | 33 ++++++++- .../arm/mve/intrinsics/vrmulhq_x_u8.c | 33 ++++++++- .../arm/mve/intrinsics/vrndaq_f16.c | 30 ++++++++- .../arm/mve/intrinsics/vrndaq_f32.c | 30 ++++++++- .../arm/mve/intrinsics/vrndaq_m_f16.c | 33 ++++++++- .../arm/mve/intrinsics/vrndaq_m_f32.c | 33 ++++++++- .../arm/mve/intrinsics/vrndaq_x_f16.c | 33 ++++++++- .../arm/mve/intrinsics/vrndaq_x_f32.c | 33 ++++++++- .../arm/mve/intrinsics/vrndmq_f16.c | 30 ++++++++- .../arm/mve/intrinsics/vrndmq_f32.c | 30 ++++++++- .../arm/mve/intrinsics/vrndmq_m_f16.c | 33 ++++++++- .../arm/mve/intrinsics/vrndmq_m_f32.c | 33 ++++++++- .../arm/mve/intrinsics/vrndmq_x_f16.c | 33 ++++++++- .../arm/mve/intrinsics/vrndmq_x_f32.c | 33 ++++++++- .../arm/mve/intrinsics/vrndnq_f16.c | 30 ++++++++- .../arm/mve/intrinsics/vrndnq_f32.c | 30 ++++++++- .../arm/mve/intrinsics/vrndnq_m_f16.c | 33 ++++++++- .../arm/mve/intrinsics/vrndnq_m_f32.c | 33 ++++++++- .../arm/mve/intrinsics/vrndnq_x_f16.c | 33 ++++++++- .../arm/mve/intrinsics/vrndnq_x_f32.c | 33 ++++++++- .../arm/mve/intrinsics/vrndpq_f16.c | 30 ++++++++- .../arm/mve/intrinsics/vrndpq_f32.c | 30 ++++++++- .../arm/mve/intrinsics/vrndpq_m_f16.c | 33 ++++++++- .../arm/mve/intrinsics/vrndpq_m_f32.c | 33 ++++++++- .../arm/mve/intrinsics/vrndpq_x_f16.c | 33 ++++++++- .../arm/mve/intrinsics/vrndpq_x_f32.c | 33 ++++++++- .../gcc.target/arm/mve/intrinsics/vrndq_f16.c | 30 ++++++++- .../gcc.target/arm/mve/intrinsics/vrndq_f32.c | 30 ++++++++- .../arm/mve/intrinsics/vrndq_m_f16.c | 33 ++++++++- .../arm/mve/intrinsics/vrndq_m_f32.c | 33 ++++++++- .../arm/mve/intrinsics/vrndq_x_f16.c | 33 ++++++++- .../arm/mve/intrinsics/vrndq_x_f32.c | 33 ++++++++- .../arm/mve/intrinsics/vrndxq_f16.c | 30 ++++++++- .../arm/mve/intrinsics/vrndxq_f32.c | 30 ++++++++- .../arm/mve/intrinsics/vrndxq_m_f16.c | 33 ++++++++- .../arm/mve/intrinsics/vrndxq_m_f32.c | 33 ++++++++- .../arm/mve/intrinsics/vrndxq_x_f16.c | 33 ++++++++- .../arm/mve/intrinsics/vrndxq_x_f32.c | 33 ++++++++- .../arm/mve/intrinsics/vrshrnbq_m_n_s16.c | 34 ++++++++-- .../arm/mve/intrinsics/vrshrnbq_m_n_s32.c | 34 ++++++++-- .../arm/mve/intrinsics/vrshrnbq_m_n_u16.c | 34 ++++++++-- .../arm/mve/intrinsics/vrshrnbq_m_n_u32.c | 34 ++++++++-- .../arm/mve/intrinsics/vrshrnbq_n_s16.c | 24 ++++++- .../arm/mve/intrinsics/vrshrnbq_n_s32.c | 24 ++++++- .../arm/mve/intrinsics/vrshrnbq_n_u16.c | 24 ++++++- .../arm/mve/intrinsics/vrshrnbq_n_u32.c | 24 ++++++- .../arm/mve/intrinsics/vrshrntq_m_n_s16.c | 34 ++++++++-- .../arm/mve/intrinsics/vrshrntq_m_n_s32.c | 34 ++++++++-- .../arm/mve/intrinsics/vrshrntq_m_n_u16.c | 34 ++++++++-- .../arm/mve/intrinsics/vrshrntq_m_n_u32.c | 34 ++++++++-- .../arm/mve/intrinsics/vrshrntq_n_s16.c | 24 ++++++- .../arm/mve/intrinsics/vrshrntq_n_s32.c | 24 ++++++- .../arm/mve/intrinsics/vrshrntq_n_u16.c | 24 ++++++- .../arm/mve/intrinsics/vrshrntq_n_u32.c | 24 ++++++- .../arm/mve/intrinsics/vrshrq_m_n_s16.c | 38 +++++++++-- .../arm/mve/intrinsics/vrshrq_m_n_s32.c | 38 +++++++++-- .../arm/mve/intrinsics/vrshrq_m_n_s8.c | 38 +++++++++-- .../arm/mve/intrinsics/vrshrq_m_n_u16.c | 38 +++++++++-- .../arm/mve/intrinsics/vrshrq_m_n_u32.c | 38 +++++++++-- .../arm/mve/intrinsics/vrshrq_m_n_u8.c | 38 +++++++++-- .../arm/mve/intrinsics/vrshrq_n_s16.c | 28 ++++++-- .../arm/mve/intrinsics/vrshrq_n_s32.c | 28 ++++++-- .../arm/mve/intrinsics/vrshrq_n_s8.c | 28 ++++++-- .../arm/mve/intrinsics/vrshrq_n_u16.c | 28 ++++++-- .../arm/mve/intrinsics/vrshrq_n_u32.c | 28 ++++++-- .../arm/mve/intrinsics/vrshrq_n_u8.c | 28 ++++++-- .../arm/mve/intrinsics/vrshrq_x_n_s16.c | 38 +++++++++-- .../arm/mve/intrinsics/vrshrq_x_n_s32.c | 38 +++++++++-- .../arm/mve/intrinsics/vrshrq_x_n_s8.c | 38 +++++++++-- .../arm/mve/intrinsics/vrshrq_x_n_u16.c | 38 +++++++++-- .../arm/mve/intrinsics/vrshrq_x_n_u32.c | 38 +++++++++-- .../arm/mve/intrinsics/vrshrq_x_n_u8.c | 38 +++++++++-- .../arm/mve/intrinsics/vsbciq_m_s32.c | 50 ++++++++++++-- .../arm/mve/intrinsics/vsbciq_m_u32.c | 50 ++++++++++++-- .../arm/mve/intrinsics/vsbciq_s32.c | 42 ++++++++++-- .../arm/mve/intrinsics/vsbciq_u32.c | 42 ++++++++++-- .../arm/mve/intrinsics/vsbcq_m_s32.c | 66 +++++++++++++++--- .../arm/mve/intrinsics/vsbcq_m_u32.c | 67 ++++++++++++++++--- .../gcc.target/arm/mve/intrinsics/vsbcq_s32.c | 52 ++++++++++++-- .../gcc.target/arm/mve/intrinsics/vsbcq_u32.c | 52 ++++++++++++-- .../arm/mve/intrinsics/vshlcq_m_s16.c | 42 +++++++++--- .../arm/mve/intrinsics/vshlcq_m_s32.c | 38 +++++++++-- .../arm/mve/intrinsics/vshlcq_m_s8.c | 38 +++++++++-- .../arm/mve/intrinsics/vshlcq_m_u16.c | 38 +++++++++-- .../arm/mve/intrinsics/vshlcq_m_u32.c | 38 +++++++++-- .../arm/mve/intrinsics/vshlcq_m_u8.c | 38 +++++++++-- .../arm/mve/intrinsics/vshlcq_s16.c | 28 ++++++-- .../arm/mve/intrinsics/vshlcq_s32.c | 28 ++++++-- .../gcc.target/arm/mve/intrinsics/vshlcq_s8.c | 28 ++++++-- .../arm/mve/intrinsics/vshlcq_u16.c | 28 ++++++-- .../arm/mve/intrinsics/vshlcq_u32.c | 28 ++++++-- .../gcc.target/arm/mve/intrinsics/vshlcq_u8.c | 28 ++++++-- .../arm/mve/intrinsics/vshllbq_m_n_s16.c | 34 ++++++++-- .../arm/mve/intrinsics/vshllbq_m_n_s8.c | 34 ++++++++-- .../arm/mve/intrinsics/vshllbq_m_n_u16.c | 34 ++++++++-- .../arm/mve/intrinsics/vshllbq_m_n_u8.c | 34 ++++++++-- .../arm/mve/intrinsics/vshllbq_n_s16.c | 24 ++++++- .../arm/mve/intrinsics/vshllbq_n_s8.c | 24 ++++++- .../arm/mve/intrinsics/vshllbq_n_u16.c | 24 ++++++- .../arm/mve/intrinsics/vshllbq_n_u8.c | 24 ++++++- .../arm/mve/intrinsics/vshllbq_x_n_s16.c | 40 ++++++++++- .../arm/mve/intrinsics/vshllbq_x_n_s8.c | 40 ++++++++++- .../arm/mve/intrinsics/vshllbq_x_n_u16.c | 40 ++++++++++- .../arm/mve/intrinsics/vshllbq_x_n_u8.c | 40 ++++++++++- .../arm/mve/intrinsics/vshlltq_m_n_s16.c | 34 ++++++++-- .../arm/mve/intrinsics/vshlltq_m_n_s8.c | 34 ++++++++-- .../arm/mve/intrinsics/vshlltq_m_n_u16.c | 34 ++++++++-- .../arm/mve/intrinsics/vshlltq_m_n_u8.c | 34 ++++++++-- .../arm/mve/intrinsics/vshlltq_n_s16.c | 24 ++++++- .../arm/mve/intrinsics/vshlltq_n_s8.c | 24 ++++++- .../arm/mve/intrinsics/vshlltq_n_u16.c | 24 ++++++- .../arm/mve/intrinsics/vshlltq_n_u8.c | 24 ++++++- .../arm/mve/intrinsics/vshlltq_x_n_s16.c | 40 ++++++++++- .../arm/mve/intrinsics/vshlltq_x_n_s8.c | 40 ++++++++++- .../arm/mve/intrinsics/vshlltq_x_n_u16.c | 40 ++++++++++- .../arm/mve/intrinsics/vshlltq_x_n_u8.c | 40 ++++++++++- .../arm/mve/intrinsics/vshlq_m_n_s16.c | 34 ++++++++-- .../arm/mve/intrinsics/vshlq_m_n_s32.c | 34 ++++++++-- .../arm/mve/intrinsics/vshlq_m_n_s8.c | 34 ++++++++-- .../arm/mve/intrinsics/vshlq_m_n_u16.c | 34 ++++++++-- .../arm/mve/intrinsics/vshlq_m_n_u32.c | 34 ++++++++-- .../arm/mve/intrinsics/vshlq_m_n_u8.c | 34 ++++++++-- .../arm/mve/intrinsics/vshlq_m_r_s16.c | 33 ++++++++- .../arm/mve/intrinsics/vshlq_m_r_s32.c | 33 ++++++++- .../arm/mve/intrinsics/vshlq_m_r_s8.c | 33 ++++++++- .../arm/mve/intrinsics/vshlq_m_r_u16.c | 33 ++++++++- .../arm/mve/intrinsics/vshlq_m_r_u32.c | 33 ++++++++- .../arm/mve/intrinsics/vshlq_m_r_u8.c | 33 ++++++++- .../arm/mve/intrinsics/vshlq_m_s16.c | 33 ++++++++- .../arm/mve/intrinsics/vshlq_m_s32.c | 33 ++++++++- .../arm/mve/intrinsics/vshlq_m_s8.c | 33 ++++++++- .../arm/mve/intrinsics/vshlq_m_u16.c | 33 ++++++++- .../arm/mve/intrinsics/vshlq_m_u32.c | 33 ++++++++- .../arm/mve/intrinsics/vshlq_m_u8.c | 33 ++++++++- .../arm/mve/intrinsics/vshlq_n_s16.c | 24 ++++++- .../arm/mve/intrinsics/vshlq_n_s32.c | 28 ++++++-- .../arm/mve/intrinsics/vshlq_n_s8.c | 24 ++++++- .../arm/mve/intrinsics/vshlq_n_u16.c | 28 ++++++-- .../arm/mve/intrinsics/vshlq_n_u32.c | 24 ++++++- .../arm/mve/intrinsics/vshlq_n_u8.c | 24 ++++++- .../arm/mve/intrinsics/vshlq_r_s16.c | 24 ++++++- .../arm/mve/intrinsics/vshlq_r_s32.c | 24 ++++++- .../arm/mve/intrinsics/vshlq_r_s8.c | 24 ++++++- .../arm/mve/intrinsics/vshlq_r_u16.c | 24 ++++++- .../arm/mve/intrinsics/vshlq_r_u32.c | 24 ++++++- .../arm/mve/intrinsics/vshlq_r_u8.c | 24 ++++++- .../gcc.target/arm/mve/intrinsics/vshlq_s16.c | 24 ++++++- .../gcc.target/arm/mve/intrinsics/vshlq_s32.c | 24 ++++++- .../gcc.target/arm/mve/intrinsics/vshlq_s8.c | 24 ++++++- .../gcc.target/arm/mve/intrinsics/vshlq_u16.c | 24 ++++++- .../gcc.target/arm/mve/intrinsics/vshlq_u32.c | 24 ++++++- .../gcc.target/arm/mve/intrinsics/vshlq_u8.c | 24 ++++++- .../arm/mve/intrinsics/vshlq_x_n_s16.c | 40 ++++++++++- .../arm/mve/intrinsics/vshlq_x_n_s32.c | 40 ++++++++++- .../arm/mve/intrinsics/vshlq_x_n_s8.c | 40 ++++++++++- .../arm/mve/intrinsics/vshlq_x_n_u16.c | 40 ++++++++++- .../arm/mve/intrinsics/vshlq_x_n_u32.c | 40 ++++++++++- .../arm/mve/intrinsics/vshlq_x_n_u8.c | 40 ++++++++++- .../arm/mve/intrinsics/vshlq_x_s16.c | 40 ++++++++++- .../arm/mve/intrinsics/vshlq_x_s32.c | 40 ++++++++++- .../arm/mve/intrinsics/vshlq_x_s8.c | 40 ++++++++++- .../arm/mve/intrinsics/vshlq_x_u16.c | 40 ++++++++++- .../arm/mve/intrinsics/vshlq_x_u32.c | 40 ++++++++++- .../arm/mve/intrinsics/vshlq_x_u8.c | 40 ++++++++++- .../arm/mve/intrinsics/vshrnbq_m_n_s16.c | 38 +++++++++-- .../arm/mve/intrinsics/vshrnbq_m_n_s32.c | 38 +++++++++-- .../arm/mve/intrinsics/vshrnbq_m_n_u16.c | 38 +++++++++-- .../arm/mve/intrinsics/vshrnbq_m_n_u32.c | 38 +++++++++-- .../arm/mve/intrinsics/vshrnbq_n_s16.c | 28 ++++++-- .../arm/mve/intrinsics/vshrnbq_n_s32.c | 28 ++++++-- .../arm/mve/intrinsics/vshrnbq_n_u16.c | 28 ++++++-- .../arm/mve/intrinsics/vshrnbq_n_u32.c | 28 ++++++-- .../arm/mve/intrinsics/vshrntq_m_n_s16.c | 38 +++++++++-- .../arm/mve/intrinsics/vshrntq_m_n_s32.c | 38 +++++++++-- .../arm/mve/intrinsics/vshrntq_m_n_u16.c | 38 +++++++++-- .../arm/mve/intrinsics/vshrntq_m_n_u32.c | 38 +++++++++-- .../arm/mve/intrinsics/vshrntq_n_s16.c | 28 ++++++-- .../arm/mve/intrinsics/vshrntq_n_s32.c | 28 ++++++-- .../arm/mve/intrinsics/vshrntq_n_u16.c | 28 ++++++-- .../arm/mve/intrinsics/vshrntq_n_u32.c | 28 ++++++-- .../arm/mve/intrinsics/vshrq_m_n_s16.c | 38 +++++++++-- .../arm/mve/intrinsics/vshrq_m_n_s32.c | 38 +++++++++-- .../arm/mve/intrinsics/vshrq_m_n_s8.c | 38 +++++++++-- .../arm/mve/intrinsics/vshrq_m_n_u16.c | 38 +++++++++-- .../arm/mve/intrinsics/vshrq_m_n_u32.c | 38 +++++++++-- .../arm/mve/intrinsics/vshrq_m_n_u8.c | 38 +++++++++-- .../arm/mve/intrinsics/vshrq_n_s16.c | 28 ++++++-- .../arm/mve/intrinsics/vshrq_n_s32.c | 28 ++++++-- .../arm/mve/intrinsics/vshrq_n_s8.c | 28 ++++++-- .../arm/mve/intrinsics/vshrq_n_u16.c | 28 ++++++-- .../arm/mve/intrinsics/vshrq_n_u32.c | 28 ++++++-- .../arm/mve/intrinsics/vshrq_n_u8.c | 28 ++++++-- .../arm/mve/intrinsics/vshrq_x_n_s16.c | 40 ++++++++++- .../arm/mve/intrinsics/vshrq_x_n_s32.c | 40 ++++++++++- .../arm/mve/intrinsics/vshrq_x_n_s8.c | 40 ++++++++++- .../arm/mve/intrinsics/vshrq_x_n_u16.c | 40 ++++++++++- .../arm/mve/intrinsics/vshrq_x_n_u8.c | 40 ++++++++++- .../arm/mve/intrinsics/vsliq_m_n_s16.c | 38 +++++++++-- .../arm/mve/intrinsics/vsliq_m_n_s32.c | 38 +++++++++-- .../arm/mve/intrinsics/vsliq_m_n_s8.c | 38 +++++++++-- .../arm/mve/intrinsics/vsliq_m_n_u16.c | 38 +++++++++-- .../arm/mve/intrinsics/vsliq_m_n_u32.c | 38 +++++++++-- .../arm/mve/intrinsics/vsliq_m_n_u8.c | 38 +++++++++-- .../arm/mve/intrinsics/vsliq_n_s16.c | 28 ++++++-- .../arm/mve/intrinsics/vsliq_n_s32.c | 28 ++++++-- .../arm/mve/intrinsics/vsliq_n_s8.c | 28 ++++++-- .../arm/mve/intrinsics/vsliq_n_u16.c | 28 ++++++-- .../arm/mve/intrinsics/vsliq_n_u32.c | 28 ++++++-- .../arm/mve/intrinsics/vsliq_n_u8.c | 28 ++++++-- .../arm/mve/intrinsics/vsriq_m_n_s16.c | 37 ++++++++-- .../arm/mve/intrinsics/vsriq_m_n_s32.c | 37 ++++++++-- .../arm/mve/intrinsics/vsriq_m_n_s8.c | 37 ++++++++-- .../arm/mve/intrinsics/vsriq_m_n_u16.c | 37 ++++++++-- .../arm/mve/intrinsics/vsriq_m_n_u32.c | 37 ++++++++-- .../arm/mve/intrinsics/vsriq_m_n_u8.c | 37 ++++++++-- .../arm/mve/intrinsics/vsriq_n_s16.c | 28 ++++++-- .../arm/mve/intrinsics/vsriq_n_s32.c | 28 ++++++-- .../arm/mve/intrinsics/vsriq_n_s8.c | 28 ++++++-- .../arm/mve/intrinsics/vsriq_n_u16.c | 28 ++++++-- .../arm/mve/intrinsics/vsriq_n_u32.c | 28 ++++++-- .../arm/mve/intrinsics/vsriq_n_u8.c | 28 ++++++-- .../gcc.target/arm/mve/intrinsics/vst1q_f16.c | 36 +++++++--- .../gcc.target/arm/mve/intrinsics/vst1q_f32.c | 32 +++++++-- .../arm/mve/intrinsics/vst1q_p_f16.c | 40 +++++++++-- .../arm/mve/intrinsics/vst1q_p_f32.c | 40 +++++++++-- .../arm/mve/intrinsics/vst1q_p_s16.c | 40 +++++++++-- .../arm/mve/intrinsics/vst1q_p_s32.c | 40 +++++++++-- .../arm/mve/intrinsics/vst1q_p_s8.c | 40 +++++++++-- .../arm/mve/intrinsics/vst1q_p_u16.c | 40 +++++++++-- .../arm/mve/intrinsics/vst1q_p_u32.c | 40 +++++++++-- .../arm/mve/intrinsics/vst1q_p_u8.c | 40 +++++++++-- .../gcc.target/arm/mve/intrinsics/vst1q_s16.c | 36 +++++++--- .../gcc.target/arm/mve/intrinsics/vst1q_s32.c | 32 +++++++-- .../gcc.target/arm/mve/intrinsics/vst1q_s8.c | 36 +++++++--- .../gcc.target/arm/mve/intrinsics/vst1q_u16.c | 36 +++++++--- .../gcc.target/arm/mve/intrinsics/vst1q_u32.c | 32 +++++++-- .../gcc.target/arm/mve/intrinsics/vst1q_u8.c | 36 +++++++--- .../intrinsics/vstrdq_scatter_base_p_s64.c | 40 +++++++++-- .../intrinsics/vstrdq_scatter_base_p_u64.c | 40 +++++++++-- .../mve/intrinsics/vstrdq_scatter_base_s64.c | 32 +++++++-- .../mve/intrinsics/vstrdq_scatter_base_u64.c | 32 +++++++-- .../intrinsics/vstrdq_scatter_base_wb_p_s64.c | 40 +++++++++-- .../intrinsics/vstrdq_scatter_base_wb_p_u64.c | 40 +++++++++-- .../intrinsics/vstrdq_scatter_base_wb_s64.c | 32 +++++++-- .../intrinsics/vstrdq_scatter_base_wb_u64.c | 32 +++++++-- .../intrinsics/vstrdq_scatter_offset_p_s64.c | 40 +++++++++-- .../intrinsics/vstrdq_scatter_offset_p_u64.c | 40 +++++++++-- .../intrinsics/vstrdq_scatter_offset_s64.c | 32 +++++++-- .../intrinsics/vstrdq_scatter_offset_u64.c | 32 +++++++-- .../vstrdq_scatter_shifted_offset_p_s64.c | 40 +++++++++-- .../vstrdq_scatter_shifted_offset_p_u64.c | 40 +++++++++-- .../vstrdq_scatter_shifted_offset_s64.c | 32 +++++++-- .../vstrdq_scatter_shifted_offset_u64.c | 32 +++++++-- 1069 files changed, 27416 insertions(+), 3493 deletions(-) diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md index 96dac5b02ecb..65d8b4b6c4eb 100644 --- a/gcc/config/arm/mve.md +++ b/gcc/config/arm/mve.md @@ -213,7 +213,7 @@ VCVTTQ_F32_F16)) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vcvtt.f32.f16 %q0, %q1" + "vcvtt.f32.f16\t%q0, %q1" [(set_attr "type" "mve_move") ]) @@ -227,7 +227,7 @@ VCVTBQ_F32_F16)) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vcvtb.f32.f16 %q0, %q1" + "vcvtb.f32.f16\t%q0, %q1" [(set_attr "type" "mve_move") ]) @@ -241,7 +241,7 @@ VCVTQ_TO_F)) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vcvt.f%#.%# %q0, %q1" + "vcvt.f%#.%#\t%q0, %q1" [(set_attr "type" "mve_move") ]) @@ -269,7 +269,7 @@ VCVTQ_FROM_F)) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vcvt.%#.f%# %q0, %q1" + "vcvt.%#.f%#\t%q0, %q1" [(set_attr "type" "mve_move") ]) @@ -410,7 +410,7 @@ VCVTPQ)) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vcvtp.%#.f%# %q0, %q1" + "vcvtp.%#.f%#\t%q0, %q1" [(set_attr "type" "mve_move") ]) @@ -424,7 +424,7 @@ VCVTNQ)) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vcvtn.%#.f%# %q0, %q1" + "vcvtn.%#.f%#\t%q0, %q1" [(set_attr "type" "mve_move") ]) @@ -438,7 +438,7 @@ VCVTMQ)) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vcvtm.%#.f%# %q0, %q1" + "vcvtm.%#.f%#\t%q0, %q1" [(set_attr "type" "mve_move") ]) @@ -452,7 +452,7 @@ VCVTAQ)) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vcvta.%#.f%# %q0, %q1" + "vcvta.%#.f%#\t%q0, %q1" [(set_attr "type" "mve_move") ]) @@ -508,7 +508,7 @@ VCTP)) ] "TARGET_HAVE_MVE" - "vctp. %1" + "vctp.\t%1" [(set_attr "type" "mve_move") ]) @@ -1219,7 +1219,7 @@ (match_operand:MVE_0 2 "s_register_operand" "w"))) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vand %q0, %q1, %q2" + "vand\t%q0, %q1, %q2" [(set_attr "type" "mve_move") ]) @@ -1233,7 +1233,7 @@ (match_operand:MVE_0 2 "s_register_operand" "w"))) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vbic %q0, %q1, %q2" + "vbic\t%q0, %q1, %q2" [(set_attr "type" "mve_move") ]) @@ -1307,7 +1307,7 @@ VCTP_M)) ] "TARGET_HAVE_MVE" - "vpst\;vctpt. %1" + "vpst\;vctpt.\t%1" [(set_attr "type" "mve_move") (set_attr "length""8")]) @@ -1322,7 +1322,7 @@ VCVTBQ_F16_F32)) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vcvtb.f16.f32 %q0, %q2" + "vcvtb.f16.f32\t%q0, %q2" [(set_attr "type" "mve_move") ]) @@ -1337,7 +1337,7 @@ VCVTTQ_F16_F32)) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vcvtt.f16.f32 %q0, %q2" + "vcvtt.f16.f32\t%q0, %q2" [(set_attr "type" "mve_move") ]) @@ -1351,7 +1351,7 @@ (match_operand:MVE_0 2 "s_register_operand" "w"))) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "veor %q0, %q1, %q2" + "veor\t%q0, %q1, %q2" [(set_attr "type" "mve_move") ]) @@ -1468,7 +1468,7 @@ (match_operand:MVE_0 1 "s_register_operand" "w"))) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vorn %q0, %q1, %q2" + "vorn\t%q0, %q1, %q2" [(set_attr "type" "mve_move") ]) @@ -1482,7 +1482,7 @@ (match_operand:MVE_0 2 "s_register_operand" "w"))) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vorr %q0, %q1, %q2" + "vorr\t%q0, %q1, %q2" [(set_attr "type" "mve_move") ]) @@ -1645,7 +1645,7 @@ VCVTQ_M_TO_F)) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vpst\;vcvtt.f%#.%# %q0, %q2" + "vpst\;vcvtt.f%#.%#\t%q0, %q2" [(set_attr "type" "mve_move") (set_attr "length""8")]) @@ -1754,7 +1754,7 @@ (match_dup 4)] VSHLCQ))] "TARGET_HAVE_MVE" - "vshlc %q0, %1, %4") + "vshlc\t%q0, %1, %4") ;; ;; [vabsq_m_s] @@ -2177,7 +2177,7 @@ VCVTBQ_M_F16_F32)) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vpst\;vcvtbt.f16.f32 %q0, %q2" + "vpst\;vcvtbt.f16.f32\t%q0, %q2" [(set_attr "type" "mve_move") (set_attr "length""8")]) @@ -2193,7 +2193,7 @@ VCVTBQ_M_F32_F16)) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vpst\;vcvtbt.f32.f16 %q0, %q2" + "vpst\;vcvtbt.f32.f16\t%q0, %q2" [(set_attr "type" "mve_move") (set_attr "length""8")]) @@ -2209,7 +2209,7 @@ VCVTTQ_M_F16_F32)) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vpst\;vcvttt.f16.f32 %q0, %q2" + "vpst\;vcvttt.f16.f32\t%q0, %q2" [(set_attr "type" "mve_move") (set_attr "length""8")]) @@ -2225,7 +2225,7 @@ VCVTTQ_M_F32_F16)) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vpst\;vcvttt.f32.f16 %q0, %q2" + "vpst\;vcvttt.f32.f16\t%q0, %q2" [(set_attr "type" "mve_move") (set_attr "length""8")]) @@ -2420,7 +2420,7 @@ MVE_INT_M_N_BINARY_LOGIC)) ] "TARGET_HAVE_MVE" - "vpst\;t.i%# %q0, %2" + "vpst\;t.i%#\t%q0, %2" [(set_attr "type" "mve_move") (set_attr "length""8")]) @@ -2746,7 +2746,7 @@ MVE_INT_M_BINARY)) ] "TARGET_HAVE_MVE" - "vpst\;t.i%# %q0, %q2, %q3" + "vpst\;t.i%#\t%q0, %q2, %q3" [(set_attr "type" "mve_move") (set_attr "length""8")]) @@ -2766,7 +2766,7 @@ MVE_INT_M_BINARY_LOGIC)) ] "TARGET_HAVE_MVE" - "vpst\;t %q0, %q2, %q3" + "vpst\;t\t%q0, %q2, %q3" [(set_attr "type" "mve_move") (set_attr "length""8")]) @@ -2917,7 +2917,7 @@ VORNQ_M)) ] "TARGET_HAVE_MVE" - "vpst\;vornt %q0, %q2, %q3" + "vpst\;vornt\t%q0, %q2, %q3" [(set_attr "type" "mve_move") (set_attr "length""8")]) @@ -3225,7 +3225,7 @@ MVE_FP_M_BINARY_LOGIC)) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vpst\;t %q0, %q2, %q3" + "vpst\;t\t%q0, %q2, %q3" [(set_attr "type" "mve_move") (set_attr "length""8")]) @@ -3429,7 +3429,7 @@ VORNQ_M_F)) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" - "vpst\;vornt %q0, %q2, %q3" + "vpst\;vornt\t%q0, %q2, %q3" [(set_attr "type" "mve_move") (set_attr "length""8")]) @@ -4838,7 +4838,7 @@ (match_operand:V2QI 3 "vpr_register_operand" "Up")] VSTRDSSOQ))] "TARGET_HAVE_MVE" - "vpst\;vstrdt.64\t%q2, [%0, %q1, UXTW #3]" + "vpst\;vstrdt.64\t%q2, [%0, %q1, uxtw #3]" [(set_attr "length" "8")]) ;; @@ -4867,7 +4867,7 @@ (match_operand:V2DI 2 "s_register_operand" "w")] VSTRDSSOQ))] "TARGET_HAVE_MVE" - "vstrd.64\t%q2, [%0, %q1, UXTW #3]" + "vstrd.64\t%q2, [%0, %q1, uxtw #3]" [(set_attr "length" "4")]) ;; @@ -5791,7 +5791,7 @@ ops[0] = operands[1]; ops[1] = operands[2]; ops[2] = operands[3]; - output_asm_insn ("vpst;vstrdt.u64\t%q2, [%q0, %1]!",ops); + output_asm_insn ("vpst\;vstrdt.u64\t%q2, [%q0, %1]!",ops); return ""; } [(set_attr "length" "8")]) diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/asrl.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/asrl.c index a2d5160e518b..1aa576afae36 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/asrl.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/asrl.c @@ -1,13 +1,28 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** asrl (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int64_t -asrl_reg (int64_t longval3, int32_t x) +foo (int64_t value, int32_t shift) { - return asrl (longval3, x); + return asrl (value, shift); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "asrl\\tr\[0-9\]+, r\[0-9\]+, r\[0-9\]+" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/lsll.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/lsll.c index 9c1b62fb9f27..5542ac8c3163 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/lsll.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/lsll.c @@ -1,13 +1,40 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** lsll (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint64_t -lsll_reg (uint64_t longval3, int32_t x) +foo (uint64_t value, int32_t shift) { - return lsll (longval3, x); + return lsll (value, shift); +} + +/* +**foo1: +** ... +** lsll (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +uint64_t +foo1 (int32_t shift) +{ + return lsll (1, shift); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "lsll\\tr\[0-9\]+, r\[0-9\]+, r\[0-9\]+" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/sqrshr.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/sqrshr.c index 1f0a228e4b49..ea8c7a0ce4a5 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/sqrshr.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/sqrshr.c @@ -1,13 +1,28 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** sqrshr (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int32_t -sqrshr_reg (int32_t longval3, int32_t x) +foo (int32_t value, int32_t shift) { - return sqrshr (longval3, x); + return sqrshr (value, shift); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "sqrshr\\tr\[0-9\]+, r\[0-9\]+" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/sqrshrl_sat48.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/sqrshrl_sat48.c index 2f1612cde77b..affa12c526d8 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/sqrshrl_sat48.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/sqrshrl_sat48.c @@ -1,13 +1,28 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** sqrshrl (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #48, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int64_t -sqrshrl_reg (int64_t longval3, int32_t x) +foo (int64_t value, int32_t shift) { - return sqrshrl_sat48 (longval3, x); + return sqrshrl_sat48 (value, shift); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "sqrshrl\\tr\[0-9\]+, r\[0-9\]+, #48, r\[0-9\]+" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/sqshl.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/sqshl.c index 8cb8c74b2686..e8c9c4411638 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/sqshl.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/sqshl.c @@ -1,13 +1,28 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** sqshl (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +** ... +*/ int32_t -sqshl_imm (int32_t longval3) +foo (int32_t value) { - return sqshl (longval3, 25); + return sqshl (value, 1); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "sqshl\\tr\[0-9\]+, #25" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/sqshll.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/sqshll.c index 016ef2a336ed..03dc91f3758d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/sqshll.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/sqshll.c @@ -1,13 +1,28 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** sqshll (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +** ... +*/ int64_t -sqshll_imm(int64_t value) +foo (int64_t value) { - return sqshll (value, 21); + return sqshll (value, 1); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "sqshll\\tr\[0-9\]+, r\[0-9\]+, #21" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/srshr.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/srshr.c index 264f0bf09ce1..94e3f42fd33a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/srshr.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/srshr.c @@ -1,13 +1,28 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** srshr (?:ip|fp|r[0-9]+), #shift(?: @.*|) +** ... +*/ int32_t -srshr_imm (int32_t longval3) +foo (int32_t value) { - return srshr (longval3, 25); + return srshr (value, 1); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "srshr\\tr\[0-9\]+, #25" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/srshrl.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/srshrl.c index ab12d0da6359..65f28ccbfdea 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/srshrl.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/srshrl.c @@ -1,13 +1,28 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** srshrl (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #shift(?: @.*|) +** ... +*/ int64_t -srshrl_imm(int64_t value) +foo (int64_t value) { - return srshrl (value, 21); + return srshrl (value, 1); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "srshrl\\tr\[0-9\]+, r\[0-9\]+, #21" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/uqrshl.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/uqrshl.c index 0064aa19fbc5..4b6fd0412103 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/uqrshl.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/uqrshl.c @@ -1,13 +1,40 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** uqrshl (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint32_t -uqrshl_reg (uint32_t longval3, int32_t x) +foo (uint32_t value, int32_t shift) { - return uqrshl (longval3, x); + return uqrshl (value, shift); +} + +/* +**foo1: +** ... +** uqrshl (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +uint32_t +foo1 (int32_t shift) +{ + return uqrshl (1, shift); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "uqrshl\\tr\[0-9\]+, r\[0-9\]+" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/uqrshll_sat48.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/uqrshll_sat48.c index 24cd23244130..eaf36911eb6d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/uqrshll_sat48.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/uqrshll_sat48.c @@ -1,13 +1,40 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** uqrshll (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #48, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint64_t -uqrshll_reg (uint64_t longval3, int32_t x) +foo (uint64_t value, int32_t shift) { - return uqrshll_sat48 (longval3, x); + return uqrshll_sat48 (value, shift); +} + +/* +**foo1: +** ... +** uqrshll (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #48, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +uint64_t +foo1 (int32_t shift) +{ + return uqrshll_sat48 (1, shift); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "uqrshll\\tr\[0-9\]+, r\[0-9\]+, #48, r\[0-9\]+" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/uqshl.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/uqshl.c index 9e6ff649805a..b23c9d97ba65 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/uqshl.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/uqshl.c @@ -1,13 +1,40 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** uqshl (?:ip|fp|r[0-9]+), #shift(?: @.*|) +** ... +*/ uint32_t -uqshl_imm (uint32_t longval3) +foo (uint32_t value) { - return uqshl (longval3, 21); + return uqshl (value, 1); +} + +/* +**foo1: +** ... +** uqshl (?:ip|fp|r[0-9]+), #shift(?: @.*|) +** ... +*/ +uint32_t +foo1 () +{ + return uqshl (1, 1); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "uqshl\\tr\[0-9\]+, #21" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/uqshll.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/uqshll.c index 52560721d6ff..6a3d08eea756 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/uqshll.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/uqshll.c @@ -1,13 +1,40 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** uqshll (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #shift(?: @.*|) +** ... +*/ uint64_t -uqshll_imm(uint64_t value) +foo (uint64_t value) { - return uqshll (value, 21); + return uqshll (value, 1); +} + +/* +**foo1: +** ... +** uqshll (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #shift(?: @.*|) +** ... +*/ +uint64_t +foo1 () +{ + return uqshll (1, 1); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "uqshll\\tr\[0-9\]+, r\[0-9\]+, #21" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/urshr.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/urshr.c index ec5d84bb0099..23afcb8da4c4 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/urshr.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/urshr.c @@ -1,13 +1,40 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" -uint64_t -urshr_imm (uint32_t longval3) +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** urshr (?:ip|fp|r[0-9]+), #shift(?: @.*|) +** ... +*/ +uint32_t +foo (uint32_t value) +{ + return urshr (value, 1); +} + +/* +**foo1: +** ... +** urshr (?:ip|fp|r[0-9]+), #shift(?: @.*|) +** ... +*/ +uint32_t +foo1 () { - return urshr (longval3, 21); + return urshr (1, 1); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "urshr\\tr\[0-9\]+, #21" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/urshrl.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/urshrl.c index ea29412ab7a6..8014371f47fa 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/urshrl.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/urshrl.c @@ -1,13 +1,40 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** urshrl (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #shift(?: @.*|) +** ... +*/ uint64_t -urshrl_imm(uint64_t value) +foo (uint64_t value) { - return urshrl (value, 21); + return urshrl (value, 1); +} + +/* +**foo1: +** ... +** urshrl (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #shift(?: @.*|) +** ... +*/ +uint64_t +foo1 () +{ + return urshrl (1, 1); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "urshrl\\tr\[0-9\]+, r\[0-9\]+, #21" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_m_s32.c index 1bfc101d5e84..b262bf94d393 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_m_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_m_s32.c @@ -1,23 +1,61 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vadcit.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +** ... +** lsr (?:ip|fp|r[0-9]+), #29(?: @.*|) +** ... +** and (?:ip|fp|r[0-9]+), #1(?: @.*|) +** ... +*/ int32x4_t -foo (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned * carry_out, mve_pred16_t p) +foo (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned *carry_out, mve_pred16_t p) { return vadciq_m_s32 (inactive, a, b, carry_out, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vadcit.i32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vadcit.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +** ... +** lsr (?:ip|fp|r[0-9]+), #29(?: @.*|) +** ... +** and (?:ip|fp|r[0-9]+), #1(?: @.*|) +** ... +*/ int32x4_t -foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned * carry_out, mve_pred16_t p) +foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned *carry_out, mve_pred16_t p) { return vadciq_m (inactive, a, b, carry_out, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vadcit.i32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_m_u32.c index f72fe34c33b5..d349caed36ac 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_m_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_m_u32.c @@ -1,23 +1,61 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vadcit.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +** ... +** lsr (?:ip|fp|r[0-9]+), #29(?: @.*|) +** ... +** and (?:ip|fp|r[0-9]+), #1(?: @.*|) +** ... +*/ uint32x4_t -foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned * carry_out, mve_pred16_t p) +foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned *carry_out, mve_pred16_t p) { return vadciq_m_u32 (inactive, a, b, carry_out, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vadcit.i32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vadcit.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +** ... +** lsr (?:ip|fp|r[0-9]+), #29(?: @.*|) +** ... +** and (?:ip|fp|r[0-9]+), #1(?: @.*|) +** ... +*/ uint32x4_t -foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned * carry_out, mve_pred16_t p) +foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned *carry_out, mve_pred16_t p) { return vadciq_m (inactive, a, b, carry_out, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vadcit.i32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_s32.c index ff13841c5810..5166993a3555 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_s32.c @@ -1,21 +1,53 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vadci.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +** ... +** lsr (?:ip|fp|r[0-9]+), #29(?: @.*|) +** ... +** and (?:ip|fp|r[0-9]+), #1(?: @.*|) +** ... +*/ int32x4_t -foo (int32x4_t a, int32x4_t b, unsigned * carry_out) +foo (int32x4_t a, int32x4_t b, unsigned *carry_out) { return vadciq_s32 (a, b, carry_out); } -/* { dg-final { scan-assembler "vadci.i32" } } */ +/* +**foo1: +** ... +** vadci.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +** ... +** lsr (?:ip|fp|r[0-9]+), #29(?: @.*|) +** ... +** and (?:ip|fp|r[0-9]+), #1(?: @.*|) +** ... +*/ int32x4_t -foo1 (int32x4_t a, int32x4_t b, unsigned * carry_out) +foo1 (int32x4_t a, int32x4_t b, unsigned *carry_out) { return vadciq (a, b, carry_out); } -/* { dg-final { scan-assembler "vadci.i32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_u32.c index e3560362225a..080bd61d2385 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadciq_u32.c @@ -1,21 +1,53 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vadci.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +** ... +** lsr (?:ip|fp|r[0-9]+), #29(?: @.*|) +** ... +** and (?:ip|fp|r[0-9]+), #1(?: @.*|) +** ... +*/ uint32x4_t -foo (uint32x4_t a, uint32x4_t b, unsigned * carry_out) +foo (uint32x4_t a, uint32x4_t b, unsigned *carry_out) { return vadciq_u32 (a, b, carry_out); } -/* { dg-final { scan-assembler "vadci.i32" } } */ +/* +**foo1: +** ... +** vadci.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +** ... +** lsr (?:ip|fp|r[0-9]+), #29(?: @.*|) +** ... +** and (?:ip|fp|r[0-9]+), #1(?: @.*|) +** ... +*/ uint32x4_t -foo1 (uint32x4_t a, uint32x4_t b, unsigned * carry_out) +foo1 (uint32x4_t a, uint32x4_t b, unsigned *carry_out) { return vadciq (a, b, carry_out); } -/* { dg-final { scan-assembler "vadci.i32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_m_s32.c index 668c4fdc82c1..45e6ff03623c 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_m_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_m_s32.c @@ -1,23 +1,73 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +** ... +** bfi (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|) +** ... +** vmsr FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vadct.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +** ... +** lsr (?:ip|fp|r[0-9]+), #29(?: @.*|) +** ... +** and (?:ip|fp|r[0-9]+), #1(?: @.*|) +** ... +*/ int32x4_t -foo (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned * carry, mve_pred16_t p) +foo (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned *carry, mve_pred16_t p) { return vadcq_m_s32 (inactive, a, b, carry, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vadct.i32" } } */ +/* +**foo1: +** ... +** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +** ... +** bfi (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|) +** ... +** vmsr FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vadct.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +** ... +** lsr (?:ip|fp|r[0-9]+), #29(?: @.*|) +** ... +** and (?:ip|fp|r[0-9]+), #1(?: @.*|) +** ... +*/ int32x4_t -foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned * carry, mve_pred16_t p) +foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned *carry, mve_pred16_t p) { return vadcq_m (inactive, a, b, carry, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vadct.i32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_m_u32.c index 368c7c5c5f2b..54f141b20931 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_m_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_m_u32.c @@ -1,23 +1,73 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +** ... +** bfi (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|) +** ... +** vmsr FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vadct.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +** ... +** lsr (?:ip|fp|r[0-9]+), #29(?: @.*|) +** ... +** and (?:ip|fp|r[0-9]+), #1(?: @.*|) +** ... +*/ uint32x4_t -foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned * carry, mve_pred16_t p) +foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned *carry, mve_pred16_t p) { return vadcq_m_u32 (inactive, a, b, carry, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vadct.i32" } } */ +/* +**foo1: +** ... +** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +** ... +** bfi (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|) +** ... +** vmsr FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vadct.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +** ... +** lsr (?:ip|fp|r[0-9]+), #29(?: @.*|) +** ... +** and (?:ip|fp|r[0-9]+), #1(?: @.*|) +** ... +*/ uint32x4_t -foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned * carry, mve_pred16_t p) +foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned *carry, mve_pred16_t p) { return vadcq_m (inactive, a, b, carry, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vadct.i32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_s32.c index 9c8777c45ee3..06d5bae09da5 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_s32.c @@ -1,21 +1,65 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +** ... +** bfi (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|) +** ... +** vmsr FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vadc.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +** ... +** lsr (?:ip|fp|r[0-9]+), #29(?: @.*|) +** ... +** and (?:ip|fp|r[0-9]+), #1(?: @.*|) +** ... +*/ int32x4_t -foo (int32x4_t a, int32x4_t b, unsigned * carry) +foo (int32x4_t a, int32x4_t b, unsigned *carry) { return vadcq_s32 (a, b, carry); } -/* { dg-final { scan-assembler "vadc.i32" } } */ +/* +**foo1: +** ... +** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +** ... +** bfi (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|) +** ... +** vmsr FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vadc.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +** ... +** lsr (?:ip|fp|r[0-9]+), #29(?: @.*|) +** ... +** and (?:ip|fp|r[0-9]+), #1(?: @.*|) +** ... +*/ int32x4_t -foo1 (int32x4_t a, int32x4_t b, unsigned * carry) +foo1 (int32x4_t a, int32x4_t b, unsigned *carry) { return vadcq (a, b, carry); } -/* { dg-final { scan-assembler "vadc.i32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_u32.c index 78f48da51077..e2111cfd16ae 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vadcq_u32.c @@ -1,21 +1,65 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +** ... +** bfi (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|) +** ... +** vmsr FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vadc.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +** ... +** lsr (?:ip|fp|r[0-9]+), #29(?: @.*|) +** ... +** and (?:ip|fp|r[0-9]+), #1(?: @.*|) +** ... +*/ uint32x4_t -foo (uint32x4_t a, uint32x4_t b, unsigned * carry) +foo (uint32x4_t a, uint32x4_t b, unsigned *carry) { return vadcq_u32 (a, b, carry); } -/* { dg-final { scan-assembler "vadc.i32" } } */ +/* +**foo1: +** ... +** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +** ... +** bfi (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|) +** ... +** vmsr FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vadc.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +** ... +** lsr (?:ip|fp|r[0-9]+), #29(?: @.*|) +** ... +** and (?:ip|fp|r[0-9]+), #1(?: @.*|) +** ... +*/ uint32x4_t -foo1 (uint32x4_t a, uint32x4_t b, unsigned * carry) +foo1 (uint32x4_t a, uint32x4_t b, unsigned *carry) { return vadcq (a, b, carry); } -/* { dg-final { scan-assembler "vadc.i32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_f16.c index 2303b598a28d..cb1820347bc2 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_f16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vand q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t a, float16x8_t b) { return vandq_f16 (a, b); } -/* { dg-final { scan-assembler "vand" } } */ +/* +**foo1: +** ... +** vand q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t a, float16x8_t b) { return vandq (a, b); } -/* { dg-final { scan-assembler "vand" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_f32.c index 905f2b410c05..1034bcbaa623 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_f32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vand q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t a, float32x4_t b) { return vandq_f32 (a, b); } -/* { dg-final { scan-assembler "vand" } } */ +/* +**foo1: +** ... +** vand q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t a, float32x4_t b) { return vandq (a, b); } -/* { dg-final { scan-assembler "vand" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_f16.c index d061dbc390be..d6752a6fdc4f 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_f16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p) { return vandq_m_f16 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vandt" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p) { return vandq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vandt" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_f32.c index 77b2813dfadd..fb8410d0b712 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_f32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p) { return vandq_m_f32 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vandt" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p) { return vandq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vandt" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_s16.c index 2840a33b433f..5797ffa9a16f 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_s16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) { return vandq_m_s16 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vandt" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) { return vandq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vandt" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_s32.c index 2e8ec7e14de9..d2ede670e40c 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_s32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) { return vandq_m_s32 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vandt" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) { return vandq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vandt" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_s8.c index 36226f6d9acc..76ed60c64a97 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_s8.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) { return vandq_m_s8 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vandt" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) { return vandq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vandt" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_u16.c index 49f0502f607f..b3f7833e5468 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_u16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vandq_m_u16 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vandt" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vandq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vandt" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_u32.c index 194c7800a056..7d761c866220 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_u32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return vandq_m_u32 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vandt" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return vandq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vandt" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_u8.c index 9b27c44ee827..8fd17e4f258b 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_m_u8.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vandq_m_u8 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vandt" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vandq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vandt" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_s16.c index 86aa64fec96a..9f3e9b0c0786 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vand q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int16x8_t b) { return vandq_s16 (a, b); } -/* { dg-final { scan-assembler "vand" } } */ +/* +**foo1: +** ... +** vand q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int16x8_t b) { return vandq (a, b); } -/* { dg-final { scan-assembler "vand" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_s32.c index 907fe89ced84..ab0e9627fb97 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vand q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a, int32x4_t b) { return vandq_s32 (a, b); } -/* { dg-final { scan-assembler "vand" } } */ +/* +**foo1: +** ... +** vand q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a, int32x4_t b) { return vandq (a, b); } -/* { dg-final { scan-assembler "vand" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_s8.c index 783ad042c872..980ba6b5f7a7 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_s8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vand q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int8x16_t b) { return vandq_s8 (a, b); } -/* { dg-final { scan-assembler "vand" } } */ +/* +**foo1: +** ... +** vand q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int8x16_t b) { return vandq (a, b); } -/* { dg-final { scan-assembler "vand" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_u16.c index ae483869f11c..fdd18e924763 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_u16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vand q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, uint16x8_t b) { return vandq_u16 (a, b); } -/* { dg-final { scan-assembler "vand" } } */ +/* +**foo1: +** ... +** vand q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, uint16x8_t b) { return vandq (a, b); } -/* { dg-final { scan-assembler "vand" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_u32.c index 532926d894a0..01df18287882 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_u32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vand q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t a, uint32x4_t b) { return vandq_u32 (a, b); } -/* { dg-final { scan-assembler "vand" } } */ +/* +**foo1: +** ... +** vand q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t a, uint32x4_t b) { return vandq (a, b); } -/* { dg-final { scan-assembler "vand" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_u8.c index 4018308f66d0..a4f0cec4483e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_u8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vand q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, uint8x16_t b) { return vandq_u8 (a, b); } -/* { dg-final { scan-assembler "vand" } } */ +/* +**foo1: +** ... +** vand q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, uint8x16_t b) { return vandq (a, b); } -/* { dg-final { scan-assembler "vand" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_f16.c index 6aa98910c7be..99c586d5604d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_f16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t a, float16x8_t b, mve_pred16_t p) { return vandq_x_f16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vandt" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p) { return vandq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_f32.c index fd74ee6eee7c..eda9d6184097 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_f32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t a, float32x4_t b, mve_pred16_t p) { return vandq_x_f32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vandt" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p) { return vandq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_s16.c index d8821d59be7d..f0159ee76681 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_s16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int16x8_t b, mve_pred16_t p) { return vandq_x_s16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vandt" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) { return vandq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_s32.c index 980b01436b6d..09277b2d56b6 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_s32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a, int32x4_t b, mve_pred16_t p) { return vandq_x_s32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vandt" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) { return vandq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_s8.c index 93dead714161..f1232168a7d7 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_s8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int8x16_t b, mve_pred16_t p) { return vandq_x_s8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vandt" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) { return vandq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_u16.c index aa99c69bd840..836385f44f48 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_u16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vandq_x_u16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vandt" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vandq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_u32.c index 1178837d78a5..06b5010738b4 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_u32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return vandq_x_u32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vandt" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return vandq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_u8.c index d46e2b235b98..37f4fc51f9af 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vandq_x_u8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vandq_x_u8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vandt" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vandt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vandq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_f16.c index c15f1f91d070..38a1a4adafa7 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_f16.c @@ -1,22 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vbic q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t a, float16x8_t b) { return vbicq_f16 (a, b); } -/* { dg-final { scan-assembler "vbic" } } */ +/* +**foo1: +** ... +** vbic q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t a, float16x8_t b) { return vbicq (a, b); } -/* { dg-final { scan-assembler "vbic" } } */ +#ifdef __cplusplus +} +#endif + /* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_f32.c index c8659d460a05..224b535992b5 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_f32.c @@ -1,22 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vbic q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t a, float32x4_t b) { return vbicq_f32 (a, b); } -/* { dg-final { scan-assembler "vbic" } } */ +/* +**foo1: +** ... +** vbic q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t a, float32x4_t b) { return vbicq (a, b); } -/* { dg-final { scan-assembler "vbic" } } */ +#ifdef __cplusplus +} +#endif + /* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_f16.c index 39a12a9fba31..e197a2aa1e30 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_f16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p) { return vbicq_m_f16 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vbict" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p) { return vbicq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vbict" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_f32.c index 091027c4b19f..b441e205a643 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_f32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p) { return vbicq_m_f32 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vbict" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p) { return vbicq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vbict" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_s16.c index 3d0d09859c18..4e2be3e4516a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_s16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbict.i16 q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, mve_pred16_t p) { - return vbicq_m_n_s16 (a, 16, p); + return vbicq_m_n_s16 (a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vbict.i16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbict.i16 q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, mve_pred16_t p) { - return vbicq_m_n (a, 16, p); + return vbicq_m_n (a, 1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_s32.c index 47a9459580ba..d8beab580241 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_s32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbict.i32 q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a, mve_pred16_t p) { return vbicq_m_n_s32 (a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vbict.i32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbict.i32 q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a, mve_pred16_t p) { return vbicq_m_n (a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_u16.c index 7c0c691fd461..34b62aa557fb 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_u16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbict.i16 q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, mve_pred16_t p) { return vbicq_m_n_u16 (a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vbict.i16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbict.i16 q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, mve_pred16_t p) { return vbicq_m_n (a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_u32.c index e97b17aa27d4..60681e3f045d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_n_u32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbict.i32 q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t a, mve_pred16_t p) { return vbicq_m_n_u32 (a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vbict.i32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbict.i32 q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t a, mve_pred16_t p) { return vbicq_m_n (a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_s16.c index 31a9e986b8df..c30658cf34c9 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_s16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) { return vbicq_m_s16 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vbict" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) { return vbicq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vbict" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_s32.c index 9e7a2940b42f..6a861cb80e5f 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_s32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) { return vbicq_m_s32 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vbict" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) { return vbicq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vbict" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_s8.c index b5e3253384c4..c19caf536586 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_s8.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) { return vbicq_m_s8 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vbict" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) { return vbicq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vbict" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_u16.c index 54370ab9548c..443fcac6605e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_u16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vbicq_m_u16 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vbict" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vbicq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vbict" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_u32.c index cfcae7c74a9c..31b1e22ef7af 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_u32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return vbicq_m_u32 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vbict" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return vbicq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vbict" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_u8.c index cd9856f629ed..6bddc5c2d300 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_m_u8.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vbicq_m_u8 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vbict" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vbicq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vbict" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s16.c index 6258727d82f4..8726b2c57a40 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s16.c @@ -1,20 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vbic.i16 q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a) { return vbicq_n_s16 (a, 1); } + +/* +**foo1: +** ... +** vbic.i16 q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a) { return vbicq (a, 1); } -/* { dg-final { scan-assembler-times "vbic.i16" 2 } } */ +#ifdef __cplusplus +} +#endif + /* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s32.c index be641abf556b..015af580ed06 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_s32.c @@ -1,20 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vbic.i32 q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a) { return vbicq_n_s32 (a, 1); } + +/* +**foo1: +** ... +** vbic.i32 q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a) { return vbicq (a, 1); } -/* { dg-final { scan-assembler-times "vbic.i32" 2 } } */ +#ifdef __cplusplus +} +#endif + /* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u16.c index 0b26ffda0dce..1ad03b9d17f9 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u16.c @@ -1,20 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vbic.i16 q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a) { return vbicq_n_u16 (a, 1); } + +/* +**foo1: +** ... +** vbic.i16 q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a) { return vbicq (a, 1); } -/* { dg-final { scan-assembler-times "vbic.i16" 2 } } */ +#ifdef __cplusplus +} +#endif + /* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u32.c index 47820bd184a1..f3fe58fdf375 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_n_u32.c @@ -1,20 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vbic.i32 q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t a) { return vbicq_n_u32 (a, 1); } + +/* +**foo1: +** ... +** vbic.i32 q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t a) { return vbicq (a, 1); } -/* { dg-final { scan-assembler-times "vbic.i32" 2 } } */ +#ifdef __cplusplus +} +#endif + /* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s16.c index 4ffacdd97333..6fd2a9e5c0cc 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s16.c @@ -1,22 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vbic q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int16x8_t b) { return vbicq_s16 (a, b); } -/* { dg-final { scan-assembler "vbic" } } */ +/* +**foo1: +** ... +** vbic q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int16x8_t b) { return vbicq (a, b); } -/* { dg-final { scan-assembler "vbic" } } */ +#ifdef __cplusplus +} +#endif + /* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s32.c index 13fbff407468..37859e0dc6ee 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s32.c @@ -1,22 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vbic q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a, int32x4_t b) { return vbicq_s32 (a, b); } -/* { dg-final { scan-assembler "vbic" } } */ +/* +**foo1: +** ... +** vbic q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a, int32x4_t b) { return vbicq (a, b); } -/* { dg-final { scan-assembler "vbic" } } */ +#ifdef __cplusplus +} +#endif + /* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s8.c index b9fba943a835..23db9afbcf16 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_s8.c @@ -1,22 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vbic q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int8x16_t b) { return vbicq_s8 (a, b); } -/* { dg-final { scan-assembler "vbic" } } */ +/* +**foo1: +** ... +** vbic q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int8x16_t b) { return vbicq (a, b); } -/* { dg-final { scan-assembler "vbic" } } */ +#ifdef __cplusplus +} +#endif + /* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u16.c index 5d94a6396c42..9ed4e533e520 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u16.c @@ -1,22 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vbic q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, uint16x8_t b) { return vbicq_u16 (a, b); } -/* { dg-final { scan-assembler "vbic" } } */ +/* +**foo1: +** ... +** vbic q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, uint16x8_t b) { return vbicq (a, b); } -/* { dg-final { scan-assembler "vbic" } } */ +#ifdef __cplusplus +} +#endif + /* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u32.c index 893dc3deefcb..abaf2a9cf7b2 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u32.c @@ -1,22 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vbic q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t a, uint32x4_t b) { return vbicq_u32 (a, b); } -/* { dg-final { scan-assembler "vbic" } } */ +/* +**foo1: +** ... +** vbic q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t a, uint32x4_t b) { return vbicq (a, b); } -/* { dg-final { scan-assembler "vbic" } } */ +#ifdef __cplusplus +} +#endif + /* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u8.c index bd5e9bc01971..4a47bb9d0e75 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_u8.c @@ -1,22 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vbic q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, uint8x16_t b) { return vbicq_u8 (a, b); } -/* { dg-final { scan-assembler "vbic" } } */ +/* +**foo1: +** ... +** vbic q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, uint8x16_t b) { return vbicq (a, b); } -/* { dg-final { scan-assembler "vbic" } } */ +#ifdef __cplusplus +} +#endif + /* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_f16.c index 975d60c713e6..aa4812568d79 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_f16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t a, float16x8_t b, mve_pred16_t p) { return vbicq_x_f16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vbict" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p) { return vbicq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_f32.c index e779224b5d5f..db295df1cd57 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_f32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t a, float32x4_t b, mve_pred16_t p) { return vbicq_x_f32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vbict" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p) { return vbicq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_s16.c index be554c4b2fb1..2b7a3594dd7e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_s16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int16x8_t b, mve_pred16_t p) { return vbicq_x_s16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vbict" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) { return vbicq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_s32.c index e49aabf11d6b..bf3b755f9ee4 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_s32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a, int32x4_t b, mve_pred16_t p) { return vbicq_x_s32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vbict" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) { return vbicq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_s8.c index c36cd1e6dc58..30df09045395 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_s8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int8x16_t b, mve_pred16_t p) { return vbicq_x_s8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vbict" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) { return vbicq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_u16.c index 3b611591debc..eaa50a84fd41 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_u16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vbicq_x_u16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vbict" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vbicq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_u32.c index fce2fab3dd66..aea2592d9cfe 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_u32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return vbicq_x_u32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vbict" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return vbicq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_u8.c index 672b3fb1e395..4ffee473ea6e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbicq_x_u8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vbicq_x_u8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vbict" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbict q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vbicq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_f16.c index 8f8d1bffd73b..5985b7fed019 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_f16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbrsrt.16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t inactive, float16x8_t a, int32_t b, mve_pred16_t p) { return vbrsrq_m_n_f16 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vbrsrt.16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbrsrt.16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t inactive, float16x8_t a, int32_t b, mve_pred16_t p) { return vbrsrq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vbrsrt.16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_f32.c index 336c8194cd7c..1fff5a8bf954 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_f32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbrsrt.32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t inactive, float32x4_t a, int32_t b, mve_pred16_t p) { return vbrsrq_m_n_f32 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vbrsrt.32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbrsrt.32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t inactive, float32x4_t a, int32_t b, mve_pred16_t p) { return vbrsrq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vbrsrt.32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s16.c index f597d8ccb9d5..a5221f8d864c 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbrsrt.16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t inactive, int16x8_t a, int32_t b, mve_pred16_t p) { return vbrsrq_m_n_s16 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vbrsrt.16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbrsrt.16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t inactive, int16x8_t a, int32_t b, mve_pred16_t p) { return vbrsrq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vbrsrt.16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s32.c index 76f0463af1e8..99106e81a304 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbrsrt.32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p) { return vbrsrq_m_n_s32 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vbrsrt.32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbrsrt.32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p) { return vbrsrq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vbrsrt.32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s8.c index 30c6519236ca..6bd4c8f44556 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s8.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbrsrt.8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t inactive, int8x16_t a, int32_t b, mve_pred16_t p) { return vbrsrq_m_n_s8 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vbrsrt.8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbrsrt.8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t inactive, int8x16_t a, int32_t b, mve_pred16_t p) { return vbrsrq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vbrsrt.8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u16.c index 7052b8b5ff5e..03ad48960294 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbrsrt.16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t inactive, uint16x8_t a, int32_t b, mve_pred16_t p) { return vbrsrq_m_n_u16 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vbrsrt.16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbrsrt.16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t inactive, uint16x8_t a, int32_t b, mve_pred16_t p) { return vbrsrq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vbrsrt.16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u32.c index e19e02fbbd86..e65077001ec9 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbrsrt.32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t inactive, uint32x4_t a, int32_t b, mve_pred16_t p) { return vbrsrq_m_n_u32 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vbrsrt.32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbrsrt.32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t inactive, uint32x4_t a, int32_t b, mve_pred16_t p) { return vbrsrq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vbrsrt.32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u8.c index ce658432fd9c..61ca255e4312 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u8.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbrsrt.8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t inactive, uint8x16_t a, int32_t b, mve_pred16_t p) { return vbrsrq_m_n_u8 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vbrsrt.8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbrsrt.8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t inactive, uint8x16_t a, int32_t b, mve_pred16_t p) { return vbrsrq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vbrsrt.8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_f16.c index 9b8dea6e7e87..6dc4c657cbfb 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_f16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vbrsr.16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t a, int32_t b) { return vbrsrq_n_f16 (a, b); } -/* { dg-final { scan-assembler "vbrsr.16" } } */ +/* +**foo1: +** ... +** vbrsr.16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t a, int32_t b) { return vbrsrq (a, b); } -/* { dg-final { scan-assembler "vbrsr.16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_f32.c index cd335197c3b7..810cd1b86ace 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_f32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vbrsr.32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t a, int32_t b) { return vbrsrq_n_f32 (a, b); } -/* { dg-final { scan-assembler "vbrsr.32" } } */ +/* +**foo1: +** ... +** vbrsr.32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t a, int32_t b) { return vbrsrq (a, b); } -/* { dg-final { scan-assembler "vbrsr.32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_s16.c index efb17dd52506..109ccd72f0a4 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vbrsr.16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int32_t b) { return vbrsrq_n_s16 (a, b); } -/* { dg-final { scan-assembler "vbrsr.16" } } */ +/* +**foo1: +** ... +** vbrsr.16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int32_t b) { return vbrsrq (a, b); } -/* { dg-final { scan-assembler "vbrsr.16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_s32.c index fda78e6aa4b1..78b2db49c874 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vbrsr.32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a, int32_t b) { return vbrsrq_n_s32 (a, b); } -/* { dg-final { scan-assembler "vbrsr.32" } } */ +/* +**foo1: +** ... +** vbrsr.32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a, int32_t b) { return vbrsrq (a, b); } -/* { dg-final { scan-assembler "vbrsr.32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_s8.c index cd75a2b88fa0..dfd485240ea7 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_s8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vbrsr.8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int32_t b) { return vbrsrq_n_s8 (a, b); } -/* { dg-final { scan-assembler "vbrsr.8" } } */ +/* +**foo1: +** ... +** vbrsr.8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int32_t b) { return vbrsrq (a, b); } -/* { dg-final { scan-assembler "vbrsr.8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_u16.c index ef7708e33f8a..59e1fcc0fd9d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_u16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vbrsr.16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, int32_t b) { return vbrsrq_n_u16 (a, b); } -/* { dg-final { scan-assembler "vbrsr.16" } } */ +/* +**foo1: +** ... +** vbrsr.16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, int32_t b) { return vbrsrq (a, b); } -/* { dg-final { scan-assembler "vbrsr.16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_u32.c index b33c533aedae..2d7792dd1cb2 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_u32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vbrsr.32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t a, int32_t b) { return vbrsrq_n_u32 (a, b); } -/* { dg-final { scan-assembler "vbrsr.32" } } */ +/* +**foo1: +** ... +** vbrsr.32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t a, int32_t b) { return vbrsrq (a, b); } -/* { dg-final { scan-assembler "vbrsr.32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_u8.c index 91156bd4325e..5f4398ddbe11 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_n_u8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vbrsr.8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, int32_t b) { return vbrsrq_n_u8 (a, b); } -/* { dg-final { scan-assembler "vbrsr.8" } } */ +/* +**foo1: +** ... +** vbrsr.8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, int32_t b) { return vbrsrq (a, b); } -/* { dg-final { scan-assembler "vbrsr.8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_f16.c index 0710b59b1ab7..d9d404ccf82c 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_f16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbrsrt.16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t a, int32_t b, mve_pred16_t p) { return vbrsrq_x_n_f16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vbrsrt.16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbrsrt.16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t a, int32_t b, mve_pred16_t p) { return vbrsrq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vbrsrt.16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_f32.c index 67ab8cf80c98..8b176fe701c1 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_f32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbrsrt.32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t a, int32_t b, mve_pred16_t p) { return vbrsrq_x_n_f32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vbrsrt.32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbrsrt.32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t a, int32_t b, mve_pred16_t p) { return vbrsrq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vbrsrt.32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s16.c index ac0c13c0b4de..77f4f1852a83 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbrsrt.16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int32_t b, mve_pred16_t p) { return vbrsrq_x_n_s16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vbrsrt.16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbrsrt.16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int32_t b, mve_pred16_t p) { return vbrsrq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vbrsrt.16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s32.c index 98c87f175880..fc4a1c9c7e0b 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbrsrt.32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a, int32_t b, mve_pred16_t p) { return vbrsrq_x_n_s32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vbrsrt.32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbrsrt.32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a, int32_t b, mve_pred16_t p) { return vbrsrq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vbrsrt.32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s8.c index 8159f5da9996..10322ac328a3 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s8.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbrsrt.8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int32_t b, mve_pred16_t p) { return vbrsrq_x_n_s8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vbrsrt.8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbrsrt.8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int32_t b, mve_pred16_t p) { return vbrsrq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vbrsrt.8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u16.c index dbad2940616d..72d8a9e23b0c 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbrsrt.16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, int32_t b, mve_pred16_t p) { return vbrsrq_x_n_u16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vbrsrt.16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbrsrt.16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, int32_t b, mve_pred16_t p) { return vbrsrq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vbrsrt.16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u32.c index 04c812a27476..535af3600c71 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbrsrt.32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t a, int32_t b, mve_pred16_t p) { return vbrsrq_x_n_u32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vbrsrt.32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbrsrt.32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t a, int32_t b, mve_pred16_t p) { return vbrsrq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vbrsrt.32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u8.c index b3836936750f..5f8f8c928fde 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u8.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbrsrt.8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, int32_t b, mve_pred16_t p) { return vbrsrq_x_n_u8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vbrsrt.8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vbrsrt.8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, int32_t b, mve_pred16_t p) { return vbrsrq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vbrsrt.8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c index 0339fbcafc6f..89d8e2b91096 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c @@ -56,4 +56,4 @@ foo2 (float16x8_t a) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp16q.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp16q.c index 2659f061cd9e..1575966073d2 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp16q.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp16q.c @@ -1,21 +1,44 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vctp.16 (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (uint32_t a) { return vctp16q (a); } -/* { dg-final { scan-assembler "vctp.16" } } */ - +/* +**foo1: +** ... +** vctp.16 (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t -foo1 (uint32_t a) +foo1 () { - return vctp16q (a); + return vctp16q (1); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vctp.16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp16q_m.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp16q_m.c index d901c9ece0d5..a14fbe97f86a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp16q_m.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp16q_m.c @@ -1,22 +1,52 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vctpt.16 (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (uint32_t a, mve_pred16_t p) { return vctp16q_m (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vctpt.16" } } */ - +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vctpt.16 (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t -foo1 (uint32_t a, mve_pred16_t p) +foo1 (mve_pred16_t p) { - return vctp16q_m (a, p); + return vctp16q_m (1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp32q.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp32q.c index f54ecc33e4a9..c53b6190019c 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp32q.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp32q.c @@ -1,21 +1,44 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vctp.32 (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (uint32_t a) { return vctp32q (a); } -/* { dg-final { scan-assembler "vctp.32" } } */ - +/* +**foo1: +** ... +** vctp.32 (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t -foo1 (uint32_t a) +foo1 () { - return vctp32q (a); + return vctp32q (1); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vctp.32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp32q_m.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp32q_m.c index 3d2f101fb0cf..6fa790d70393 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp32q_m.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp32q_m.c @@ -1,22 +1,52 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vctpt.32 (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (uint32_t a, mve_pred16_t p) { return vctp32q_m (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vctpt.32" } } */ - +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vctpt.32 (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t -foo1 (uint32_t a, mve_pred16_t p) +foo1 (mve_pred16_t p) { - return vctp32q_m (a, p); + return vctp32q_m (1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp64q.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp64q.c index 8502ad3b6001..dba63bae1a8d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp64q.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp64q.c @@ -1,21 +1,44 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vctp.64 (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (uint32_t a) { return vctp64q (a); } -/* { dg-final { scan-assembler "vctp.64" } } */ - +/* +**foo1: +** ... +** vctp.64 (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t -foo1 (uint32_t a) +foo1 () { - return vctp64q (a); + return vctp64q (1); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vctp.64" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp64q_m.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp64q_m.c index 6f3d1c21d014..1faf8a0063cc 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp64q_m.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp64q_m.c @@ -1,22 +1,52 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vctpt.64 (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (uint32_t a, mve_pred16_t p) { return vctp64q_m (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vctpt.64" } } */ - +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vctpt.64 (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t -foo1 (uint32_t a, mve_pred16_t p) +foo1 (mve_pred16_t p) { - return vctp64q_m (a, p); + return vctp64q_m (1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp8q.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp8q.c index 91283f82db1c..56267fd861d8 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp8q.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp8q.c @@ -1,21 +1,44 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vctp.8 (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (uint32_t a) { return vctp8q (a); } -/* { dg-final { scan-assembler "vctp.8" } } */ - +/* +**foo1: +** ... +** vctp.8 (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t -foo1 (uint32_t a) +foo1 () { - return vctp8q (a); + return vctp8q (1); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vctp.8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp8q_m.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp8q_m.c index 2c640ba68011..937c33cbb830 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp8q_m.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vctp8q_m.c @@ -1,22 +1,52 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vctpt.8 (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (uint32_t a, mve_pred16_t p) { return vctp8q_m (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vctpt.8" } } */ - +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vctpt.8 (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t -foo1 (uint32_t a, mve_pred16_t p) +foo1 (mve_pred16_t p) { - return vctp8q_m (a, p); + return vctp8q_m (1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_s16_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_s16_f16.c index ad8b7d9eb069..fcf4cf817ff9 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_s16_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_s16_f16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtat.s16.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t inactive, float16x8_t a, mve_pred16_t p) { return vcvtaq_m_s16_f16 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtat.s16.f16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtat.s16.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t inactive, float16x8_t a, mve_pred16_t p) { return vcvtaq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_s32_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_s32_f32.c index 5649e342d1a5..8aa640de6ac1 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_s32_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_s32_f32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtat.s32.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t inactive, float32x4_t a, mve_pred16_t p) { return vcvtaq_m_s32_f32 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtat.s32.f32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtat.s32.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t inactive, float32x4_t a, mve_pred16_t p) { return vcvtaq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_u16_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_u16_f16.c index b73c3418758c..8fdd3c1b1b0e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_u16_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_u16_f16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtat.u16.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t inactive, float16x8_t a, mve_pred16_t p) { return vcvtaq_m_u16_f16 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtat.u16.f16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtat.u16.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t inactive, float16x8_t a, mve_pred16_t p) { return vcvtaq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_u32_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_u32_f32.c index 56c04f9f782e..246941e75231 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_u32_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_m_u32_f32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtat.u32.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t inactive, float32x4_t a, mve_pred16_t p) { return vcvtaq_m_u32_f32 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtat.u32.f32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtat.u32.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t inactive, float32x4_t a, mve_pred16_t p) { return vcvtaq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_s16_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_s16_f16.c index e2d70e8901f1..c45ba6ccfbf2 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_s16_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_s16_f16.c @@ -1,13 +1,28 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcvta.s16.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (float16x8_t a) { return vcvtaq_s16_f16 (a); } -/* { dg-final { scan-assembler "vcvta.s16.f16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_s32_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_s32_f32.c index d6fd45ae01e5..baa20cc5f9a0 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_s32_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_s32_f32.c @@ -1,13 +1,28 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcvta.s32.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (float32x4_t a) { return vcvtaq_s32_f32 (a); } -/* { dg-final { scan-assembler "vcvta.s32.f32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_u16_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_u16_f16.c index 8f3b12d91019..de4ea9273852 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_u16_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_u16_f16.c @@ -1,13 +1,28 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcvta.u16.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (float16x8_t a) { - return vcvtaq_u16_f16 (a); + return vcvtaq_u16_f16 (a); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vcvta.u16.f16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_u32_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_u32_f32.c index 45e2916e288e..93bf292980e8 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_u32_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_u32_f32.c @@ -1,13 +1,28 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcvta.u32.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (float32x4_t a) { - return vcvtaq_u32_f32 (a); + return vcvtaq_u32_f32 (a); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vcvta.u32.f32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_s16_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_s16_f16.c index 26ff128217e9..b046b7ad94de 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_s16_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_s16_f16.c @@ -1,14 +1,32 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtat.s16.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (float16x8_t a, mve_pred16_t p) { return vcvtaq_x_s16_f16 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtat.s16.f16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_s32_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_s32_f32.c index 3a79e3aecd42..77a740867be7 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_s32_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_s32_f32.c @@ -1,14 +1,32 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtat.s32.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (float32x4_t a, mve_pred16_t p) { return vcvtaq_x_s32_f32 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtat.s32.f32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_u16_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_u16_f16.c index 1f26e7f52d4b..b8a10822bdb2 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_u16_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_u16_f16.c @@ -1,14 +1,32 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtat.u16.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (float16x8_t a, mve_pred16_t p) { return vcvtaq_x_u16_f16 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtat.u16.f16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_u32_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_u32_f32.c index 987e524d7897..51184231b7ab 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_u32_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtaq_x_u32_f32.c @@ -1,14 +1,32 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtat.u32.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (float32x4_t a, mve_pred16_t p) { return vcvtaq_x_u32_f32 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtat.u32.f32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_f16_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_f16_f32.c index f45e07de3759..76b76a2f66ef 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_f16_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_f16_f32.c @@ -1,13 +1,28 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcvtb.f16.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t a, float32x4_t b) { return vcvtbq_f16_f32 (a, b); } -/* { dg-final { scan-assembler "vcvtb.f16.f32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_f32_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_f32_f16.c index 39471a0a43be..347d4129b999 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_f32_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_f32_f16.c @@ -1,13 +1,28 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcvtb.f32.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (float16x8_t a) { return vcvtbq_f32_f16 (a); } -/* { dg-final { scan-assembler "vcvtb.f32.f16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_m_f16_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_m_f16_f32.c index 6c8d9192417e..0545d1e8e276 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_m_f16_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_m_f16_f32.c @@ -1,22 +1,32 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtbt.f16.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t a, float32x4_t b, mve_pred16_t p) { return vcvtbq_m_f16_f32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtbt.f16.f32" } } */ - -float16x8_t -foo1 (float16x8_t a, float32x4_t b, mve_pred16_t p) -{ - return vcvtbq_m (a, b, p); +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_m_f32_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_m_f32_f16.c index 91775436e672..1b220ddfa19c 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_m_f32_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_m_f32_f16.c @@ -1,22 +1,32 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtbt.f32.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t inactive, float16x8_t a, mve_pred16_t p) { return vcvtbq_m_f32_f16 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtbt.f32.f16" } } */ - -float32x4_t -foo1 (float32x4_t inactive, float16x8_t a, mve_pred16_t p) -{ - return vcvtbq_m (inactive, a, p); +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_x_f32_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_x_f32_f16.c index 0dcdb19d1e47..2a3559d25228 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_x_f32_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtbq_x_f32_f16.c @@ -1,14 +1,32 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtbt.f32.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (float16x8_t a, mve_pred16_t p) { return vcvtbq_x_f32_f16 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtbt.f32.f16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_s16_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_s16_f16.c index 75ff107ab15d..b8f6ed855d67 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_s16_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_s16_f16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtmt.s16.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t inactive, float16x8_t a, mve_pred16_t p) { return vcvtmq_m_s16_f16 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtmt.s16.f16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtmt.s16.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t inactive, float16x8_t a, mve_pred16_t p) { return vcvtmq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_s32_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_s32_f32.c index b364533e08d4..614455945244 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_s32_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_s32_f32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtmt.s32.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t inactive, float32x4_t a, mve_pred16_t p) { return vcvtmq_m_s32_f32 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtmt.s32.f32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtmt.s32.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t inactive, float32x4_t a, mve_pred16_t p) { return vcvtmq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_u16_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_u16_f16.c index 249ef0e92b15..3e57ba58d0fe 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_u16_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_u16_f16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtmt.u16.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t inactive, float16x8_t a, mve_pred16_t p) { return vcvtmq_m_u16_f16 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtmt.u16.f16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtmt.u16.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t inactive, float16x8_t a, mve_pred16_t p) { return vcvtmq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_u32_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_u32_f32.c index 52ff77ca4c56..8b8a15653322 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_u32_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_m_u32_f32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtmt.u32.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t inactive, float32x4_t a, mve_pred16_t p) { return vcvtmq_m_u32_f32 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtmt.u32.f32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtmt.u32.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t inactive, float32x4_t a, mve_pred16_t p) { return vcvtmq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_s16_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_s16_f16.c index 70f43ddc2207..4eafb5783b29 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_s16_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_s16_f16.c @@ -1,13 +1,28 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcvtm.s16.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (float16x8_t a) { return vcvtmq_s16_f16 (a); } -/* { dg-final { scan-assembler "vcvtm.s16.f16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_s32_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_s32_f32.c index c2f62cf07170..bd3bfc1b4bd2 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_s32_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_s32_f32.c @@ -1,13 +1,28 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcvtm.s32.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (float32x4_t a) { return vcvtmq_s32_f32 (a); } -/* { dg-final { scan-assembler "vcvtm.s32.f32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_u16_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_u16_f16.c index 62e4acd73b5c..a1917eaf11a1 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_u16_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_u16_f16.c @@ -1,13 +1,28 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcvtm.u16.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (float16x8_t a) { - return vcvtmq_u16_f16 (a); + return vcvtmq_u16_f16 (a); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vcvtm.u16.f16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_u32_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_u32_f32.c index f7f59df1be99..c9f62479e850 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_u32_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_u32_f32.c @@ -1,13 +1,28 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcvtm.u32.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (float32x4_t a) { - return vcvtmq_u32_f32 (a); + return vcvtmq_u32_f32 (a); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vcvtm.u32.f32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_s16_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_s16_f16.c index 22597fb9cb1e..211c2d0df83b 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_s16_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_s16_f16.c @@ -1,14 +1,32 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtmt.s16.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (float16x8_t a, mve_pred16_t p) { return vcvtmq_x_s16_f16 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtmt.s16.f16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_s32_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_s32_f32.c index 17a583c26415..7ca2cb6eb151 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_s32_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_s32_f32.c @@ -1,14 +1,32 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtmt.s32.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (float32x4_t a, mve_pred16_t p) { return vcvtmq_x_s32_f32 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtmt.s32.f32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_u16_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_u16_f16.c index b6e296f29ea1..df212089bf51 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_u16_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_u16_f16.c @@ -1,14 +1,32 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtmt.u16.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (float16x8_t a, mve_pred16_t p) { return vcvtmq_x_u16_f16 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtmt.u16.f16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_u32_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_u32_f32.c index 5f9909b5adb9..8b5818fd0295 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_u32_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtmq_x_u32_f32.c @@ -1,14 +1,32 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtmt.u32.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (float32x4_t a, mve_pred16_t p) { return vcvtmq_x_u32_f32 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtmt.u32.f32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_s16_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_s16_f16.c index a7c3b66a2ebd..67fa9cb720d9 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_s16_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_s16_f16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtnt.s16.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t inactive, float16x8_t a, mve_pred16_t p) { return vcvtnq_m_s16_f16 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtnt.s16.f16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtnt.s16.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t inactive, float16x8_t a, mve_pred16_t p) { return vcvtnq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_s32_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_s32_f32.c index 38913a9e26c2..26c0b09f7b5d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_s32_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_s32_f32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtnt.s32.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t inactive, float32x4_t a, mve_pred16_t p) { return vcvtnq_m_s32_f32 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtnt.s32.f32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtnt.s32.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t inactive, float32x4_t a, mve_pred16_t p) { return vcvtnq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_u16_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_u16_f16.c index 42d9e5ea79c2..ee2a64747a24 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_u16_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_u16_f16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtnt.u16.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t inactive, float16x8_t a, mve_pred16_t p) { return vcvtnq_m_u16_f16 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtnt.u16.f16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtnt.u16.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t inactive, float16x8_t a, mve_pred16_t p) { return vcvtnq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_u32_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_u32_f32.c index 321fa35ceb3c..cc61951abf5a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_u32_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_m_u32_f32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtnt.u32.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t inactive, float32x4_t a, mve_pred16_t p) { return vcvtnq_m_u32_f32 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtnt.u32.f32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtnt.u32.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t inactive, float32x4_t a, mve_pred16_t p) { return vcvtnq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_s16_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_s16_f16.c index d66c058834e6..39c00f6ed040 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_s16_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_s16_f16.c @@ -1,13 +1,28 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcvtn.s16.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (float16x8_t a) { return vcvtnq_s16_f16 (a); } -/* { dg-final { scan-assembler "vcvtn.s16.f16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_s32_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_s32_f32.c index 3dec66614113..c371598db248 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_s32_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_s32_f32.c @@ -1,13 +1,28 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcvtn.s32.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (float32x4_t a) { return vcvtnq_s32_f32 (a); } -/* { dg-final { scan-assembler "vcvtn.s32.f32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_u16_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_u16_f16.c index 07637e84bf71..17ae06a57be9 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_u16_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_u16_f16.c @@ -1,13 +1,28 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcvtn.u16.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (float16x8_t a) { - return vcvtnq_u16_f16 (a); + return vcvtnq_u16_f16 (a); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vcvtn.u16.f16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_u32_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_u32_f32.c index b6d5eb904931..4777b1b205ae 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_u32_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_u32_f32.c @@ -1,13 +1,28 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcvtn.u32.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (float32x4_t a) { return vcvtnq_u32_f32 (a); } -/* { dg-final { scan-assembler "vcvtn.u32.f32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_s16_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_s16_f16.c index f552d6332313..a9c918318812 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_s16_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_s16_f16.c @@ -1,14 +1,32 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtnt.s16.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (float16x8_t a, mve_pred16_t p) { return vcvtnq_x_s16_f16 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtnt.s16.f16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_s32_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_s32_f32.c index c3aa2e3daed1..2ffb1d987369 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_s32_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_s32_f32.c @@ -1,14 +1,32 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtnt.s32.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (float32x4_t a, mve_pred16_t p) { return vcvtnq_x_s32_f32 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtnt.s32.f32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_u16_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_u16_f16.c index 9d9d12f9f2c9..ce2ceb108b2f 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_u16_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_u16_f16.c @@ -1,14 +1,32 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtnt.u16.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (float16x8_t a, mve_pred16_t p) { return vcvtnq_x_u16_f16 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtnt.u16.f16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_u32_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_u32_f32.c index e7df48de88d4..c2c48ef15588 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_u32_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtnq_x_u32_f32.c @@ -1,14 +1,32 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtnt.u32.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (float32x4_t a, mve_pred16_t p) { return vcvtnq_x_u32_f32 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtnt.u32.f32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_s16_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_s16_f16.c index c613fc8883d2..f09c78b77c26 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_s16_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_s16_f16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtpt.s16.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t inactive, float16x8_t a, mve_pred16_t p) { return vcvtpq_m_s16_f16 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtpt.s16.f16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtpt.s16.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t inactive, float16x8_t a, mve_pred16_t p) { return vcvtpq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_s32_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_s32_f32.c index 7f4c7f600e55..7a3d77634062 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_s32_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_s32_f32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtpt.s32.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t inactive, float32x4_t a, mve_pred16_t p) { return vcvtpq_m_s32_f32 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtpt.s32.f32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtpt.s32.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t inactive, float32x4_t a, mve_pred16_t p) { return vcvtpq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_u16_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_u16_f16.c index 192891021f06..f82103ca8316 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_u16_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_u16_f16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtpt.u16.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t inactive, float16x8_t a, mve_pred16_t p) { return vcvtpq_m_u16_f16 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtpt.u16.f16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtpt.u16.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t inactive, float16x8_t a, mve_pred16_t p) { return vcvtpq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_u32_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_u32_f32.c index 61858f7844a6..7c848aa5157c 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_u32_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_m_u32_f32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtpt.u32.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t inactive, float32x4_t a, mve_pred16_t p) { return vcvtpq_m_u32_f32 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtpt.u32.f32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtpt.u32.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t inactive, float32x4_t a, mve_pred16_t p) { return vcvtpq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_s16_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_s16_f16.c index 8615e50bbaad..87258346b531 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_s16_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_s16_f16.c @@ -1,13 +1,28 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcvtp.s16.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (float16x8_t a) { return vcvtpq_s16_f16 (a); } -/* { dg-final { scan-assembler "vcvtp.s16.f16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_s32_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_s32_f32.c index fed7a4b83f79..e4a7d0baaf1e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_s32_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_s32_f32.c @@ -1,13 +1,28 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcvtp.s32.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (float32x4_t a) { return vcvtpq_s32_f32 (a); } -/* { dg-final { scan-assembler "vcvtp.s32.f32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_u16_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_u16_f16.c index 37d1411067f1..94edfcb0244b 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_u16_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_u16_f16.c @@ -1,13 +1,28 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcvtp.u16.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (float16x8_t a) { - return vcvtpq_u16_f16 (a); + return vcvtpq_u16_f16 (a); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vcvtp.u16.f16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_u32_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_u32_f32.c index fcea4c518853..b84501ca72ca 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_u32_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_u32_f32.c @@ -1,13 +1,28 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcvtp.u32.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (float32x4_t a) { - return vcvtpq_u32_f32 (a); + return vcvtpq_u32_f32 (a); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vcvtp.u32.f32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_s16_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_s16_f16.c index 5d550772bfca..2b51cc568679 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_s16_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_s16_f16.c @@ -1,14 +1,32 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtpt.s16.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (float16x8_t a, mve_pred16_t p) { return vcvtpq_x_s16_f16 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtpt.s16.f16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_s32_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_s32_f32.c index 31823ab95286..6c4d66553006 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_s32_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_s32_f32.c @@ -1,14 +1,32 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtpt.s32.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (float32x4_t a, mve_pred16_t p) { return vcvtpq_x_s32_f32 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtpt.s32.f32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_u16_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_u16_f16.c index 0d1808c0fe88..2e663c8a4727 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_u16_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_u16_f16.c @@ -1,14 +1,32 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtpt.u16.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (float16x8_t a, mve_pred16_t p) { return vcvtpq_x_u16_f16 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtpt.u16.f16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_u32_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_u32_f32.c index d73df2129424..2d32425fdbf2 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_u32_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtpq_x_u32_f32.c @@ -1,14 +1,32 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtpt.u32.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (float32x4_t a, mve_pred16_t p) { return vcvtpq_x_u32_f32 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtpt.u32.f32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f16_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f16_s16.c index 560127b7c9fa..9f1647c1ac84 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f16_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f16_s16.c @@ -1,13 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcvt.f16.s16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (int16x8_t a) { return vcvtq_f16_s16 (a); } -/* { dg-final { scan-assembler "vcvt.f16.s16" } } */ + +/* +**foo1: +** ... +** vcvt.f16.s16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ +float16x8_t +foo1 (int16x8_t a) +{ + return vcvtq (a); +} + +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f16_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f16_u16.c index f571c535778e..6704626bd1e9 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f16_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f16_u16.c @@ -1,13 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcvt.f16.u16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (uint16x8_t a) { return vcvtq_f16_u16 (a); } -/* { dg-final { scan-assembler "vcvt.f16.u16" } } */ + +/* +**foo1: +** ... +** vcvt.f16.u16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ +float16x8_t +foo1 (uint16x8_t a) +{ + return vcvtq (a); +} + +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f32_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f32_s32.c index 898c74bfba43..898126468d9b 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f32_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f32_s32.c @@ -1,13 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcvt.f32.s32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (int32x4_t a) { return vcvtq_f32_s32 (a); } -/* { dg-final { scan-assembler "vcvt.f32.s32" } } */ + +/* +**foo1: +** ... +** vcvt.f32.s32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ +float32x4_t +foo1 (int32x4_t a) +{ + return vcvtq (a); +} + +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f32_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f32_u32.c index a44add5d1789..9e9aa1d703e9 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f32_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_f32_u32.c @@ -1,13 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcvt.f32.u32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (uint32x4_t a) { return vcvtq_f32_u32 (a); } -/* { dg-final { scan-assembler "vcvt.f32.u32" } } */ + +/* +**foo1: +** ... +** vcvt.f32.u32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ +float32x4_t +foo1 (uint32x4_t a) +{ + return vcvtq (a); +} + +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f16_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f16_s16.c index 45e9b045af60..b01a9a148c67 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f16_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f16_s16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtt.f16.s16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t inactive, int16x8_t a, mve_pred16_t p) { return vcvtq_m_f16_s16 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtt.f16.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtt.f16.s16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t inactive, int16x8_t a, mve_pred16_t p) { return vcvtq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f16_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f16_u16.c index b50f57234c3d..805e26e72fd1 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f16_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f16_u16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtt.f16.u16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t inactive, uint16x8_t a, mve_pred16_t p) { return vcvtq_m_f16_u16 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtt.f16.u16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtt.f16.u16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t inactive, uint16x8_t a, mve_pred16_t p) { return vcvtq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f32_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f32_s32.c index 4c1af180b58d..7faa130fa3fa 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f32_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f32_s32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtt.f32.s32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t inactive, int32x4_t a, mve_pred16_t p) { return vcvtq_m_f32_s32 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtt.f32.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtt.f32.s32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t inactive, int32x4_t a, mve_pred16_t p) { return vcvtq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f32_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f32_u32.c index 49acef804897..589d4efa61b8 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f32_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_f32_u32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtt.f32.u32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t inactive, uint32x4_t a, mve_pred16_t p) { return vcvtq_m_f32_u32 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtt.f32.u32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtt.f32.u32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t inactive, uint32x4_t a, mve_pred16_t p) { return vcvtq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f16_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f16_s16.c index d5ba7a690a64..3e23f1d88d86 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f16_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f16_s16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtt.f16.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t inactive, int16x8_t a, mve_pred16_t p) { return vcvtq_m_n_f16_s16 (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtt.f16.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtt.f16.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t inactive, int16x8_t a, mve_pred16_t p) { return vcvtq_m_n (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtt.f16.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f16_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f16_u16.c index e53d7fa6ef1f..f6f309cba25c 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f16_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f16_u16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtt.f16.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t inactive, uint16x8_t a, mve_pred16_t p) { return vcvtq_m_n_f16_u16 (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtt.f16.u16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtt.f16.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t inactive, uint16x8_t a, mve_pred16_t p) { return vcvtq_m_n (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtt.f16.u16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f32_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f32_s32.c index 58519c04ff43..e6ff2fd6f446 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f32_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f32_s32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtt.f32.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t inactive, int32x4_t a, mve_pred16_t p) { return vcvtq_m_n_f32_s32 (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtt.f32.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtt.f32.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t inactive, int32x4_t a, mve_pred16_t p) { return vcvtq_m_n (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtt.f32.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f32_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f32_u32.c index 782d1f9e259a..7368f127aab9 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f32_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_f32_u32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtt.f32.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t inactive, uint32x4_t a, mve_pred16_t p) { - return vcvtq_m_n_f32_u32 (inactive, a, 16, p); + return vcvtq_m_n_f32_u32 (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtt.f32.u32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtt.f32.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t inactive, uint32x4_t a, mve_pred16_t p) { - return vcvtq_m_n (inactive, a, 16, p); + return vcvtq_m_n (inactive, a, 1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtt.f32.u32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_s16_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_s16_f16.c index cd3f373aa773..edfb01203dd3 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_s16_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_s16_f16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtt.s16.f16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t inactive, float16x8_t a, mve_pred16_t p) { return vcvtq_m_n_s16_f16 (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtt.s16.f16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtt.s16.f16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t inactive, float16x8_t a, mve_pred16_t p) { return vcvtq_m_n (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtt.s16.f16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_s32_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_s32_f32.c index d1ff5072223b..8084160e7e91 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_s32_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_s32_f32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtt.s32.f32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t inactive, float32x4_t a, mve_pred16_t p) { return vcvtq_m_n_s32_f32 (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtt.s32.f32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtt.s32.f32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t inactive, float32x4_t a, mve_pred16_t p) { return vcvtq_m_n (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtt.s32.f32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_u16_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_u16_f16.c index 4bf12e8b64ec..1d217387ac61 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_u16_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_u16_f16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtt.u16.f16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t inactive, float16x8_t a, mve_pred16_t p) { return vcvtq_m_n_u16_f16 (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtt.u16.f16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtt.u16.f16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t inactive, float16x8_t a, mve_pred16_t p) { return vcvtq_m_n (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtt.u16.f16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_u32_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_u32_f32.c index 4d0b1bf7a7ff..868a1bcc1b86 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_u32_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_n_u32_f32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtt.u32.f32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t inactive, float32x4_t a, mve_pred16_t p) { return vcvtq_m_n_u32_f32 (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtt.u32.f32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtt.u32.f32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t inactive, float32x4_t a, mve_pred16_t p) { return vcvtq_m_n (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtt.u32.f32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_s16_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_s16_f16.c index 606e43614eaa..a998cdcb11a5 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_s16_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_s16_f16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtt.s16.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t inactive, float16x8_t a, mve_pred16_t p) { return vcvtq_m_s16_f16 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtt.s16.f16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtt.s16.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t inactive, float16x8_t a, mve_pred16_t p) { return vcvtq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_s32_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_s32_f32.c index 2204e7929ecd..fdaeac453a40 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_s32_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_s32_f32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtt.s32.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t inactive, float32x4_t a, mve_pred16_t p) { return vcvtq_m_s32_f32 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtt.s32.f32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtt.s32.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t inactive, float32x4_t a, mve_pred16_t p) { return vcvtq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_u16_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_u16_f16.c index 1f814251c4fe..f168d3716151 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_u16_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_u16_f16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtt.u16.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t inactive, float16x8_t a, mve_pred16_t p) { return vcvtq_m_u16_f16 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtt.u16.f16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtt.u16.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t inactive, float16x8_t a, mve_pred16_t p) { return vcvtq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_u32_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_u32_f32.c index 13cd6f28884b..83e5ae381060 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_u32_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_m_u32_f32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtt.u32.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t inactive, float32x4_t a, mve_pred16_t p) { return vcvtq_m_u32_f32 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtt.u32.f32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtt.u32.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t inactive, float32x4_t a, mve_pred16_t p) { return vcvtq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f16_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f16_s16.c index 565012e4e93f..5c0172218891 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f16_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f16_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcvt.f16.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (int16x8_t a) { return vcvtq_n_f16_s16 (a, 1); } -/* { dg-final { scan-assembler "vcvt.f16.s16" } } */ +/* +**foo1: +** ... +** vcvt.f16.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo1 (int16x8_t a) { return vcvtq_n (a, 1); } -/* { dg-final { scan-assembler "vcvt.f16.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f16_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f16_u16.c index 95acc29683f9..1080a5a03099 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f16_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f16_u16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcvt.f16.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (uint16x8_t a) { return vcvtq_n_f16_u16 (a, 1); } -/* { dg-final { scan-assembler "vcvt.f16.u16" } } */ +/* +**foo1: +** ... +** vcvt.f16.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo1 (uint16x8_t a) { return vcvtq_n (a, 1); } -/* { dg-final { scan-assembler "vcvt.f16.u16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f32_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f32_s32.c index 5285099bc2a3..020138b00844 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f32_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f32_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcvt.f32.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (int32x4_t a) { return vcvtq_n_f32_s32 (a, 1); } -/* { dg-final { scan-assembler "vcvt.f32.s32" } } */ +/* +**foo1: +** ... +** vcvt.f32.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo1 (int32x4_t a) { return vcvtq_n (a, 1); } -/* { dg-final { scan-assembler "vcvt.f32.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f32_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f32_u32.c index ad6335116bce..3f1c3c8c9e4f 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f32_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_f32_u32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcvt.f32.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (uint32x4_t a) { return vcvtq_n_f32_u32 (a, 1); } -/* { dg-final { scan-assembler "vcvt.f32.u32" } } */ +/* +**foo1: +** ... +** vcvt.f32.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo1 (uint32x4_t a) { return vcvtq_n (a, 1); } -/* { dg-final { scan-assembler "vcvt.f32.u32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_s16_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_s16_f16.c index ed3dd1a87d65..d16c114e00b7 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_s16_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_s16_f16.c @@ -1,13 +1,28 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcvt.s16.f16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (float16x8_t a) { return vcvtq_n_s16_f16 (a, 1); } -/* { dg-final { scan-assembler "vcvt.s16.f16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_s32_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_s32_f32.c index e7f63f8cdd20..9256cb48a269 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_s32_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_s32_f32.c @@ -1,13 +1,28 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcvt.s32.f32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (float32x4_t a) { return vcvtq_n_s32_f32 (a, 1); } -/* { dg-final { scan-assembler "vcvt.s32.f32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_u16_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_u16_f16.c index ca2fdca9b497..1038af8f8902 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_u16_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_u16_f16.c @@ -1,13 +1,28 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcvt.u16.f16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (float16x8_t a) { return vcvtq_n_u16_f16 (a, 1); } -/* { dg-final { scan-assembler "vcvt.u16.f16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_u32_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_u32_f32.c index 2919ea5b3641..5c06365b320e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_u32_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_n_u32_f32.c @@ -1,13 +1,28 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcvt.u32.f32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (float32x4_t a) { return vcvtq_n_u32_f32 (a, 1); } -/* { dg-final { scan-assembler "vcvt.u32.f32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_s16_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_s16_f16.c index 8269bf949bf7..ecec3727529d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_s16_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_s16_f16.c @@ -1,13 +1,28 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcvt.s16.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (float16x8_t a) { return vcvtq_s16_f16 (a); } -/* { dg-final { scan-assembler "vcvt.s16.f16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_s32_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_s32_f32.c index 2af96d259179..9be17c0696c9 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_s32_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_s32_f32.c @@ -1,13 +1,28 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcvt.s32.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (float32x4_t a) { return vcvtq_s32_f32 (a); } -/* { dg-final { scan-assembler "vcvt.s32.f32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_u16_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_u16_f16.c index afac0f4d4146..3c33f2ce5b18 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_u16_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_u16_f16.c @@ -1,13 +1,28 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcvt.u16.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (float16x8_t a) { - return vcvtq_u16_f16 (a); + return vcvtq_u16_f16 (a); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vcvt.u16.f16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_u32_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_u32_f32.c index 7380f73301ae..8e70df955b93 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_u32_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_u32_f32.c @@ -1,13 +1,28 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcvt.u32.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (float32x4_t a) { - return vcvtq_u32_f32 (a); + return vcvtq_u32_f32 (a); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vcvt.u32.f32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f16_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f16_s16.c index c6b9c1005f5a..73b368fdd4f2 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f16_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f16_s16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtt.f16.s16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (int16x8_t a, mve_pred16_t p) { return vcvtq_x_f16_s16 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtt.f16.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtt.f16.s16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo1 (int16x8_t a, mve_pred16_t p) { return vcvtq_x (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtt.f16.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f16_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f16_u16.c index d3ef02c19314..13d7fed2f5b7 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f16_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f16_u16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtt.f16.u16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (uint16x8_t a, mve_pred16_t p) { return vcvtq_x_f16_u16 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtt.f16.u16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtt.f16.u16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo1 (uint16x8_t a, mve_pred16_t p) { return vcvtq_x (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtt.f16.u16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f32_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f32_s32.c index fa73ad69ce58..d14099c87a63 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f32_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f32_s32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtt.f32.s32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (int32x4_t a, mve_pred16_t p) { return vcvtq_x_f32_s32 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtt.f32.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtt.f32.s32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo1 (int32x4_t a, mve_pred16_t p) { return vcvtq_x (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtt.f32.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f32_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f32_u32.c index 99ca3881553c..800d8aa8e8ec 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f32_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_f32_u32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtt.f32.u32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (uint32x4_t a, mve_pred16_t p) { return vcvtq_x_f32_u32 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtt.f32.u32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtt.f32.u32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo1 (uint32x4_t a, mve_pred16_t p) { return vcvtq_x (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtt.f32.u32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f16_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f16_s16.c index 718c83e74dfd..f91021d57350 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f16_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f16_s16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtt.f16.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (int16x8_t a, mve_pred16_t p) { return vcvtq_x_n_f16_s16 (a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtt.f16.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtt.f16.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo1 (int16x8_t a, mve_pred16_t p) { return vcvtq_x_n (a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtt.f16.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f16_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f16_u16.c index 510c29c383a3..f4c444b5540b 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f16_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f16_u16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtt.f16.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (uint16x8_t a, mve_pred16_t p) { return vcvtq_x_n_f16_u16 (a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtt.f16.u16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtt.f16.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo1 (uint16x8_t a, mve_pred16_t p) { return vcvtq_x_n (a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtt.f16.u16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f32_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f32_s32.c index 34f7cc1e061e..7c11f1f0c345 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f32_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f32_s32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtt.f32.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (int32x4_t a, mve_pred16_t p) { return vcvtq_x_n_f32_s32 (a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtt.f32.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtt.f32.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo1 (int32x4_t a, mve_pred16_t p) { return vcvtq_x_n (a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtt.f32.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f32_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f32_u32.c index b5b20efc1b82..96a1d2c88763 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f32_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_f32_u32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtt.f32.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (uint32x4_t a, mve_pred16_t p) { - return vcvtq_x_n_f32_u32 (a, 16, p); + return vcvtq_x_n_f32_u32 (a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtt.f32.u32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtt.f32.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo1 (uint32x4_t a, mve_pred16_t p) { - return vcvtq_x_n (a, 16, p); + return vcvtq_x_n (a, 1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtt.f32.u32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_s16_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_s16_f16.c index 3c3343ae4e1b..7c0f551d66f2 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_s16_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_s16_f16.c @@ -1,14 +1,32 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtt.s16.f16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (float16x8_t a, mve_pred16_t p) { return vcvtq_x_n_s16_f16 (a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtt.s16.f16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_s32_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_s32_f32.c index 17ef866af397..c22eeb75a17c 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_s32_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_s32_f32.c @@ -1,14 +1,32 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtt.s32.f32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (float32x4_t a, mve_pred16_t p) { return vcvtq_x_n_s32_f32 (a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtt.s32.f32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_u16_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_u16_f16.c index 62e6f1638d5d..7f07b0fac530 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_u16_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_u16_f16.c @@ -1,14 +1,32 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtt.u16.f16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (float16x8_t a, mve_pred16_t p) { return vcvtq_x_n_u16_f16 (a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtt.u16.f16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_u32_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_u32_f32.c index 306e32016ff0..7531db7d575c 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_u32_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_n_u32_f32.c @@ -1,14 +1,32 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtt.u32.f32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (float32x4_t a, mve_pred16_t p) { return vcvtq_x_n_u32_f32 (a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtt.u32.f32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_s16_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_s16_f16.c index 56867da3bb0f..fd90d67b46cd 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_s16_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_s16_f16.c @@ -1,14 +1,32 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtt.s16.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (float16x8_t a, mve_pred16_t p) { return vcvtq_x_s16_f16 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtt.s16.f16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_s32_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_s32_f32.c index 4449bd68c546..e6cbbeaca2a1 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_s32_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_s32_f32.c @@ -1,14 +1,32 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtt.s32.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (float32x4_t a, mve_pred16_t p) { return vcvtq_x_s32_f32 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtt.s32.f32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_u16_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_u16_f16.c index 580bb775c593..29d1d9d5c565 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_u16_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_u16_f16.c @@ -1,14 +1,32 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtt.u16.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (float16x8_t a, mve_pred16_t p) { return vcvtq_x_u16_f16 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtt.u16.f16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_u32_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_u32_f32.c index 3722de632e52..0181850d8574 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_u32_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvtq_x_u32_f32.c @@ -1,14 +1,32 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvtt.u32.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (float32x4_t a, mve_pred16_t p) { return vcvtq_x_u32_f32 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvtt.u32.f32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_f16_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_f16_f32.c index 599e30e3d26b..3c9a6844e015 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_f16_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_f16_f32.c @@ -1,13 +1,28 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcvtt.f16.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t a, float32x4_t b) { return vcvttq_f16_f32 (a, b); } -/* { dg-final { scan-assembler "vcvtt.f16.f32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_f32_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_f32_f16.c index a4a7997d2dd2..9d389382ae99 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_f32_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_f32_f16.c @@ -1,13 +1,28 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vcvtt.f32.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (float16x8_t a) { return vcvttq_f32_f16 (a); } -/* { dg-final { scan-assembler "vcvtt.f32.f16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_m_f16_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_m_f16_f32.c index 065974d7e76e..2eeb670a5a2e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_m_f16_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_m_f16_f32.c @@ -1,22 +1,32 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvttt.f16.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t a, float32x4_t b, mve_pred16_t p) { return vcvttq_m_f16_f32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvttt.f16.f32" } } */ - -float16x8_t -foo1 (float16x8_t a, float32x4_t b, mve_pred16_t p) -{ - return vcvttq_m (a, b, p); +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_m_f32_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_m_f32_f16.c index 1eb69e4fee91..ba309114dae0 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_m_f32_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_m_f32_f16.c @@ -1,22 +1,32 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvttt.f32.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t inactive, float16x8_t a, mve_pred16_t p) { return vcvttq_m_f32_f16 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvttt.f32.f16" } } */ - -float32x4_t -foo1 (float32x4_t inactive, float16x8_t a, mve_pred16_t p) -{ - return vcvttq_m (inactive, a, p); +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_x_f32_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_x_f32_f16.c index 921caba0e1bb..29688a939dd9 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_x_f32_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcvttq_x_f32_f16.c @@ -1,14 +1,32 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vcvttt.f32.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (float16x8_t a, mve_pred16_t p) { return vcvttq_x_f32_f16 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vcvttt.f32.f16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_f16.c index 90cd663c7f32..0c27a1c56642 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_f16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** veor q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t a, float16x8_t b) { return veorq_f16 (a, b); } -/* { dg-final { scan-assembler "veor" } } */ +/* +**foo1: +** ... +** veor q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t a, float16x8_t b) { return veorq (a, b); } -/* { dg-final { scan-assembler "veor" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_f32.c index e9ad87a9796a..cbf67e335efc 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_f32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** veor q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t a, float32x4_t b) { return veorq_f32 (a, b); } -/* { dg-final { scan-assembler "veor" } } */ +/* +**foo1: +** ... +** veor q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t a, float32x4_t b) { return veorq (a, b); } -/* { dg-final { scan-assembler "veor" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_f16.c index a39d680e0cdc..5d9831f8d348 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_f16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p) { return veorq_m_f16 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "veort" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p) { return veorq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "veort" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_f32.c index a5dbfc4725e4..ea992de1fbcd 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_f32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p) { return veorq_m_f32 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "veort" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p) { return veorq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "veort" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_s16.c index 9ab271ac987b..f2b8b91aa135 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_s16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) { return veorq_m_s16 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "veort" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) { return veorq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "veort" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_s32.c index 45d5074e32bd..c9573f732aa2 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_s32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) { return veorq_m_s32 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "veort" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) { return veorq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "veort" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_s8.c index 5b8ac0a286e9..86cb8ed31c8d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_s8.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) { return veorq_m_s8 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "veort" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) { return veorq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "veort" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_u16.c index e436a9e65364..7b2b1ea1596d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_u16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return veorq_m_u16 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "veort" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return veorq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "veort" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_u32.c index 631abb515fdd..3d3b2bbb4e6e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_u32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return veorq_m_u32 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "veort" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return veorq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "veort" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_u8.c index ba65042f9869..7d2baba6e8ec 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_m_u8.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return veorq_m_u8 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "veort" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return veorq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "veort" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_s16.c index b49e35c887fa..8275da1d7fef 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** veor q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int16x8_t b) { return veorq_s16 (a, b); } -/* { dg-final { scan-assembler "veor" } } */ +/* +**foo1: +** ... +** veor q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int16x8_t b) { return veorq (a, b); } -/* { dg-final { scan-assembler "veor" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_s32.c index 9b6414b8458c..ea111b4256d1 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** veor q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a, int32x4_t b) { return veorq_s32 (a, b); } -/* { dg-final { scan-assembler "veor" } } */ +/* +**foo1: +** ... +** veor q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a, int32x4_t b) { return veorq (a, b); } -/* { dg-final { scan-assembler "veor" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_s8.c index 4a18bf5a1657..f40dddcbb6e2 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_s8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** veor q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int8x16_t b) { return veorq_s8 (a, b); } -/* { dg-final { scan-assembler "veor" } } */ +/* +**foo1: +** ... +** veor q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int8x16_t b) { return veorq (a, b); } -/* { dg-final { scan-assembler "veor" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_u16.c index 90d5a5a6021c..f16ddc14e090 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_u16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** veor q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, uint16x8_t b) { return veorq_u16 (a, b); } -/* { dg-final { scan-assembler "veor" } } */ +/* +**foo1: +** ... +** veor q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, uint16x8_t b) { return veorq (a, b); } -/* { dg-final { scan-assembler "veor" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_u32.c index b6103d68638b..33213c53aa76 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_u32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** veor q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t a, uint32x4_t b) { return veorq_u32 (a, b); } -/* { dg-final { scan-assembler "veor" } } */ +/* +**foo1: +** ... +** veor q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t a, uint32x4_t b) { return veorq (a, b); } -/* { dg-final { scan-assembler "veor" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_u8.c index 86fccc1bef01..aba155b1023b 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_u8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** veor q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, uint8x16_t b) { return veorq_u8 (a, b); } -/* { dg-final { scan-assembler "veor" } } */ +/* +**foo1: +** ... +** veor q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, uint8x16_t b) { return veorq (a, b); } -/* { dg-final { scan-assembler "veor" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_f16.c index eb9e44cb777d..8eac5ee6ae0f 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_f16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t a, float16x8_t b, mve_pred16_t p) { return veorq_x_f16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "veort" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p) { return veorq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "veort" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_f32.c index 3503250e5c38..3e71870daf0b 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_f32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t a, float32x4_t b, mve_pred16_t p) { return veorq_x_f32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "veort" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p) { return veorq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "veort" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_s16.c index 837210bb6091..fd0326471172 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_s16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int16x8_t b, mve_pred16_t p) { return veorq_x_s16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "veort" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) { return veorq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "veort" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_s32.c index 93796e333abb..ec67ddc761b2 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_s32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a, int32x4_t b, mve_pred16_t p) { return veorq_x_s32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "veort" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) { return veorq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "veort" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_s8.c index ed88d43834d3..35a1dfdab8a7 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_s8.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int8x16_t b, mve_pred16_t p) { return veorq_x_s8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "veort" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) { return veorq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "veort" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_u16.c index e6e82d8076dc..7aad6d6f5c1e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_u16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return veorq_x_u16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "veort" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return veorq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "veort" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_u32.c index 17393d80233c..315241581f83 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_u32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return veorq_x_u32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "veort" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return veorq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "veort" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_u8.c index 027968dab2df..615b1e645b19 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/veorq_x_u8.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return veorq_x_u8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "veort" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** veort q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return veorq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "veort" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_f16.c index 8c926bdf1c35..18a184a0e980 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_f16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vfma.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t -foo (float16x8_t a, float16x8_t b, float16x8_t c) +foo (float16x8_t add, float16x8_t m1, float16x8_t m2) { - return vfmaq_f16 (a, b, c); + return vfmaq_f16 (add, m1, m2); } -/* { dg-final { scan-assembler "vfma.f16" } } */ +/* +**foo1: +** ... +** vfma.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t -foo1 (float16x8_t a, float16x8_t b, float16x8_t c) +foo1 (float16x8_t add, float16x8_t m1, float16x8_t m2) { - return vfmaq (a, b, c); + return vfmaq (add, m1, m2); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vfma.f16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_f32.c index c2fff9a43ea7..5d67439b11ee 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_f32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vfma.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t -foo (float32x4_t a, float32x4_t b, float32x4_t c) +foo (float32x4_t add, float32x4_t m1, float32x4_t m2) { - return vfmaq_f32 (a, b, c); + return vfmaq_f32 (add, m1, m2); } -/* { dg-final { scan-assembler "vfma.f32" } } */ +/* +**foo1: +** ... +** vfma.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t -foo1 (float32x4_t a, float32x4_t b, float32x4_t c) +foo1 (float32x4_t add, float32x4_t m1, float32x4_t m2) { - return vfmaq (a, b, c); + return vfmaq (add, m1, m2); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vfma.f32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_f16.c index e8453e0cb417..e094cba8acb7 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_f16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vfmat.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t -foo (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p) +foo (float16x8_t add, float16x8_t m1, float16x8_t m2, mve_pred16_t p) { - return vfmaq_m_f16 (a, b, c, p); + return vfmaq_m_f16 (add, m1, m2, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vfmat.f16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vfmat.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t -foo1 (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p) +foo1 (float16x8_t add, float16x8_t m1, float16x8_t m2, mve_pred16_t p) { - return vfmaq_m (a, b, c, p); + return vfmaq_m (add, m1, m2, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vfmat.f16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_f32.c index 9d1844eba5a9..3003eff236a3 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_f32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vfmat.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t -foo (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p) +foo (float32x4_t add, float32x4_t m1, float32x4_t m2, mve_pred16_t p) { - return vfmaq_m_f32 (a, b, c, p); + return vfmaq_m_f32 (add, m1, m2, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vfmat.f32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vfmat.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t -foo1 (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p) +foo1 (float32x4_t add, float32x4_t m1, float32x4_t m2, mve_pred16_t p) { - return vfmaq_m (a, b, c, p); + return vfmaq_m (add, m1, m2, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vfmat.f32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_n_f16.c index 888016e81649..4603f038467a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_n_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_n_f16.c @@ -1,23 +1,65 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vfmat.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ float16x8_t -foo (float16x8_t a, float16x8_t b, float16_t c, mve_pred16_t p) +foo (float16x8_t add, float16x8_t m1, float16_t m2, mve_pred16_t p) { - return vfmaq_m_n_f16 (a, b, c, p); + return vfmaq_m_n_f16 (add, m1, m2, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vfmat.f16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vfmat.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ float16x8_t -foo1 (float16x8_t a, float16x8_t b, float16_t c, mve_pred16_t p) +foo1 (float16x8_t add, float16x8_t m1, float16_t m2, mve_pred16_t p) { - return vfmaq_m (a, b, c, p); + return vfmaq_m (add, m1, m2, p); +} + +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vfmat.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +float16x8_t +foo2 (float16x8_t add, float16x8_t m1, mve_pred16_t p) +{ + return vfmaq_m (add, m1, 1.1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vfmat.f16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_n_f32.c index f9afc8845b00..ad0ff907810f 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_n_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_m_n_f32.c @@ -1,23 +1,65 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vfmat.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ float32x4_t -foo (float32x4_t a, float32x4_t b, float32_t c, mve_pred16_t p) +foo (float32x4_t add, float32x4_t m1, float32_t m2, mve_pred16_t p) { - return vfmaq_m_n_f32 (a, b, c, p); + return vfmaq_m_n_f32 (add, m1, m2, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vfmat.f32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vfmat.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ float32x4_t -foo1 (float32x4_t a, float32x4_t b, float32_t c, mve_pred16_t p) +foo1 (float32x4_t add, float32x4_t m1, float32_t m2, mve_pred16_t p) { - return vfmaq_m (a, b, c, p); + return vfmaq_m (add, m1, m2, p); +} + +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vfmat.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +float32x4_t +foo2 (float32x4_t add, float32x4_t m1, mve_pred16_t p) +{ + return vfmaq_m (add, m1, 1.1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vfmat.f32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_n_f16.c index 208c46f59605..8e8738bc10a5 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_n_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_n_f16.c @@ -1,21 +1,53 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vfma.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ float16x8_t -foo (float16x8_t a, float16x8_t b, float16_t c) +foo (float16x8_t add, float16x8_t m1, float16_t m2) { - return vfmaq_n_f16 (a, b, c); + return vfmaq_n_f16 (add, m1, m2); } -/* { dg-final { scan-assembler "vfma.f16" } } */ +/* +**foo1: +** ... +** vfma.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ float16x8_t -foo1 (float16x8_t a, float16x8_t b, float16_t c) +foo1 (float16x8_t add, float16x8_t m1, float16_t m2) { - return vfmaq (a, b, c); + return vfmaq (add, m1, m2); +} + +/* +**foo2: +** ... +** vfma.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +float16x8_t +foo2 (float16x8_t add, float16x8_t m1) +{ + return vfmaq (add, m1, 1.1); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vfma.f16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_n_f32.c index 664533239b77..4781e089ffbf 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_n_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmaq_n_f32.c @@ -1,21 +1,53 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vfma.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ float32x4_t -foo (float32x4_t a, float32x4_t b, float32_t c) +foo (float32x4_t add, float32x4_t m1, float32_t m2) { - return vfmaq_n_f32 (a, b, c); + return vfmaq_n_f32 (add, m1, m2); } -/* { dg-final { scan-assembler "vfma.f32" } } */ +/* +**foo1: +** ... +** vfma.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ float32x4_t -foo1 (float32x4_t a, float32x4_t b, float32_t c) +foo1 (float32x4_t add, float32x4_t m1, float32_t m2) { - return vfmaq (a, b, c); + return vfmaq (add, m1, m2); +} + +/* +**foo2: +** ... +** vfma.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +float32x4_t +foo2 (float32x4_t add, float32x4_t m1) +{ + return vfmaq (add, m1, 1.1); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vfma.f32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16.c index 7f427bd6140e..3f57b80874e8 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16.c @@ -62,4 +62,4 @@ foo2 (float16x8_t m1, float16x8_t m2, mve_pred16_t p) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32.c index 99a106982fa6..728633f5c9e4 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32.c @@ -62,4 +62,4 @@ foo2 (float32x4_t m1, float32x4_t m2, mve_pred16_t p) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_n_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_n_f16.c index ce9bf48d6571..def309387fab 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_n_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_n_f16.c @@ -1,21 +1,53 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vfmas.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ float16x8_t -foo (float16x8_t a, float16x8_t b, float16_t c) +foo (float16x8_t m1, float16x8_t m2, float16_t add) { - return vfmasq_n_f16 (a, b, c); + return vfmasq_n_f16 (m1, m2, add); } -/* { dg-final { scan-assembler "vfmas.f16" } } */ +/* +**foo1: +** ... +** vfmas.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ float16x8_t -foo1 (float16x8_t a, float16x8_t b, float16_t c) +foo1 (float16x8_t m1, float16x8_t m2, float16_t add) { - return vfmasq (a, b, c); + return vfmasq (m1, m2, add); +} + +/* +**foo2: +** ... +** vfmas.f16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +float16x8_t +foo2 (float16x8_t m1, float16x8_t m2) +{ + return vfmasq (m1, m2, 1.1); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vfmas.f16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_n_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_n_f32.c index 46c5a3206445..c761bdcb1098 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_n_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmasq_n_f32.c @@ -1,21 +1,53 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vfmas.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ float32x4_t -foo (float32x4_t a, float32x4_t b, float32_t c) +foo (float32x4_t m1, float32x4_t m2, float32_t add) { - return vfmasq_n_f32 (a, b, c); + return vfmasq_n_f32 (m1, m2, add); } -/* { dg-final { scan-assembler "vfmas.f32" } } */ +/* +**foo1: +** ... +** vfmas.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ float32x4_t -foo1 (float32x4_t a, float32x4_t b, float32_t c) +foo1 (float32x4_t m1, float32x4_t m2, float32_t add) { - return vfmasq (a, b, c); + return vfmasq (m1, m2, add); +} + +/* +**foo2: +** ... +** vfmas.f32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +float32x4_t +foo2 (float32x4_t m1, float32x4_t m2) +{ + return vfmasq (m1, m2, 1.1); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vfmas.f32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_f16.c index 32475013fd4a..607668ebc478 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_f16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vfms.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t -foo (float16x8_t a, float16x8_t b, float16x8_t c) +foo (float16x8_t add, float16x8_t m1, float16x8_t m2) { - return vfmsq_f16 (a, b, c); + return vfmsq_f16 (add, m1, m2); } -/* { dg-final { scan-assembler "vfms.f16" } } */ +/* +**foo1: +** ... +** vfms.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t -foo1 (float16x8_t a, float16x8_t b, float16x8_t c) +foo1 (float16x8_t add, float16x8_t m1, float16x8_t m2) { - return vfmsq (a, b, c); + return vfmsq (add, m1, m2); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vfms.f16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_f32.c index fbdabd188d5c..ac18e9e3d9c2 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_f32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vfms.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t -foo (float32x4_t a, float32x4_t b, float32x4_t c) +foo (float32x4_t add, float32x4_t m1, float32x4_t m2) { - return vfmsq_f32 (a, b, c); + return vfmsq_f32 (add, m1, m2); } -/* { dg-final { scan-assembler "vfms.f32" } } */ +/* +**foo1: +** ... +** vfms.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t -foo1 (float32x4_t a, float32x4_t b, float32x4_t c) +foo1 (float32x4_t add, float32x4_t m1, float32x4_t m2) { - return vfmsq (a, b, c); + return vfmsq (add, m1, m2); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vfms.f32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_m_f16.c index ccbbfc1606ce..f530e0b0614d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_m_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_m_f16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vfmst.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t -foo (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p) +foo (float16x8_t add, float16x8_t m1, float16x8_t m2, mve_pred16_t p) { - return vfmsq_m_f16 (a, b, c, p); + return vfmsq_m_f16 (add, m1, m2, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vfmst.f16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vfmst.f16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t -foo1 (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p) +foo1 (float16x8_t add, float16x8_t m1, float16x8_t m2, mve_pred16_t p) { - return vfmsq_m (a, b, c, p); + return vfmsq_m (add, m1, m2, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vfmst.f16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_m_f32.c index 219492a2ad90..6faca5a2e84e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_m_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vfmsq_m_f32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vfmst.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t -foo (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p) +foo (float32x4_t add, float32x4_t m1, float32x4_t m2, mve_pred16_t p) { - return vfmsq_m_f32 (a, b, c, p); + return vfmsq_m_f32 (add, m1, m2, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vfmst.f32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vfmst.f32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t -foo1 (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p) +foo1 (float32x4_t add, float32x4_t m1, float32x4_t m2, mve_pred16_t p) { - return vfmsq_m (a, b, c, p); + return vfmsq_m (add, m1, m2, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vfmst.f32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s16.c index f4a1311980a5..7e39b75a7bfd 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vhcaddt.s16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) { return vhcaddq_rot270_m_s16 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vhcaddt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vhcaddt.s16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) { return vhcaddq_rot270_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vhcaddt.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s32.c index 4697eb25458a..57096076913c 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vhcaddt.s32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) { return vhcaddq_rot270_m_s32 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vhcaddt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vhcaddt.s32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) { return vhcaddq_rot270_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vhcaddt.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s8.c index ff547e835885..d47a99e29a81 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_m_s8.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vhcaddt.s8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) { return vhcaddq_rot270_m_s8 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vhcaddt.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vhcaddt.s8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) { return vhcaddq_rot270_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vhcaddt.s8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s16.c index 75346b2e349b..01324c003c7f 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vhcadd.s16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int16x8_t b) { return vhcaddq_rot270_s16 (a, b); } -/* { dg-final { scan-assembler "vhcadd.s16" } } */ +/* +**foo1: +** ... +** vhcadd.s16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int16x8_t b) { return vhcaddq_rot270 (a, b); } -/* { dg-final { scan-assembler "vhcadd.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s32.c index 0d458f100afe..344d1ebf4a70 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vhcadd.s32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a, int32x4_t b) { return vhcaddq_rot270_s32 (a, b); } -/* { dg-final { scan-assembler "vhcadd.s32" } } */ +/* +**foo1: +** ... +** vhcadd.s32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a, int32x4_t b) { return vhcaddq_rot270 (a, b); } -/* { dg-final { scan-assembler "vhcadd.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s8.c index 5106bb7d45bd..0ee4cfb4095c 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_s8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vhcadd.s8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int8x16_t b) { return vhcaddq_rot270_s8 (a, b); } -/* { dg-final { scan-assembler "vhcadd.s8" } } */ +/* +**foo1: +** ... +** vhcadd.s8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int8x16_t b) { return vhcaddq_rot270 (a, b); } -/* { dg-final { scan-assembler "vhcadd.s8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s16.c index 73f4784cd352..c3e70ad9e2a1 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vhcaddt.s16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int16x8_t b, mve_pred16_t p) { return vhcaddq_rot270_x_s16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vhcaddt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vhcaddt.s16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) { return vhcaddq_rot270_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s32.c index 69c7cb7b0e60..6f14d2af44d0 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vhcaddt.s32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a, int32x4_t b, mve_pred16_t p) { return vhcaddq_rot270_x_s32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vhcaddt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vhcaddt.s32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) { return vhcaddq_rot270_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s8.c index df4aff74bffa..32bfb6cf3bcd 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot270_x_s8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vhcaddt.s8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int8x16_t b, mve_pred16_t p) { return vhcaddq_rot270_x_s8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vhcaddt.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vhcaddt.s8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) { return vhcaddq_rot270_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s16.c index 5461fc267412..a7a870e78dfe 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vhcaddt.s16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) { return vhcaddq_rot90_m_s16 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vhcaddt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vhcaddt.s16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) { return vhcaddq_rot90_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vhcaddt.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s32.c index 20d2711aadba..1e6ef8f9aaad 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vhcaddt.s32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) { return vhcaddq_rot90_m_s32 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vhcaddt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vhcaddt.s32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) { return vhcaddq_rot90_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vhcaddt.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s8.c index 554757535128..147d647d27f7 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_m_s8.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vhcaddt.s8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) { return vhcaddq_rot90_m_s8 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vhcaddt.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vhcaddt.s8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) { return vhcaddq_rot90_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vhcaddt.s8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s16.c index 539f9b00bd23..76747d669bb6 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vhcadd.s16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int16x8_t b) { return vhcaddq_rot90_s16 (a, b); } -/* { dg-final { scan-assembler "vhcadd.s16" } } */ +/* +**foo1: +** ... +** vhcadd.s16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int16x8_t b) { return vhcaddq_rot90 (a, b); } -/* { dg-final { scan-assembler "vhcadd.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s32.c index 841c52942533..8b9b8ad7aa9a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vhcadd.s32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a, int32x4_t b) { return vhcaddq_rot90_s32 (a, b); } -/* { dg-final { scan-assembler "vhcadd.s32" } } */ +/* +**foo1: +** ... +** vhcadd.s32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a, int32x4_t b) { return vhcaddq_rot90 (a, b); } -/* { dg-final { scan-assembler "vhcadd.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s8.c index d2992c2f2809..5e9b004f7ccc 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_s8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vhcadd.s8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int8x16_t b) { return vhcaddq_rot90_s8 (a, b); } -/* { dg-final { scan-assembler "vhcadd.s8" } } */ +/* +**foo1: +** ... +** vhcadd.s8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int8x16_t b) { return vhcaddq_rot90 (a, b); } -/* { dg-final { scan-assembler "vhcadd.s8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s16.c index 0d677f7f1494..d3416d656587 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vhcaddt.s16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int16x8_t b, mve_pred16_t p) { return vhcaddq_rot90_x_s16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vhcaddt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vhcaddt.s16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) { return vhcaddq_rot90_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s32.c index a54af77440fa..b0255e5141c2 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vhcaddt.s32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a, int32x4_t b, mve_pred16_t p) { return vhcaddq_rot90_x_s32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vhcaddt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vhcaddt.s32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) { return vhcaddq_rot90_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s8.c index 5205cd37debd..10f5f31f26ec 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhcaddq_rot90_x_s8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vhcaddt.s8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int8x16_t b, mve_pred16_t p) { return vhcaddq_rot90_x_s8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vhcaddt.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vhcaddt.s8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) { return vhcaddq_rot90_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_s16.c index 2a7a79e62ea5..f05d04b1f3dc 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_s16.c @@ -1,21 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmladavt.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t -foo (int16x8_t a, int16x8_t b, mve_pred16_t p) +foo (int16x8_t m1, int16x8_t m2, mve_pred16_t p) { - return vmladavq_p_s16 (a, b, p); + return vmladavq_p_s16 (m1, m2, p); } -/* { dg-final { scan-assembler "vmladavt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmladavt.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t -foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) +foo1 (int16x8_t m1, int16x8_t m2, mve_pred16_t p) { - return vmladavq_p (a, b, p); + return vmladavq_p (m1, m2, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vmladavt.s16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_s32.c index 6b1181440758..397bb9fb4ec4 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_s32.c @@ -1,21 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmladavt.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t -foo (int32x4_t a, int32x4_t b, mve_pred16_t p) +foo (int32x4_t m1, int32x4_t m2, mve_pred16_t p) { - return vmladavq_p_s32 (a, b, p); + return vmladavq_p_s32 (m1, m2, p); } -/* { dg-final { scan-assembler "vmladavt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmladavt.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t -foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) +foo1 (int32x4_t m1, int32x4_t m2, mve_pred16_t p) { - return vmladavq_p (a, b, p); + return vmladavq_p (m1, m2, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vmladavt.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_s8.c index b3a4e11fa246..25c11d200adf 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_s8.c @@ -1,21 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmladavt.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t -foo (int8x16_t a, int8x16_t b, mve_pred16_t p) +foo (int8x16_t m1, int8x16_t m2, mve_pred16_t p) { - return vmladavq_p_s8 (a, b, p); + return vmladavq_p_s8 (m1, m2, p); } -/* { dg-final { scan-assembler "vmladavt.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmladavt.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t -foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) +foo1 (int8x16_t m1, int8x16_t m2, mve_pred16_t p) { - return vmladavq_p (a, b, p); + return vmladavq_p (m1, m2, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vmladavt.s8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_u16.c index 0ff2ffdc5f2f..064d2c22a235 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_u16.c @@ -1,21 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmladavt.u16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32_t -foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p) +foo (uint16x8_t m1, uint16x8_t m2, mve_pred16_t p) { - return vmladavq_p_u16 (a, b, p); + return vmladavq_p_u16 (m1, m2, p); } -/* { dg-final { scan-assembler "vmladavt.u16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmladavt.u16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32_t -foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p) +foo1 (uint16x8_t m1, uint16x8_t m2, mve_pred16_t p) { - return vmladavq_p (a, b, p); + return vmladavq_p (m1, m2, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vmladavt.u16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_u32.c index c5d213d4c0b0..f5f3de9f0e83 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_u32.c @@ -1,21 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmladavt.u32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32_t -foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p) +foo (uint32x4_t m1, uint32x4_t m2, mve_pred16_t p) { - return vmladavq_p_u32 (a, b, p); + return vmladavq_p_u32 (m1, m2, p); } -/* { dg-final { scan-assembler "vmladavt.u32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmladavt.u32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32_t -foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p) +foo1 (uint32x4_t m1, uint32x4_t m2, mve_pred16_t p) { - return vmladavq_p (a, b, p); + return vmladavq_p (m1, m2, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vmladavt.u32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_u8.c index 6fcc530c17cf..243e61715e4a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_p_u8.c @@ -1,21 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmladavt.u8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32_t -foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p) +foo (uint8x16_t m1, uint8x16_t m2, mve_pred16_t p) { - return vmladavq_p_u8 (a, b, p); + return vmladavq_p_u8 (m1, m2, p); } -/* { dg-final { scan-assembler "vmladavt.u8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmladavt.u8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32_t -foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p) +foo1 (uint8x16_t m1, uint8x16_t m2, mve_pred16_t p) { - return vmladavq_p (a, b, p); + return vmladavq_p (m1, m2, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vmladavt.u8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_s16.c index a140be6204d3..b0ff042fc43f 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmladav.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t -foo (int16x8_t a, int16x8_t b) +foo (int16x8_t m1, int16x8_t m2) { - return vmladavq_s16 (a, b); + return vmladavq_s16 (m1, m2); } -/* { dg-final { scan-assembler "vmladav.s16" } } */ +/* +**foo1: +** ... +** vmladav.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t -foo1 (int16x8_t a, int16x8_t b) +foo1 (int16x8_t m1, int16x8_t m2) { - return vmladavq (a, b); + return vmladavq (m1, m2); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vmladav.s16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_s32.c index 1413e4805512..a2ef4b37e4d8 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmladav.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t -foo (int32x4_t a, int32x4_t b) +foo (int32x4_t m1, int32x4_t m2) { - return vmladavq_s32 (a, b); + return vmladavq_s32 (m1, m2); } -/* { dg-final { scan-assembler "vmladav.s32" } } */ +/* +**foo1: +** ... +** vmladav.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t -foo1 (int32x4_t a, int32x4_t b) +foo1 (int32x4_t m1, int32x4_t m2) { - return vmladavq (a, b); + return vmladavq (m1, m2); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vmladav.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_s8.c index d43dbb9fefc3..e3e6e2982d7d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_s8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmladav.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t -foo (int8x16_t a, int8x16_t b) +foo (int8x16_t m1, int8x16_t m2) { - return vmladavq_s8 (a, b); + return vmladavq_s8 (m1, m2); } -/* { dg-final { scan-assembler "vmladav.s8" } } */ +/* +**foo1: +** ... +** vmladav.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t -foo1 (int8x16_t a, int8x16_t b) +foo1 (int8x16_t m1, int8x16_t m2) { - return vmladavq (a, b); + return vmladavq (m1, m2); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vmladav.s8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_u16.c index e1c44d7b4cee..d021bc0e30d8 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_u16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmladav.u16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32_t -foo (uint16x8_t a, uint16x8_t b) +foo (uint16x8_t m1, uint16x8_t m2) { - return vmladavq_u16 (a, b); + return vmladavq_u16 (m1, m2); } -/* { dg-final { scan-assembler "vmladav.u16" } } */ +/* +**foo1: +** ... +** vmladav.u16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32_t -foo1 (uint16x8_t a, uint16x8_t b) +foo1 (uint16x8_t m1, uint16x8_t m2) { - return vmladavq (a, b); + return vmladavq (m1, m2); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vmladav.u16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_u32.c index 5e9bb56bae0b..0848ca25b9f0 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_u32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmladav.u32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32_t -foo (uint32x4_t a, uint32x4_t b) +foo (uint32x4_t m1, uint32x4_t m2) { - return vmladavq_u32 (a, b); + return vmladavq_u32 (m1, m2); } -/* { dg-final { scan-assembler "vmladav.u32" } } */ +/* +**foo1: +** ... +** vmladav.u32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32_t -foo1 (uint32x4_t a, uint32x4_t b) +foo1 (uint32x4_t m1, uint32x4_t m2) { - return vmladavq (a, b); + return vmladavq (m1, m2); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vmladav.u32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_u8.c index f42235381709..2a735fbb654d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavq_u8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmladav.u8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32_t -foo (uint8x16_t a, uint8x16_t b) +foo (uint8x16_t m1, uint8x16_t m2) { - return vmladavq_u8 (a, b); + return vmladavq_u8 (m1, m2); } -/* { dg-final { scan-assembler "vmladav.u8" } } */ +/* +**foo1: +** ... +** vmladav.u8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32_t -foo1 (uint8x16_t a, uint8x16_t b) +foo1 (uint8x16_t m1, uint8x16_t m2) { - return vmladavq (a, b); + return vmladavq (m1, m2); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vmladav.u8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_p_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_p_s16.c index 7ee875eae6b5..dc94ecada573 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_p_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_p_s16.c @@ -1,21 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmladavxt.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t -foo (int16x8_t a, int16x8_t b, mve_pred16_t p) +foo (int16x8_t m1, int16x8_t m2, mve_pred16_t p) { - return vmladavxq_p_s16 (a, b, p); + return vmladavxq_p_s16 (m1, m2, p); } -/* { dg-final { scan-assembler "vmladavxt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmladavxt.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t -foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) +foo1 (int16x8_t m1, int16x8_t m2, mve_pred16_t p) { - return vmladavxq_p (a, b, p); + return vmladavxq_p (m1, m2, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vmladavxt.s16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_p_s32.c index d4f92ba9cf21..15a2abd7d130 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_p_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_p_s32.c @@ -1,21 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmladavxt.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t -foo (int32x4_t a, int32x4_t b, mve_pred16_t p) +foo (int32x4_t m1, int32x4_t m2, mve_pred16_t p) { - return vmladavxq_p_s32 (a, b, p); + return vmladavxq_p_s32 (m1, m2, p); } -/* { dg-final { scan-assembler "vmladavxt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmladavxt.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t -foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) +foo1 (int32x4_t m1, int32x4_t m2, mve_pred16_t p) { - return vmladavxq_p (a, b, p); + return vmladavxq_p (m1, m2, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vmladavxt.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_p_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_p_s8.c index d5f14c51ae8e..e56874151a8a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_p_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_p_s8.c @@ -1,21 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmladavxt.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t -foo (int8x16_t a, int8x16_t b, mve_pred16_t p) +foo (int8x16_t m1, int8x16_t m2, mve_pred16_t p) { - return vmladavxq_p_s8 (a, b, p); + return vmladavxq_p_s8 (m1, m2, p); } -/* { dg-final { scan-assembler "vmladavxt.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmladavxt.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t -foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) +foo1 (int8x16_t m1, int8x16_t m2, mve_pred16_t p) { - return vmladavxq_p (a, b, p); + return vmladavxq_p (m1, m2, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vmladavxt.s8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_s16.c index deac58d768e3..e7e3b571efbd 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmladavx.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t -foo (int16x8_t a, int16x8_t b) +foo (int16x8_t m1, int16x8_t m2) { - return vmladavxq_s16 (a, b); + return vmladavxq_s16 (m1, m2); } -/* { dg-final { scan-assembler "vmladavx.s16" } } */ +/* +**foo1: +** ... +** vmladavx.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t -foo1 (int16x8_t a, int16x8_t b) +foo1 (int16x8_t m1, int16x8_t m2) { - return vmladavxq (a, b); + return vmladavxq (m1, m2); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vmladavx.s16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_s32.c index 56516d741731..c3841f59d579 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmladavx.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t -foo (int32x4_t a, int32x4_t b) +foo (int32x4_t m1, int32x4_t m2) { - return vmladavxq_s32 (a, b); + return vmladavxq_s32 (m1, m2); } -/* { dg-final { scan-assembler "vmladavx.s32" } } */ +/* +**foo1: +** ... +** vmladavx.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t -foo1 (int32x4_t a, int32x4_t b) +foo1 (int32x4_t m1, int32x4_t m2) { - return vmladavxq (a, b); + return vmladavxq (m1, m2); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vmladavx.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_s8.c index 3b1e8cd67cda..59cdc346ee55 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavxq_s8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmladavx.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t -foo (int8x16_t a, int8x16_t b) +foo (int8x16_t m1, int8x16_t m2) { - return vmladavxq_s8 (a, b); + return vmladavxq_s8 (m1, m2); } -/* { dg-final { scan-assembler "vmladavx.s8" } } */ +/* +**foo1: +** ... +** vmladavx.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t -foo1 (int8x16_t a, int8x16_t b) +foo1 (int8x16_t m1, int8x16_t m2) { - return vmladavxq (a, b); + return vmladavxq (m1, m2); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vmladavx.s8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_s16.c index 246b40fbe2c8..fbdbb5c16a84 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_s16.c @@ -1,21 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlaldavat.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t -foo (int64_t a, int16x8_t b, int16x8_t c, mve_pred16_t p) +foo (int64_t add, int16x8_t m1, int16x8_t m2, mve_pred16_t p) { - return vmlaldavaq_p_s16 (a, b, c, p); + return vmlaldavaq_p_s16 (add, m1, m2, p); } -/* { dg-final { scan-assembler "vmlaldavat.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlaldavat.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t -foo1 (int64_t a, int16x8_t b, int16x8_t c, mve_pred16_t p) +foo1 (int64_t add, int16x8_t m1, int16x8_t m2, mve_pred16_t p) { - return vmlaldavaq_p (a, b, c, p); + return vmlaldavaq_p (add, m1, m2, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vmlaldavat.s16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_s32.c index 6563af200617..9c59d0306a11 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_s32.c @@ -1,21 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlaldavat.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t -foo (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p) +foo (int64_t add, int32x4_t m1, int32x4_t m2, mve_pred16_t p) { - return vmlaldavaq_p_s32 (a, b, c, p); + return vmlaldavaq_p_s32 (add, m1, m2, p); } -/* { dg-final { scan-assembler "vmlaldavat.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlaldavat.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t -foo1 (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p) +foo1 (int64_t add, int32x4_t m1, int32x4_t m2, mve_pred16_t p) { - return vmlaldavaq_p (a, b, c, p); + return vmlaldavaq_p (add, m1, m2, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vmlaldavat.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_u16.c index 632e29f972dc..b714b6773396 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_u16.c @@ -1,21 +1,65 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlaldavat.u16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint64_t -foo (uint64_t a, uint16x8_t b, uint16x8_t c, mve_pred16_t p) +foo (uint64_t add, uint16x8_t m1, uint16x8_t m2, mve_pred16_t p) { - return vmlaldavaq_p_u16 (a, b, c, p); + return vmlaldavaq_p_u16 (add, m1, m2, p); } -/* { dg-final { scan-assembler "vmlaldavat.u16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlaldavat.u16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint64_t -foo1 (uint64_t a, uint16x8_t b, uint16x8_t c, mve_pred16_t p) +foo1 (uint64_t add, uint16x8_t m1, uint16x8_t m2, mve_pred16_t p) { - return vmlaldavaq_p (a, b, c, p); + return vmlaldavaq_p (add, m1, m2, p); +} + +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlaldavat.u16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ +uint64_t +foo2 (uint16x8_t m1, uint16x8_t m2, mve_pred16_t p) +{ + return vmlaldavaq_p (1, m1, m2, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vmlaldavat.u16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_u32.c index d2fcd5d14ed1..29419a064585 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_p_u32.c @@ -1,21 +1,65 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlaldavat.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint64_t -foo (uint64_t a, uint32x4_t b, uint32x4_t c, mve_pred16_t p) +foo (uint64_t add, uint32x4_t m1, uint32x4_t m2, mve_pred16_t p) { - return vmlaldavaq_p_u32 (a, b, c, p); + return vmlaldavaq_p_u32 (add, m1, m2, p); } -/* { dg-final { scan-assembler "vmlaldavat.u32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlaldavat.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint64_t -foo1 (uint64_t a, uint32x4_t b, uint32x4_t c, mve_pred16_t p) +foo1 (uint64_t add, uint32x4_t m1, uint32x4_t m2, mve_pred16_t p) { - return vmlaldavaq_p (a, b, c, p); + return vmlaldavaq_p (add, m1, m2, p); +} + +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlaldavat.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ +uint64_t +foo2 (uint32x4_t m1, uint32x4_t m2, mve_pred16_t p) +{ + return vmlaldavaq_p (1, m1, m2, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vmlaldavat.u32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_s16.c index 1cb9b6ebc419..d1f049923c02 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmlaldava.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t -foo (int64_t a, int16x8_t b, int16x8_t c) +foo (int64_t add, int16x8_t m1, int16x8_t m2) { - return vmlaldavaq_s16 (a, b, c); + return vmlaldavaq_s16 (add, m1, m2); } -/* { dg-final { scan-assembler "vmlaldava.s16" } } */ +/* +**foo1: +** ... +** vmlaldava.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t -foo1 (int64_t a, int16x8_t b, int16x8_t c) +foo1 (int64_t add, int16x8_t m1, int16x8_t m2) { - return vmlaldavaq (a, b, c); + return vmlaldavaq (add, m1, m2); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vmlaldava.s16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_s32.c index 56e59f5929d2..dfce7d8f6254 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmlaldava.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t -foo (int64_t a, int32x4_t b, int32x4_t c) +foo (int64_t add, int32x4_t m1, int32x4_t m2) { - return vmlaldavaq_s32 (a, b, c); + return vmlaldavaq_s32 (add, m1, m2); } -/* { dg-final { scan-assembler "vmlaldava.s32" } } */ +/* +**foo1: +** ... +** vmlaldava.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t -foo1 (int64_t a, int32x4_t b, int32x4_t c) +foo1 (int64_t add, int32x4_t m1, int32x4_t m2) { - return vmlaldavaq (a, b, c); + return vmlaldavaq (add, m1, m2); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vmlaldava.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_u16.c index 7c95abc271c9..7e42054a4f3b 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_u16.c @@ -1,21 +1,53 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmlaldava.u16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint64_t -foo (uint64_t a, uint16x8_t b, uint16x8_t c) +foo (uint64_t add, uint16x8_t m1, uint16x8_t m2) { - return vmlaldavaq_u16 (a, b, c); + return vmlaldavaq_u16 (add, m1, m2); } -/* { dg-final { scan-assembler "vmlaldava.u16" } } */ +/* +**foo1: +** ... +** vmlaldava.u16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint64_t -foo1 (uint64_t a, uint16x8_t b, uint16x8_t c) +foo1 (uint64_t add, uint16x8_t m1, uint16x8_t m2) { - return vmlaldavaq (a, b, c); + return vmlaldavaq (add, m1, m2); +} + +/* +**foo2: +** ... +** vmlaldava.u16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ +uint64_t +foo2 (uint16x8_t m1, uint16x8_t m2) +{ + return vmlaldavaq (1, m1, m2); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vmlaldava.u16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_u32.c index 239f5e32d8b0..20ba6d377bf7 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaq_u32.c @@ -1,21 +1,53 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmlaldava.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint64_t -foo (uint64_t a, uint32x4_t b, uint32x4_t c) +foo (uint64_t add, uint32x4_t m1, uint32x4_t m2) { - return vmlaldavaq_u32 (a, b, c); + return vmlaldavaq_u32 (add, m1, m2); } -/* { dg-final { scan-assembler "vmlaldava.u32" } } */ +/* +**foo1: +** ... +** vmlaldava.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint64_t -foo1 (uint64_t a, uint32x4_t b, uint32x4_t c) +foo1 (uint64_t add, uint32x4_t m1, uint32x4_t m2) { - return vmlaldavaq (a, b, c); + return vmlaldavaq (add, m1, m2); +} + +/* +**foo2: +** ... +** vmlaldava.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ +uint64_t +foo2 (uint32x4_t m1, uint32x4_t m2) +{ + return vmlaldavaq (1, m1, m2); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vmlaldava.u32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s16.c index 11e32c76d5a7..7c2f07f3495f 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s16.c @@ -46,4 +46,4 @@ foo1 (int64_t add, int16x8_t m1, int16x8_t m2, mve_pred16_t p) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s32.c index 937fab4166cc..6214235487bf 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s32.c @@ -46,4 +46,4 @@ foo1 (int64_t add, int32x4_t m1, int32x4_t m2, mve_pred16_t p) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s16.c index 4f10ec7d0981..b5922b8c2812 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s16.c @@ -38,4 +38,4 @@ foo1 (int64_t add, int16x8_t m1, int16x8_t m2) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s32.c index 1d78a7cd2697..124125e2f29a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s32.c @@ -38,4 +38,4 @@ foo1 (int64_t add, int32x4_t m1, int32x4_t m2) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_s16.c index 008efd95a357..de9cc0ed9c49 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_s16.c @@ -1,21 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlaldavt.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t -foo (int16x8_t a, int16x8_t b, mve_pred16_t p) +foo (int16x8_t m1, int16x8_t m2, mve_pred16_t p) { - return vmlaldavq_p_s16 (a, b, p); + return vmlaldavq_p_s16 (m1, m2, p); } -/* { dg-final { scan-assembler "vmlaldavt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlaldavt.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t -foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) +foo1 (int16x8_t m1, int16x8_t m2, mve_pred16_t p) { - return vmlaldavq_p (a, b, p); + return vmlaldavq_p (m1, m2, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vmlaldavt.s16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_s32.c index e824e6b7ce01..a2b1c59291bb 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_s32.c @@ -1,21 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlaldavt.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t -foo (int32x4_t a, int32x4_t b, mve_pred16_t p) +foo (int32x4_t m1, int32x4_t m2, mve_pred16_t p) { - return vmlaldavq_p_s32 (a, b, p); + return vmlaldavq_p_s32 (m1, m2, p); } -/* { dg-final { scan-assembler "vmlaldavt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlaldavt.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t -foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) +foo1 (int32x4_t m1, int32x4_t m2, mve_pred16_t p) { - return vmlaldavq_p (a, b, p); + return vmlaldavq_p (m1, m2, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vmlaldavt.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_u16.c index 1fea6d5c117b..6034b9b54548 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_u16.c @@ -1,21 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlaldavt.u16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint64_t -foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p) +foo (uint16x8_t m1, uint16x8_t m2, mve_pred16_t p) { - return vmlaldavq_p_u16 (a, b, p); + return vmlaldavq_p_u16 (m1, m2, p); } -/* { dg-final { scan-assembler "vmlaldavt.u16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlaldavt.u16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint64_t -foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p) +foo1 (uint16x8_t m1, uint16x8_t m2, mve_pred16_t p) { - return vmlaldavq_p (a, b, p); + return vmlaldavq_p (m1, m2, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vmlaldavt.u16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_u32.c index 99300fcb6ec9..a85d7de4dad1 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_p_u32.c @@ -1,21 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlaldavt.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint64_t -foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p) +foo (uint32x4_t m1, uint32x4_t m2, mve_pred16_t p) { - return vmlaldavq_p_u32 (a, b, p); + return vmlaldavq_p_u32 (m1, m2, p); } -/* { dg-final { scan-assembler "vmlaldavt.u32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlaldavt.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint64_t -foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p) +foo1 (uint32x4_t m1, uint32x4_t m2, mve_pred16_t p) { - return vmlaldavq_p (a, b, p); + return vmlaldavq_p (m1, m2, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vmlaldavt.u32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_s16.c index 1cdb44920e12..b18e8eb149e5 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmlaldav.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t -foo (int16x8_t a, int16x8_t b) +foo (int16x8_t m1, int16x8_t m2) { - return vmlaldavq_s16 (a, b); + return vmlaldavq_s16 (m1, m2); } -/* { dg-final { scan-assembler "vmlaldav.s16" } } */ +/* +**foo1: +** ... +** vmlaldav.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t -foo1 (int16x8_t a, int16x8_t b) +foo1 (int16x8_t m1, int16x8_t m2) { - return vmlaldavq (a, b); + return vmlaldavq (m1, m2); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vmlaldav.s16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_s32.c index 123ca0f4eebd..b0fe1c5132c0 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmlaldav.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t -foo (int32x4_t a, int32x4_t b) +foo (int32x4_t m1, int32x4_t m2) { - return vmlaldavq_s32 (a, b); + return vmlaldavq_s32 (m1, m2); } -/* { dg-final { scan-assembler "vmlaldav.s32" } } */ +/* +**foo1: +** ... +** vmlaldav.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t -foo1 (int32x4_t a, int32x4_t b) +foo1 (int32x4_t m1, int32x4_t m2) { - return vmlaldavq (a, b); + return vmlaldavq (m1, m2); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vmlaldav.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_u16.c index c9c40eeac0a6..d1fcf715cb74 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_u16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmlaldav.u16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint64_t -foo (uint16x8_t a, uint16x8_t b) +foo (uint16x8_t m1, uint16x8_t m2) { - return vmlaldavq_u16 (a, b); + return vmlaldavq_u16 (m1, m2); } -/* { dg-final { scan-assembler "vmlaldav.u16" } } */ +/* +**foo1: +** ... +** vmlaldav.u16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint64_t -foo1 (uint16x8_t a, uint16x8_t b) +foo1 (uint16x8_t m1, uint16x8_t m2) { - return vmlaldavq (a, b); + return vmlaldavq (m1, m2); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vmlaldav.u16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_u32.c index 4d1754697bf9..76726e8255b8 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavq_u32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmlaldav.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint64_t -foo (uint32x4_t a, uint32x4_t b) +foo (uint32x4_t m1, uint32x4_t m2) { - return vmlaldavq_u32 (a, b); + return vmlaldavq_u32 (m1, m2); } -/* { dg-final { scan-assembler "vmlaldav.u32" } } */ +/* +**foo1: +** ... +** vmlaldav.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint64_t -foo1 (uint32x4_t a, uint32x4_t b) +foo1 (uint32x4_t m1, uint32x4_t m2) { - return vmlaldavq (a, b); + return vmlaldavq (m1, m2); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vmlaldav.u32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_p_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_p_s16.c index d41c2e16114e..3b8392bcf7f9 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_p_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_p_s16.c @@ -1,21 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlaldavxt.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t -foo (int16x8_t a, int16x8_t b, mve_pred16_t p) +foo (int16x8_t m1, int16x8_t m2, mve_pred16_t p) { - return vmlaldavxq_p_s16 (a, b, p); + return vmlaldavxq_p_s16 (m1, m2, p); } -/* { dg-final { scan-assembler "vmlaldavxt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlaldavxt.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t -foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) +foo1 (int16x8_t m1, int16x8_t m2, mve_pred16_t p) { - return vmlaldavxq_p (a, b, p); + return vmlaldavxq_p (m1, m2, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vmlaldavxt.s16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_p_s32.c index 8ad7b219a0ff..578b7b680952 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_p_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_p_s32.c @@ -1,21 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlaldavxt.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t -foo (int32x4_t a, int32x4_t b, mve_pred16_t p) +foo (int32x4_t m1, int32x4_t m2, mve_pred16_t p) { - return vmlaldavxq_p_s32 (a, b, p); + return vmlaldavxq_p_s32 (m1, m2, p); } -/* { dg-final { scan-assembler "vmlaldavxt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlaldavxt.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t -foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) +foo1 (int32x4_t m1, int32x4_t m2, mve_pred16_t p) { - return vmlaldavxq_p (a, b, p); + return vmlaldavxq_p (m1, m2, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vmlaldavxt.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_s16.c index ebe999393e84..7061bd2c13d3 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmlaldavx.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t -foo (int16x8_t a, int16x8_t b) +foo (int16x8_t m1, int16x8_t m2) { - return vmlaldavxq_s16 (a, b); + return vmlaldavxq_s16 (m1, m2); } -/* { dg-final { scan-assembler "vmlaldavx.s16" } } */ +/* +**foo1: +** ... +** vmlaldavx.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t -foo1 (int16x8_t a, int16x8_t b) +foo1 (int16x8_t m1, int16x8_t m2) { - return vmlaldavxq (a, b); + return vmlaldavxq (m1, m2); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vmlaldavx.s16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_s32.c index 0417eb867dec..957dc174a36a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavxq_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmlaldavx.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t -foo (int32x4_t a, int32x4_t b) +foo (int32x4_t m1, int32x4_t m2) { - return vmlaldavxq_s32 (a, b); + return vmlaldavxq_s32 (m1, m2); } -/* { dg-final { scan-assembler "vmlaldavx.s32" } } */ +/* +**foo1: +** ... +** vmlaldavx.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t -foo1 (int32x4_t a, int32x4_t b) +foo1 (int32x4_t m1, int32x4_t m2) { - return vmlaldavxq (a, b); + return vmlaldavxq (m1, m2); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vmlaldavx.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_s16.c index d48b020d5953..f68fe8e49a33 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_s16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlat.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int16x8_t -foo (int16x8_t a, int16x8_t b, int16_t c, mve_pred16_t p) +foo (int16x8_t add, int16x8_t m1, int16_t m2, mve_pred16_t p) { - return vmlaq_m_n_s16 (a, b, c, p); + return vmlaq_m_n_s16 (add, m1, m2, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmlat.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlat.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int16x8_t -foo1 (int16x8_t a, int16x8_t b, int16_t c, mve_pred16_t p) +foo1 (int16x8_t add, int16x8_t m1, int16_t m2, mve_pred16_t p) { - return vmlaq_m (a, b, c, p); + return vmlaq_m (add, m1, m2, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmlat.s16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_s32.c index 315c1afc2c7f..d3c495535968 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_s32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlat.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int32x4_t -foo (int32x4_t a, int32x4_t b, int32_t c, mve_pred16_t p) +foo (int32x4_t add, int32x4_t m1, int32_t m2, mve_pred16_t p) { - return vmlaq_m_n_s32 (a, b, c, p); + return vmlaq_m_n_s32 (add, m1, m2, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmlat.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlat.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int32x4_t -foo1 (int32x4_t a, int32x4_t b, int32_t c, mve_pred16_t p) +foo1 (int32x4_t add, int32x4_t m1, int32_t m2, mve_pred16_t p) { - return vmlaq_m (a, b, c, p); + return vmlaq_m (add, m1, m2, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmlat.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_s8.c index a452f5de5e68..44dc3b57cddb 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_s8.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlat.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int8x16_t -foo (int8x16_t a, int8x16_t b, int8_t c, mve_pred16_t p) +foo (int8x16_t add, int8x16_t m1, int8_t m2, mve_pred16_t p) { - return vmlaq_m_n_s8 (a, b, c, p); + return vmlaq_m_n_s8 (add, m1, m2, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmlat.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlat.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int8x16_t -foo1 (int8x16_t a, int8x16_t b, int8_t c, mve_pred16_t p) +foo1 (int8x16_t add, int8x16_t m1, int8_t m2, mve_pred16_t p) { - return vmlaq_m (a, b, c, p); + return vmlaq_m (add, m1, m2, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmlat.s8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_u16.c index 6ecdc689a61b..cbb92fb39b89 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_u16.c @@ -1,23 +1,65 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlat.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint16x8_t -foo (uint16x8_t a, uint16x8_t b, uint16_t c, mve_pred16_t p) +foo (uint16x8_t add, uint16x8_t m1, uint16_t m2, mve_pred16_t p) { - return vmlaq_m_n_u16 (a, b, c, p); + return vmlaq_m_n_u16 (add, m1, m2, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmlat.u16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlat.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint16x8_t -foo1 (uint16x8_t a, uint16x8_t b, uint16_t c, mve_pred16_t p) +foo1 (uint16x8_t add, uint16x8_t m1, uint16_t m2, mve_pred16_t p) { - return vmlaq_m (a, b, c, p); + return vmlaq_m (add, m1, m2, p); +} + +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlat.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +uint16x8_t +foo2 (uint16x8_t add, uint16x8_t m1, mve_pred16_t p) +{ + return vmlaq_m (add, m1, 1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmlat.u16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_u32.c index 2c584a635e7b..569ea91af36f 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_u32.c @@ -1,23 +1,65 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlat.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint32x4_t -foo (uint32x4_t a, uint32x4_t b, uint32_t c, mve_pred16_t p) +foo (uint32x4_t add, uint32x4_t m1, uint32_t m2, mve_pred16_t p) { - return vmlaq_m_n_u32 (a, b, c, p); + return vmlaq_m_n_u32 (add, m1, m2, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmlat.u32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlat.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint32x4_t -foo1 (uint32x4_t a, uint32x4_t b, uint32_t c, mve_pred16_t p) +foo1 (uint32x4_t add, uint32x4_t m1, uint32_t m2, mve_pred16_t p) { - return vmlaq_m (a, b, c, p); + return vmlaq_m (add, m1, m2, p); +} + +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlat.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +uint32x4_t +foo2 (uint32x4_t add, uint32x4_t m1, mve_pred16_t p) +{ + return vmlaq_m (add, m1, 1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmlat.u32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_u8.c index b75b3c95916a..592ad3e072a3 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_m_n_u8.c @@ -1,23 +1,65 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlat.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint8x16_t -foo (uint8x16_t a, uint8x16_t b, uint8_t c, mve_pred16_t p) +foo (uint8x16_t add, uint8x16_t m1, uint8_t m2, mve_pred16_t p) { - return vmlaq_m_n_u8 (a, b, c, p); + return vmlaq_m_n_u8 (add, m1, m2, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmlat.u8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlat.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint8x16_t -foo1 (uint8x16_t a, uint8x16_t b, uint8_t c, mve_pred16_t p) +foo1 (uint8x16_t add, uint8x16_t m1, uint8_t m2, mve_pred16_t p) { - return vmlaq_m (a, b, c, p); + return vmlaq_m (add, m1, m2, p); +} + +/* +**foo2: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlat.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +uint8x16_t +foo2 (uint8x16_t add, uint8x16_t m1, mve_pred16_t p) +{ + return vmlaq_m (add, m1, 1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmlat.u8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_s16.c index 29543c8f60d5..d1fa73de1c97 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmla.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int16x8_t -foo (int16x8_t a, int16x8_t b, int16_t c) +foo (int16x8_t add, int16x8_t m1, int16_t m2) { - return vmlaq_n_s16 (a, b, c); + return vmlaq_n_s16 (add, m1, m2); } -/* { dg-final { scan-assembler "vmla.s16" } } */ +/* +**foo1: +** ... +** vmla.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int16x8_t -foo1 (int16x8_t a, int16x8_t b, int16_t c) +foo1 (int16x8_t add, int16x8_t m1, int16_t m2) { - return vmlaq (a, b, c); + return vmlaq (add, m1, m2); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vmla.s16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_s32.c index d74bacaffd71..c349c0c8d7f6 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmla.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int32x4_t -foo (int32x4_t a, int32x4_t b, int32_t c) +foo (int32x4_t add, int32x4_t m1, int32_t m2) { - return vmlaq_n_s32 (a, b, c); + return vmlaq_n_s32 (add, m1, m2); } -/* { dg-final { scan-assembler "vmla.s32" } } */ +/* +**foo1: +** ... +** vmla.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int32x4_t -foo1 (int32x4_t a, int32x4_t b, int32_t c) +foo1 (int32x4_t add, int32x4_t m1, int32_t m2) { - return vmlaq (a, b, c); + return vmlaq (add, m1, m2); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vmla.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_s8.c index 38dd01a6580c..c1cd39e57159 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_s8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmla.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int8x16_t -foo (int8x16_t a, int8x16_t b, int8_t c) +foo (int8x16_t add, int8x16_t m1, int8_t m2) { - return vmlaq_n_s8 (a, b, c); + return vmlaq_n_s8 (add, m1, m2); } -/* { dg-final { scan-assembler "vmla.s8" } } */ +/* +**foo1: +** ... +** vmla.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int8x16_t -foo1 (int8x16_t a, int8x16_t b, int8_t c) +foo1 (int8x16_t add, int8x16_t m1, int8_t m2) { - return vmlaq (a, b, c); + return vmlaq (add, m1, m2); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vmla.s8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_u16.c index 55a5d0601d59..5eb201c05e84 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_u16.c @@ -1,21 +1,53 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmla.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint16x8_t -foo (uint16x8_t a, uint16x8_t b, uint16_t c) +foo (uint16x8_t add, uint16x8_t m1, uint16_t m2) { - return vmlaq_n_u16 (a, b, c); + return vmlaq_n_u16 (add, m1, m2); } -/* { dg-final { scan-assembler "vmla.u16" } } */ +/* +**foo1: +** ... +** vmla.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint16x8_t -foo1 (uint16x8_t a, uint16x8_t b, uint16_t c) +foo1 (uint16x8_t add, uint16x8_t m1, uint16_t m2) { - return vmlaq (a, b, c); + return vmlaq (add, m1, m2); +} + +/* +**foo2: +** ... +** vmla.u16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +uint16x8_t +foo2 (uint16x8_t add, uint16x8_t m1) +{ + return vmlaq (add, m1, 1); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vmla.u16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_u32.c index e160275a29bf..d4820ea65d99 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_u32.c @@ -1,21 +1,53 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmla.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint32x4_t -foo (uint32x4_t a, uint32x4_t b, uint32_t c) +foo (uint32x4_t add, uint32x4_t m1, uint32_t m2) { - return vmlaq_n_u32 (a, b, c); + return vmlaq_n_u32 (add, m1, m2); } -/* { dg-final { scan-assembler "vmla.u32" } } */ +/* +**foo1: +** ... +** vmla.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint32x4_t -foo1 (uint32x4_t a, uint32x4_t b, uint32_t c) +foo1 (uint32x4_t add, uint32x4_t m1, uint32_t m2) { - return vmlaq (a, b, c); + return vmlaq (add, m1, m2); +} + +/* +**foo2: +** ... +** vmla.u32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +uint32x4_t +foo2 (uint32x4_t add, uint32x4_t m1) +{ + return vmlaq (add, m1, 1); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vmla.u32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_u8.c index 5f0edef53d40..7f83f092b076 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaq_n_u8.c @@ -1,21 +1,53 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmla.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint8x16_t -foo (uint8x16_t a, uint8x16_t b, uint8_t c) +foo (uint8x16_t add, uint8x16_t m1, uint8_t m2) { - return vmlaq_n_u8 (a, b, c); + return vmlaq_n_u8 (add, m1, m2); } -/* { dg-final { scan-assembler "vmla.u8" } } */ +/* +**foo1: +** ... +** vmla.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint8x16_t -foo1 (uint8x16_t a, uint8x16_t b, uint8_t c) +foo1 (uint8x16_t add, uint8x16_t m1, uint8_t m2) { - return vmlaq (a, b, c); + return vmlaq (add, m1, m2); +} + +/* +**foo2: +** ... +** vmla.u8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ +uint8x16_t +foo2 (uint8x16_t add, uint8x16_t m1) +{ + return vmlaq (add, m1, 1); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vmla.u8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s16.c index 3b250c1bf799..e8d1b5fd3d09 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlsdavat.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t foo (int32_t a, int16x8_t b, int16x8_t c, mve_pred16_t p) { return vmlsdavaq_p_s16 (a, b, c, p); } -/* { dg-final { scan-assembler "vmlsdavat.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlsdavat.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t foo1 (int32_t a, int16x8_t b, int16x8_t c, mve_pred16_t p) { return vmlsdavaq_p (a, b, c, p); } -/* { dg-final { scan-assembler "vmlsdavat.s16" } } */ -/* { dg-final { scan-assembler "vmlsdavat.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s32.c index 077c5980e661..effbf24d9974 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlsdavat.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t foo (int32_t a, int32x4_t b, int32x4_t c, mve_pred16_t p) { return vmlsdavaq_p_s32 (a, b, c, p); } -/* { dg-final { scan-assembler "vmlsdavat.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlsdavat.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t foo1 (int32_t a, int32x4_t b, int32x4_t c, mve_pred16_t p) { return vmlsdavaq_p (a, b, c, p); } -/* { dg-final { scan-assembler "vmlsdavat.s32" } } */ -/* { dg-final { scan-assembler "vmlsdavat.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s8.c index 2e53f5530b1c..de04f9fd0891 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlsdavat.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t foo (int32_t a, int8x16_t b, int8x16_t c, mve_pred16_t p) { return vmlsdavaq_p_s8 (a, b, c, p); } -/* { dg-final { scan-assembler "vmlsdavat.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlsdavat.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t foo1 (int32_t a, int8x16_t b, int8x16_t c, mve_pred16_t p) { return vmlsdavaq_p (a, b, c, p); } -/* { dg-final { scan-assembler "vmlsdavat.s8" } } */ -/* { dg-final { scan-assembler "vmlsdavat.s8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_s16.c index e127be940b43..f66f652f6fdb 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmlsdava.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t foo (int32_t a, int16x8_t b, int16x8_t c) { return vmlsdavaq_s16 (a, b, c); } -/* { dg-final { scan-assembler "vmlsdava.s16" } } */ +/* +**foo1: +** ... +** vmlsdava.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t foo1 (int32_t a, int16x8_t b, int16x8_t c) { return vmlsdavaq (a, b, c); } -/* { dg-final { scan-assembler "vmlsdava.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_s32.c index 20f879c6b699..79ba85ddb023 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmlsdava.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t foo (int32_t a, int32x4_t b, int32x4_t c) { return vmlsdavaq_s32 (a, b, c); } -/* { dg-final { scan-assembler "vmlsdava.s32" } } */ +/* +**foo1: +** ... +** vmlsdava.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t foo1 (int32_t a, int32x4_t b, int32x4_t c) { return vmlsdavaq (a, b, c); } -/* { dg-final { scan-assembler "vmlsdava.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_s8.c index 3cbed73f6609..3e0f9dc2649d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaq_s8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmlsdava.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t foo (int32_t a, int8x16_t b, int8x16_t c) { return vmlsdavaq_s8 (a, b, c); } -/* { dg-final { scan-assembler "vmlsdava.s8" } } */ +/* +**foo1: +** ... +** vmlsdava.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t foo1 (int32_t a, int8x16_t b, int8x16_t c) { return vmlsdavaq (a, b, c); } -/* { dg-final { scan-assembler "vmlsdava.s8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s16.c index 37aee878b972..61e88ce8fb8f 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlsdavaxt.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t foo (int32_t a, int16x8_t b, int16x8_t c, mve_pred16_t p) { return vmlsdavaxq_p_s16 (a, b, c, p); } -/* { dg-final { scan-assembler "vmlsdavaxt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlsdavaxt.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t foo1 (int32_t a, int16x8_t b, int16x8_t c, mve_pred16_t p) { return vmlsdavaxq_p (a, b, c, p); } -/* { dg-final { scan-assembler "vmlsdavaxt.s16" } } */ -/* { dg-final { scan-assembler "vmlsdavaxt.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s32.c index 6a15d3cf97b1..cbc2c71423e4 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlsdavaxt.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t foo (int32_t a, int32x4_t b, int32x4_t c, mve_pred16_t p) { return vmlsdavaxq_p_s32 (a, b, c, p); } -/* { dg-final { scan-assembler "vmlsdavaxt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlsdavaxt.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t foo1 (int32_t a, int32x4_t b, int32x4_t c, mve_pred16_t p) { return vmlsdavaxq_p (a, b, c, p); } -/* { dg-final { scan-assembler "vmlsdavaxt.s32" } } */ -/* { dg-final { scan-assembler "vmlsdavaxt.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s8.c index d090e625e1b5..2b30e8a9c129 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_p_s8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlsdavaxt.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t foo (int32_t a, int8x16_t b, int8x16_t c, mve_pred16_t p) { return vmlsdavaxq_p_s8 (a, b, c, p); } -/* { dg-final { scan-assembler "vmlsdavaxt.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlsdavaxt.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t foo1 (int32_t a, int8x16_t b, int8x16_t c, mve_pred16_t p) { return vmlsdavaxq_p (a, b, c, p); } -/* { dg-final { scan-assembler "vmlsdavaxt.s8" } } */ -/* { dg-final { scan-assembler "vmlsdavaxt.s8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_s16.c index 0ef5302ef805..90fd85a170e5 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmlsdavax.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t foo (int32_t a, int16x8_t b, int16x8_t c) { return vmlsdavaxq_s16 (a, b, c); } -/* { dg-final { scan-assembler "vmlsdavax.s16" } } */ +/* +**foo1: +** ... +** vmlsdavax.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t foo1 (int32_t a, int16x8_t b, int16x8_t c) { return vmlsdavaxq (a, b, c); } -/* { dg-final { scan-assembler "vmlsdavax.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_s32.c index 71a5e1a987fb..06fe27faf499 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmlsdavax.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t foo (int32_t a, int32x4_t b, int32x4_t c) { return vmlsdavaxq_s32 (a, b, c); } -/* { dg-final { scan-assembler "vmlsdavax.s32" } } */ +/* +**foo1: +** ... +** vmlsdavax.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t foo1 (int32_t a, int32x4_t b, int32x4_t c) { return vmlsdavaxq (a, b, c); } -/* { dg-final { scan-assembler "vmlsdavax.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_s8.c index 7df6b9f7f320..70a44b49d8ec 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavaxq_s8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmlsdavax.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t foo (int32_t a, int8x16_t b, int8x16_t c) { return vmlsdavaxq_s8 (a, b, c); } -/* { dg-final { scan-assembler "vmlsdavax.s8" } } */ +/* +**foo1: +** ... +** vmlsdavax.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t foo1 (int32_t a, int8x16_t b, int8x16_t c) { return vmlsdavaxq (a, b, c); } -/* { dg-final { scan-assembler "vmlsdavax.s8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_p_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_p_s16.c index f71dda19c573..09db9a3a90a6 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_p_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_p_s16.c @@ -1,21 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlsdavt.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t foo (int16x8_t a, int16x8_t b, mve_pred16_t p) { return vmlsdavq_p_s16 (a, b, p); } -/* { dg-final { scan-assembler "vmlsdavt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlsdavt.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) { return vmlsdavq_p (a, b, p); } -/* { dg-final { scan-assembler "vmlsdavt.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_p_s32.c index 255235ba372b..8eb9d24263ad 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_p_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_p_s32.c @@ -1,21 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlsdavt.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t foo (int32x4_t a, int32x4_t b, mve_pred16_t p) { return vmlsdavq_p_s32 (a, b, p); } -/* { dg-final { scan-assembler "vmlsdavt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlsdavt.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) { return vmlsdavq_p (a, b, p); } -/* { dg-final { scan-assembler "vmlsdavt.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_p_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_p_s8.c index 2fc892db2eb5..166fedea45c8 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_p_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_p_s8.c @@ -1,21 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlsdavt.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t foo (int8x16_t a, int8x16_t b, mve_pred16_t p) { return vmlsdavq_p_s8 (a, b, p); } -/* { dg-final { scan-assembler "vmlsdavt.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlsdavt.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) { return vmlsdavq_p (a, b, p); } -/* { dg-final { scan-assembler "vmlsdavt.s8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_s16.c index 7376b07865b6..b97252f72250 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmlsdav.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t foo (int16x8_t a, int16x8_t b) { return vmlsdavq_s16 (a, b); } -/* { dg-final { scan-assembler "vmlsdav.s16" } } */ +/* +**foo1: +** ... +** vmlsdav.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t foo1 (int16x8_t a, int16x8_t b) { return vmlsdavq (a, b); } -/* { dg-final { scan-assembler "vmlsdav.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_s32.c index a37042eab303..5473cfe22fcd 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmlsdav.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t foo (int32x4_t a, int32x4_t b) { return vmlsdavq_s32 (a, b); } -/* { dg-final { scan-assembler "vmlsdav.s32" } } */ +/* +**foo1: +** ... +** vmlsdav.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t foo1 (int32x4_t a, int32x4_t b) { return vmlsdavq (a, b); } -/* { dg-final { scan-assembler "vmlsdav.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_s8.c index b44b98bc7e43..487097118fd1 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavq_s8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmlsdav.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t foo (int8x16_t a, int8x16_t b) { return vmlsdavq_s8 (a, b); } -/* { dg-final { scan-assembler "vmlsdav.s8" } } */ +/* +**foo1: +** ... +** vmlsdav.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t foo1 (int8x16_t a, int8x16_t b) { return vmlsdavq (a, b); } -/* { dg-final { scan-assembler "vmlsdav.s8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s16.c index aa4ac4e4f012..d1ff9a0fa1c8 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s16.c @@ -1,21 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlsdavxt.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t foo (int16x8_t a, int16x8_t b, mve_pred16_t p) { return vmlsdavxq_p_s16 (a, b, p); } -/* { dg-final { scan-assembler "vmlsdavxt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlsdavxt.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) { return vmlsdavxq_p (a, b, p); } -/* { dg-final { scan-assembler "vmlsdavxt.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s32.c index 0de81290d995..09c19c1f1616 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s32.c @@ -1,21 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlsdavxt.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t foo (int32x4_t a, int32x4_t b, mve_pred16_t p) { return vmlsdavxq_p_s32 (a, b, p); } -/* { dg-final { scan-assembler "vmlsdavxt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlsdavxt.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) { return vmlsdavxq_p (a, b, p); } -/* { dg-final { scan-assembler "vmlsdavxt.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s8.c index 68588f6951ab..1f364a3e846a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s8.c @@ -1,21 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlsdavxt.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t foo (int8x16_t a, int8x16_t b, mve_pred16_t p) { return vmlsdavxq_p_s8 (a, b, p); } -/* { dg-final { scan-assembler "vmlsdavxt.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlsdavxt.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) { return vmlsdavxq_p (a, b, p); } -/* { dg-final { scan-assembler "vmlsdavxt.s8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_s16.c index 8f49d6a61069..1c0675fb44b2 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmlsdavx.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t foo (int16x8_t a, int16x8_t b) { return vmlsdavxq_s16 (a, b); } -/* { dg-final { scan-assembler "vmlsdavx.s16" } } */ +/* +**foo1: +** ... +** vmlsdavx.s16 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t foo1 (int16x8_t a, int16x8_t b) { return vmlsdavxq (a, b); } -/* { dg-final { scan-assembler "vmlsdavx.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_s32.c index 830cd4ca8b13..5986e130ec0e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmlsdavx.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t foo (int32x4_t a, int32x4_t b) { return vmlsdavxq_s32 (a, b); } -/* { dg-final { scan-assembler "vmlsdavx.s32" } } */ +/* +**foo1: +** ... +** vmlsdavx.s32 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t foo1 (int32x4_t a, int32x4_t b) { return vmlsdavxq (a, b); } -/* { dg-final { scan-assembler "vmlsdavx.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_s8.c index 74feb60b0059..4f8aa44b57aa 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsdavxq_s8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmlsdavx.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t foo (int8x16_t a, int8x16_t b) { return vmlsdavxq_s8 (a, b); } -/* { dg-final { scan-assembler "vmlsdavx.s8" } } */ +/* +**foo1: +** ... +** vmlsdavx.s8 (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32_t foo1 (int8x16_t a, int8x16_t b) { return vmlsdavxq (a, b); } -/* { dg-final { scan-assembler "vmlsdavx.s8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_p_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_p_s16.c index 78d29b058a36..8d0a03c02136 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_p_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_p_s16.c @@ -1,21 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlsldavat.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t foo (int64_t a, int16x8_t b, int16x8_t c, mve_pred16_t p) { return vmlsldavaq_p_s16 (a, b, c, p); } -/* { dg-final { scan-assembler "vmlsldavat.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlsldavat.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t foo1 (int64_t a, int16x8_t b, int16x8_t c, mve_pred16_t p) { return vmlsldavaq_p (a, b, c, p); } -/* { dg-final { scan-assembler "vmlsldavat.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_p_s32.c index fca0ef1d3dc4..fae2ad5c7132 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_p_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_p_s32.c @@ -1,21 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlsldavat.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t foo (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p) { return vmlsldavaq_p_s32 (a, b, c, p); } -/* { dg-final { scan-assembler "vmlsldavat.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlsldavat.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t foo1 (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p) { return vmlsldavaq_p (a, b, c, p); } -/* { dg-final { scan-assembler "vmlsldavat.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_s16.c index aecfcee45710..bfe4010df680 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmlsldava.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t foo (int64_t a, int16x8_t b, int16x8_t c) { return vmlsldavaq_s16 (a, b, c); } -/* { dg-final { scan-assembler "vmlsldava.s16" } } */ +/* +**foo1: +** ... +** vmlsldava.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t foo1 (int64_t a, int16x8_t b, int16x8_t c) { return vmlsldavaq (a, b, c); } -/* { dg-final { scan-assembler "vmlsldava.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_s32.c index 7344a50f02bb..b023b1b67eec 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaq_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmlsldava.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t foo (int64_t a, int32x4_t b, int32x4_t c) { return vmlsldavaq_s32 (a, b, c); } -/* { dg-final { scan-assembler "vmlsldava.s32" } } */ +/* +**foo1: +** ... +** vmlsldava.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t foo1 (int64_t a, int32x4_t b, int32x4_t c) { return vmlsldavaq (a, b, c); } -/* { dg-final { scan-assembler "vmlsldava.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_p_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_p_s16.c index 5278bd842cc6..1ffa8c28ea90 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_p_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_p_s16.c @@ -1,21 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlsldavaxt.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t foo (int64_t a, int16x8_t b, int16x8_t c, mve_pred16_t p) { return vmlsldavaxq_p_s16 (a, b, c, p); } -/* { dg-final { scan-assembler "vmlsldavaxt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlsldavaxt.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t foo1 (int64_t a, int16x8_t b, int16x8_t c, mve_pred16_t p) { return vmlsldavaxq_p (a, b, c, p); } -/* { dg-final { scan-assembler "vmlsldavaxt.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_p_s32.c index 07efdf96f109..aa5001705c11 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_p_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_p_s32.c @@ -1,21 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlsldavaxt.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t foo (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p) { return vmlsldavaxq_p_s32 (a, b, c, p); } -/* { dg-final { scan-assembler "vmlsldavaxt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlsldavaxt.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t foo1 (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p) { return vmlsldavaxq_p (a, b, c, p); } -/* { dg-final { scan-assembler "vmlsldavaxt.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_s16.c index 6a51d9f3d93d..7772b3da069e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmlsldavax.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t foo (int64_t a, int16x8_t b, int16x8_t c) { return vmlsldavaxq_s16 (a, b, c); } -/* { dg-final { scan-assembler "vmlsldavax.s16" } } */ +/* +**foo1: +** ... +** vmlsldavax.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t foo1 (int64_t a, int16x8_t b, int16x8_t c) { return vmlsldavaxq (a, b, c); } -/* { dg-final { scan-assembler "vmlsldavax.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_s32.c index 275776388d23..eba923f15d88 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavaxq_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmlsldavax.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t foo (int64_t a, int32x4_t b, int32x4_t c) { return vmlsldavaxq_s32 (a, b, c); } -/* { dg-final { scan-assembler "vmlsldavax.s32" } } */ +/* +**foo1: +** ... +** vmlsldavax.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t foo1 (int64_t a, int32x4_t b, int32x4_t c) { return vmlsldavaxq (a, b, c); } -/* { dg-final { scan-assembler "vmlsldavax.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_p_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_p_s16.c index 6eedf07efd6a..79ed4c94b642 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_p_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_p_s16.c @@ -1,21 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlsldavt.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t foo (int16x8_t a, int16x8_t b, mve_pred16_t p) { return vmlsldavq_p_s16 (a, b, p); } -/* { dg-final { scan-assembler "vmlsldavt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlsldavt.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) { return vmlsldavq_p (a, b, p); } -/* { dg-final { scan-assembler "vmlsldavt.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_p_s32.c index b36ea49612c8..44982f89edf9 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_p_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_p_s32.c @@ -1,21 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlsldavt.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t foo (int32x4_t a, int32x4_t b, mve_pred16_t p) { return vmlsldavq_p_s32 (a, b, p); } -/* { dg-final { scan-assembler "vmlsldavt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlsldavt.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) { return vmlsldavq_p (a, b, p); } -/* { dg-final { scan-assembler "vmlsldavt.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_s16.c index f05841798c94..dbdf1deae04e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmlsldav.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t foo (int16x8_t a, int16x8_t b) { return vmlsldavq_s16 (a, b); } -/* { dg-final { scan-assembler "vmlsldav.s16" } } */ +/* +**foo1: +** ... +** vmlsldav.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t foo1 (int16x8_t a, int16x8_t b) { return vmlsldavq (a, b); } -/* { dg-final { scan-assembler "vmlsldav.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_s32.c index 45bee16ab79a..458f14c446f4 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavq_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmlsldav.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t foo (int32x4_t a, int32x4_t b) { return vmlsldavq_s32 (a, b); } -/* { dg-final { scan-assembler "vmlsldav.s32" } } */ +/* +**foo1: +** ... +** vmlsldav.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t foo1 (int32x4_t a, int32x4_t b) { return vmlsldavq (a, b); } -/* { dg-final { scan-assembler "vmlsldav.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_p_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_p_s16.c index 821f4eae90a5..9481550f5267 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_p_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_p_s16.c @@ -1,21 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlsldavxt.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t foo (int16x8_t a, int16x8_t b, mve_pred16_t p) { return vmlsldavxq_p_s16 (a, b, p); } -/* { dg-final { scan-assembler "vmlsldavxt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlsldavxt.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) { return vmlsldavxq_p (a, b, p); } -/* { dg-final { scan-assembler "vmlsldavxt.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_p_s32.c index 77e84d074866..cc20e5549329 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_p_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_p_s32.c @@ -1,21 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlsldavxt.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t foo (int32x4_t a, int32x4_t b, mve_pred16_t p) { return vmlsldavxq_p_s32 (a, b, p); } -/* { dg-final { scan-assembler "vmlsldavxt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmlsldavxt.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) { return vmlsldavxq_p (a, b, p); } -/* { dg-final { scan-assembler "vmlsldavxt.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_s16.c index dcd88f8db73f..7a4d9365ed62 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmlsldavx.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t foo (int16x8_t a, int16x8_t b) { return vmlsldavxq_s16 (a, b); } -/* { dg-final { scan-assembler "vmlsldavx.s16" } } */ +/* +**foo1: +** ... +** vmlsldavx.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t foo1 (int16x8_t a, int16x8_t b) { return vmlsldavxq (a, b); } -/* { dg-final { scan-assembler "vmlsldavx.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_s32.c index d59550ba69e6..b241569d75ce 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlsldavxq_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmlsldavx.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t foo (int32x4_t a, int32x4_t b) { return vmlsldavxq_s32 (a, b); } -/* { dg-final { scan-assembler "vmlsldavx.s32" } } */ +/* +**foo1: +** ... +** vmlsldavx.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t foo1 (int32x4_t a, int32x4_t b) { return vmlsldavxq (a, b); } -/* { dg-final { scan-assembler "vmlsldavx.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_s16.c index b7ce6ce9c2a8..69c2f91b50ec 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_s16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmovlbt.s16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t inactive, int16x8_t a, mve_pred16_t p) { return vmovlbq_m_s16 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmovlbt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmovlbt.s16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t inactive, int16x8_t a, mve_pred16_t p) { return vmovlbq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_s8.c index d15df32831d7..2b3cfacb5f3e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_s8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmovlbt.s8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t inactive, int8x16_t a, mve_pred16_t p) { return vmovlbq_m_s8 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmovlbt.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmovlbt.s8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t inactive, int8x16_t a, mve_pred16_t p) { return vmovlbq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_u16.c index dcd9dc436929..39398b2cde90 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_u16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmovlbt.u16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t inactive, uint16x8_t a, mve_pred16_t p) { return vmovlbq_m_u16 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmovlbt.u16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmovlbt.u16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t inactive, uint16x8_t a, mve_pred16_t p) { return vmovlbq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_u8.c index dbdeb2630864..30ca18ad1038 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_m_u8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmovlbt.u8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t inactive, uint8x16_t a, mve_pred16_t p) { return vmovlbq_m_u8 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmovlbt.u8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmovlbt.u8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t inactive, uint8x16_t a, mve_pred16_t p) { return vmovlbq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_s16.c index a6b5cbb15279..8ce0da681135 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_s16.c @@ -1,21 +1,41 @@ -/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ -/* { dg-add-options arm_v8_1m_mve_fp } */ +/* { dg-require-effective-target arm_v8_1m_mve_ok } */ +/* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmovlb.s16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int16x8_t a) { return vmovlbq_s16 (a); } -/* { dg-final { scan-assembler "vmovlb.s16" } } */ +/* +**foo1: +** ... +** vmovlb.s16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int16x8_t a) { return vmovlbq (a); } -/* { dg-final { scan-assembler "vmovlb.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_s8.c index 4ead765bb6e3..36fbce37bf84 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_s8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmovlb.s8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int8x16_t a) { return vmovlbq_s8 (a); } -/* { dg-final { scan-assembler "vmovlb.s8" } } */ +/* +**foo1: +** ... +** vmovlb.s8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int8x16_t a) { return vmovlbq (a); } -/* { dg-final { scan-assembler "vmovlb.s8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_u16.c index fec88bb7f794..b90728e99562 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_u16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmovlb.u16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint16x8_t a) { - return vmovlbq_u16 (a); + return vmovlbq_u16 (a); } -/* { dg-final { scan-assembler "vmovlb.u16" } } */ +/* +**foo1: +** ... +** vmovlb.u16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint16x8_t a) { - return vmovlbq (a); + return vmovlbq (a); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vmovlb.u16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_u8.c index af6d804696ae..5299f5813294 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_u8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmovlb.u8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint8x16_t a) { - return vmovlbq_u8 (a); + return vmovlbq_u8 (a); } -/* { dg-final { scan-assembler "vmovlb.u8" } } */ +/* +**foo1: +** ... +** vmovlb.u8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint8x16_t a) { - return vmovlbq (a); + return vmovlbq (a); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vmovlb.u8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_s16.c index 393fc5523a7c..63d2ddb90158 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_s16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmovlbt.s16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int16x8_t a, mve_pred16_t p) { return vmovlbq_x_s16 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmovlbt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmovlbt.s16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int16x8_t a, mve_pred16_t p) { return vmovlbq_x (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_s8.c index 3773be0b6215..b573f5720124 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_s8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmovlbt.s8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int8x16_t a, mve_pred16_t p) { return vmovlbq_x_s8 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmovlbt.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmovlbt.s8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int8x16_t a, mve_pred16_t p) { return vmovlbq_x (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_u16.c index b668eeb6fcf1..f039019f5b86 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_u16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmovlbt.u16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint16x8_t a, mve_pred16_t p) { return vmovlbq_x_u16 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmovlbt.u16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmovlbt.u16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint16x8_t a, mve_pred16_t p) { return vmovlbq_x (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_u8.c index 6019e2d09d73..7fb32ece22d4 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovlbq_x_u8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmovlbt.u8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint8x16_t a, mve_pred16_t p) { return vmovlbq_x_u8 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmovlbt.u8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmovlbt.u8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint8x16_t a, mve_pred16_t p) { return vmovlbq_x (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_s16.c index 47897a3913f8..72ca8c8bb9b3 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_s16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmovltt.s16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t inactive, int16x8_t a, mve_pred16_t p) { return vmovltq_m_s16 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmovltt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmovltt.s16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t inactive, int16x8_t a, mve_pred16_t p) { return vmovltq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_s8.c index c87b263db51d..7e3b4f40bc55 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_s8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmovltt.s8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t inactive, int8x16_t a, mve_pred16_t p) { return vmovltq_m_s8 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmovltt.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmovltt.s8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t inactive, int8x16_t a, mve_pred16_t p) { return vmovltq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_u16.c index cfe7cd7a5d3f..4320df794abc 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_u16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmovltt.u16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t inactive, uint16x8_t a, mve_pred16_t p) { return vmovltq_m_u16 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmovltt.u16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmovltt.u16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t inactive, uint16x8_t a, mve_pred16_t p) { return vmovltq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_u8.c index a9119fbb9400..c9a75a590b29 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_m_u8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmovltt.u8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t inactive, uint8x16_t a, mve_pred16_t p) { return vmovltq_m_u8 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmovltt.u8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmovltt.u8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t inactive, uint8x16_t a, mve_pred16_t p) { return vmovltq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_s16.c index a7fd325e3304..f431cda53ac4 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_s16.c @@ -1,21 +1,41 @@ -/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ -/* { dg-add-options arm_v8_1m_mve_fp } */ +/* { dg-require-effective-target arm_v8_1m_mve_ok } */ +/* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmovlt.s16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int16x8_t a) { return vmovltq_s16 (a); } -/* { dg-final { scan-assembler "vmovlt.s16" } } */ +/* +**foo1: +** ... +** vmovlt.s16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int16x8_t a) { return vmovltq (a); } -/* { dg-final { scan-assembler "vmovlt.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_s8.c index c392e56b60b5..d65f80664545 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_s8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmovlt.s8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int8x16_t a) { return vmovltq_s8 (a); } -/* { dg-final { scan-assembler "vmovlt.s8" } } */ +/* +**foo1: +** ... +** vmovlt.s8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int8x16_t a) { return vmovltq (a); } -/* { dg-final { scan-assembler "vmovlt.s8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_u16.c index 7634af6f45a7..5469671041b6 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_u16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmovlt.u16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint16x8_t a) { - return vmovltq_u16 (a); + return vmovltq_u16 (a); } -/* { dg-final { scan-assembler "vmovlt.u16" } } */ +/* +**foo1: +** ... +** vmovlt.u16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint16x8_t a) { - return vmovltq (a); + return vmovltq (a); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vmovlt.u16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_u8.c index 2c0d1a7c69da..a14c71cdfbcd 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_u8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmovlt.u8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint8x16_t a) { - return vmovltq_u8 (a); + return vmovltq_u8 (a); } -/* { dg-final { scan-assembler "vmovlt.u8" } } */ +/* +**foo1: +** ... +** vmovlt.u8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint8x16_t a) { - return vmovltq (a); + return vmovltq (a); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vmovlt.u8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_s16.c index ae6c89998353..f8e24c4e0d39 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_s16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmovltt.s16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int16x8_t a, mve_pred16_t p) { return vmovltq_x_s16 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmovltt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmovltt.s16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int16x8_t a, mve_pred16_t p) { return vmovltq_x (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_s8.c index 1172643218aa..b97de081858b 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_s8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmovltt.s8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int8x16_t a, mve_pred16_t p) { return vmovltq_x_s8 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmovltt.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmovltt.s8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int8x16_t a, mve_pred16_t p) { return vmovltq_x (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_u16.c index 64442dcf9358..851264e45eda 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_u16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmovltt.u16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint16x8_t a, mve_pred16_t p) { return vmovltq_x_u16 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmovltt.u16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmovltt.u16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint16x8_t a, mve_pred16_t p) { return vmovltq_x (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_u8.c index 33e571890c06..82219b670dbc 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovltq_x_u8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmovltt.u8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint8x16_t a, mve_pred16_t p) { return vmovltq_x_u8 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmovltt.u8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmovltt.u8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint8x16_t a, mve_pred16_t p) { return vmovltq_x (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_s16.c index fdb392cbf814..3bd9b82cbb39 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_s16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmovnbt.i16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int16x8_t b, mve_pred16_t p) { return vmovnbq_m_s16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmovnbt.i16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmovnbt.i16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p) { return vmovnbq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_s32.c index 9f32f49d24e1..bc2f95c7d8a0 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_s32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmovnbt.i32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int32x4_t b, mve_pred16_t p) { return vmovnbq_m_s32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmovnbt.i32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmovnbt.i32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p) { return vmovnbq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_u16.c index ebc1599af54e..1624237c67ae 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_u16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmovnbt.i16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p) { return vmovnbq_m_u16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmovnbt.i16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmovnbt.i16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p) { return vmovnbq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_u32.c index 502068713e95..1a2f1e8441ee 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_m_u32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmovnbt.i32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p) { return vmovnbq_m_u32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmovnbt.i32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmovnbt.i32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p) { return vmovnbq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_s16.c index a49943fd25ab..d5286f11259e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmovnb.i16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int16x8_t b) { return vmovnbq_s16 (a, b); } -/* { dg-final { scan-assembler "vmovnb.i16" } } */ +/* +**foo1: +** ... +** vmovnb.i16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int16x8_t b) { return vmovnbq (a, b); } -/* { dg-final { scan-assembler "vmovnb.i16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_s32.c index 6dbce2323996..b6b44837b8c3 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmovnb.i32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int32x4_t b) { return vmovnbq_s32 (a, b); } -/* { dg-final { scan-assembler "vmovnb.i32" } } */ +/* +**foo1: +** ... +** vmovnb.i32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int32x4_t b) { return vmovnbq (a, b); } -/* { dg-final { scan-assembler "vmovnb.i32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_u16.c index f3df71a43eb2..1203ac5c7f50 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_u16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmovnb.i16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, uint16x8_t b) { return vmovnbq_u16 (a, b); } -/* { dg-final { scan-assembler "vmovnb.i16" } } */ +/* +**foo1: +** ... +** vmovnb.i16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, uint16x8_t b) { return vmovnbq (a, b); } -/* { dg-final { scan-assembler "vmovnb.i16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_u32.c index e0369ed5fa25..de5bb1117831 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovnbq_u32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmovnb.i32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, uint32x4_t b) { return vmovnbq_u32 (a, b); } -/* { dg-final { scan-assembler "vmovnb.i32" } } */ +/* +**foo1: +** ... +** vmovnb.i32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, uint32x4_t b) { return vmovnbq (a, b); } -/* { dg-final { scan-assembler "vmovnb.i32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_s16.c index f305ab30dc85..594f72c08f5d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_s16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmovntt.i16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int16x8_t b, mve_pred16_t p) { return vmovntq_m_s16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmovntt.i16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmovntt.i16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p) { return vmovntq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_s32.c index 59820c610e69..b3e3e0442c56 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_s32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmovntt.i32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int32x4_t b, mve_pred16_t p) { return vmovntq_m_s32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmovntt.i32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmovntt.i32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p) { return vmovntq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_u16.c index 079b162148ea..a3e33db311e3 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_u16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmovntt.i16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p) { return vmovntq_m_u16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmovntt.i16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmovntt.i16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p) { return vmovntq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_u32.c index 7c09b2e4f9f5..b5629493c726 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_m_u32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmovntt.i32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p) { return vmovntq_m_u32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmovntt.i32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmovntt.i32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p) { return vmovntq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_s16.c index 229cd5809d98..d7e369d266e2 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmovnt.i16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int16x8_t b) { return vmovntq_s16 (a, b); } -/* { dg-final { scan-assembler "vmovnt.i16" } } */ +/* +**foo1: +** ... +** vmovnt.i16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int16x8_t b) { return vmovntq (a, b); } -/* { dg-final { scan-assembler "vmovnt.i16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_s32.c index 01921cbd66e6..6d87cc21aaa8 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmovnt.i32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int32x4_t b) { return vmovntq_s32 (a, b); } -/* { dg-final { scan-assembler "vmovnt.i32" } } */ +/* +**foo1: +** ... +** vmovnt.i32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int32x4_t b) { return vmovntq (a, b); } -/* { dg-final { scan-assembler "vmovnt.i32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_u16.c index 30e75b2169db..f85e45a666ad 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_u16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmovnt.i16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, uint16x8_t b) { return vmovntq_u16 (a, b); } -/* { dg-final { scan-assembler "vmovnt.i16" } } */ +/* +**foo1: +** ... +** vmovnt.i16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, uint16x8_t b) { return vmovntq (a, b); } -/* { dg-final { scan-assembler "vmovnt.i16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_u32.c index 9ed963dda701..05c4af3d6144 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmovntq_u32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmovnt.i32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, uint32x4_t b) { return vmovntq_u32 (a, b); } -/* { dg-final { scan-assembler "vmovnt.i32" } } */ +/* +**foo1: +** ... +** vmovnt.i32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, uint32x4_t b) { return vmovntq (a, b); } -/* { dg-final { scan-assembler "vmovnt.i32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_s16.c index 1b6e683700cf..9d4804a0057f 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_s16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmvnt.i16 q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t inactive, mve_pred16_t p) { - return vmvnq_m_n_s16 (inactive, 2, p); + return vmvnq_m_n_s16 (inactive, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmvnt.i16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmvnt.i16 q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t inactive, mve_pred16_t p) { - return vmvnq_m (inactive, 2, p); + return vmvnq_m (inactive, 1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_s32.c index dcfd69fb7f19..607cdfca33e3 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_s32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmvnt.i32 q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t inactive, mve_pred16_t p) { - return vmvnq_m_n_s32 (inactive, 2, p); + return vmvnq_m_n_s32 (inactive, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmvnt.i32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmvnt.i32 q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t inactive, mve_pred16_t p) { - return vmvnq_m (inactive, 2, p); + return vmvnq_m (inactive, 1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_u16.c index bd86fa806b84..7b0b5a9ef835 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_u16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmvnt.i16 q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t inactive, mve_pred16_t p) { - return vmvnq_m_n_u16 (inactive, 4, p); + return vmvnq_m_n_u16 (inactive, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmvnt.i16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmvnt.i16 q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t inactive, mve_pred16_t p) { - return vmvnq_m (inactive, 4, p); + return vmvnq_m (inactive, 1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_u32.c index 2ac6ef192d76..2217420081ec 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_n_u32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmvnt.i32 q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t inactive, mve_pred16_t p) { - return vmvnq_m_n_u32 (inactive, 4, p); + return vmvnq_m_n_u32 (inactive, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmvnt.i32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmvnt.i32 q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t inactive, mve_pred16_t p) { - return vmvnq_m (inactive, 4, p); + return vmvnq_m (inactive, 1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_s16.c index 5284b8fe0544..e27d8111b543 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_s16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmvnt q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p) { return vmvnq_m_s16 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmvnt" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmvnt q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p) { return vmvnq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_s32.c index da16a5d45d69..8a264a1e76fc 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_s32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmvnt q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p) { return vmvnq_m_s32 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmvnt" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmvnt q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p) { return vmvnq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_s8.c index 206759247c5a..c4374d0ffd4a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_s8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmvnt q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p) { return vmvnq_m_s8 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmvnt" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmvnt q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p) { return vmvnq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_u16.c index 9940cec4bfe8..3d5d56eadfe7 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_u16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmvnt q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p) { return vmvnq_m_u16 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmvnt" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmvnt q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p) { return vmvnq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_u32.c index 25179f13f956..fd1961e06734 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_u32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmvnt q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p) { return vmvnq_m_u32 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmvnt" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmvnt q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p) { return vmvnq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_u8.c index 7237db35b333..037d1f4ce395 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_m_u8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmvnt q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p) { return vmvnq_m_u8 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmvnt" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmvnt q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p) { return vmvnq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_s16.c index 336c6aa63c4c..975639334d52 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_s16.c @@ -1,13 +1,28 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmvn.i16 q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo () { return vmvnq_n_s16 (1); } -/* { dg-final { scan-assembler "vmvn.i16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_s32.c index 354c39c8f7b1..0e09343e6c3d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_s32.c @@ -1,13 +1,28 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmvn.i32 q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo () { - return vmvnq_n_s32 (2); + return vmvnq_n_s32 (1); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vmvn.i32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_u16.c index 178b003091b8..84e158ade937 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_u16.c @@ -1,13 +1,28 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmvn.i16 q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo () { - return vmvnq_n_u16 (1); + return vmvnq_n_u16 (1); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vmvn.i16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_u32.c index 4819066bdbd2..168b77a400a7 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_n_u32.c @@ -1,13 +1,28 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmvn.i32 q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo () { - return vmvnq_n_u32 (2); + return vmvnq_n_u32 (1); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vmvn.i32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_s16.c index 840d834ea9e8..30ddcd9118ec 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_s16.c @@ -1,21 +1,41 @@ -/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ -/* { dg-add-options arm_v8_1m_mve_fp } */ +/* { dg-require-effective-target arm_v8_1m_mve_ok } */ +/* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmvn q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a) { return vmvnq_s16 (a); } -/* { dg-final { scan-assembler "vmvn" } } */ +/* +**foo1: +** ... +** vmvn q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a) { return vmvnq (a); } -/* { dg-final { scan-assembler "vmvn" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_s32.c index cf73bc088c74..48d66753c0f2 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_s32.c @@ -1,21 +1,41 @@ -/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ -/* { dg-add-options arm_v8_1m_mve_fp } */ +/* { dg-require-effective-target arm_v8_1m_mve_ok } */ +/* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmvn q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a) { return vmvnq_s32 (a); } -/* { dg-final { scan-assembler "vmvn" } } */ +/* +**foo1: +** ... +** vmvn q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a) { return vmvnq (a); } -/* { dg-final { scan-assembler "vmvn" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_s8.c index 6d239391cbbb..199bb0f81c3f 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_s8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmvn q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a) { return vmvnq_s8 (a); } -/* { dg-final { scan-assembler "vmvn" } } */ +/* +**foo1: +** ... +** vmvn q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a) { return vmvnq (a); } -/* { dg-final { scan-assembler "vmvn" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_u16.c index db3483285131..c2d724f53756 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_u16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmvn q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a) { - return vmvnq_u16 (a); + return vmvnq_u16 (a); } -/* { dg-final { scan-assembler "vmvn" } } */ +/* +**foo1: +** ... +** vmvn q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a) { - return vmvnq (a); + return vmvnq (a); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vmvn" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_u32.c index c007a959078f..8bafe68f21c3 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_u32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmvn q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t a) { - return vmvnq_u32 (a); + return vmvnq_u32 (a); } -/* { dg-final { scan-assembler "vmvn" } } */ +/* +**foo1: +** ... +** vmvn q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t a) { - return vmvnq (a); + return vmvnq (a); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vmvn" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_u8.c index 2288a283d609..684e5bc94f1f 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_u8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmvn q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a) { - return vmvnq_u8 (a); + return vmvnq_u8 (a); } -/* { dg-final { scan-assembler "vmvn" } } */ +/* +**foo1: +** ... +** vmvn q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a) { - return vmvnq (a); + return vmvnq (a); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vmvn" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_s16.c index b00ccc3e672e..a4d575e4aba2 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_s16.c @@ -1,14 +1,32 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmvnt.i16 q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (mve_pred16_t p) { - return vmvnq_x_n_s16 (2, p); + return vmvnq_x_n_s16 (1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmvnt.i16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_s32.c index ea65104b4b37..9ca5c90d80ea 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_s32.c @@ -1,14 +1,32 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmvnt.i32 q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (mve_pred16_t p) { - return vmvnq_x_n_s32 (2, p); + return vmvnq_x_n_s32 (1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmvnt.i32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_u16.c index 2fa4e40ad5d0..9fbf2b978ac5 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_u16.c @@ -1,14 +1,32 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmvnt.i16 q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (mve_pred16_t p) { - return vmvnq_x_n_u16 (4, p); + return vmvnq_x_n_u16 (1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmvnt.i16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_u32.c index b39e681c1162..883e9af1609e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_n_u32.c @@ -1,14 +1,32 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmvnt.i32 q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (mve_pred16_t p) { - return vmvnq_x_n_u32 (4, p); + return vmvnq_x_n_u32 (1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmvnt.i32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_s16.c index d4b87a795fc3..6bd04f7dd388 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_s16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmvnt q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, mve_pred16_t p) { return vmvnq_x_s16 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmvnt" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmvnt q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, mve_pred16_t p) { return vmvnq_x (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmvnt" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_s32.c index 0bcdba0c1d6d..6af90408e9c3 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_s32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmvnt q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a, mve_pred16_t p) { return vmvnq_x_s32 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmvnt" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmvnt q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a, mve_pred16_t p) { return vmvnq_x (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmvnt" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_s8.c index ffa7306ace61..8c6f118c36f1 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_s8.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmvnt q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, mve_pred16_t p) { return vmvnq_x_s8 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmvnt" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmvnt q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, mve_pred16_t p) { return vmvnq_x (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmvnt" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_u16.c index 29b5ad950eaa..2e9902f38581 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_u16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmvnt q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, mve_pred16_t p) { return vmvnq_x_u16 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmvnt" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmvnt q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, mve_pred16_t p) { return vmvnq_x (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmvnt" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_u32.c index b3d5f73cd928..53b2ebdd457a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_u32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmvnt q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t a, mve_pred16_t p) { return vmvnq_x_u32 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmvnt" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmvnt q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t a, mve_pred16_t p) { return vmvnq_x (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmvnt" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_u8.c index f085aa83662a..ad7a5a9398cd 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmvnq_x_u8.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmvnt q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, mve_pred16_t p) { return vmvnq_x_u8 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmvnt" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vmvnt q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, mve_pred16_t p) { return vmvnq_x (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vmvnt" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_f16.c index 7cf00d940849..36543ee6bfff 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_f16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vorn q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t a, float16x8_t b) { return vornq_f16 (a, b); } -/* { dg-final { scan-assembler "vorn" } } */ +/* +**foo1: +** ... +** vorn q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t a, float16x8_t b) { return vornq (a, b); } -/* { dg-final { scan-assembler "vorn" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_f32.c index d187bde1dc22..c3d73059c311 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_f32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vorn q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t a, float32x4_t b) { return vornq_f32 (a, b); } -/* { dg-final { scan-assembler "vorn" } } */ +/* +**foo1: +** ... +** vorn q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t a, float32x4_t b) { return vornq (a, b); } -/* { dg-final { scan-assembler "vorn" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_f16.c index 081872bada16..7a5cabf43968 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_f16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p) { return vornq_m_f16 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vornt" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p) { return vornq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vornt" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_f32.c index fe92dae6ec66..8fb90212c88a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_f32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p) { return vornq_m_f32 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vornt" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p) { return vornq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vornt" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_s16.c index 56a2b64bc291..31123f853f8f 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_s16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) { return vornq_m_s16 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vornt" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) { return vornq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vornt" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_s32.c index c2e4b1267b84..e5d6d63955b9 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_s32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) { return vornq_m_s32 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vornt" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) { return vornq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vornt" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_s8.c index 6607808e96ea..73bde2bcfde7 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_s8.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) { return vornq_m_s8 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vornt" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) { return vornq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vornt" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_u16.c index 1905ed193ac8..2872c0a70450 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_u16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vornq_m_u16 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vornt" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vornq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vornt" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_u32.c index 6d6620c3e072..90e8df24b998 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_u32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return vornq_m_u32 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vornt" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return vornq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vornt" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_u8.c index 23e8d046c73c..eedbf3a1ae13 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_m_u8.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vornq_m_u8 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vornt" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vornq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vornt" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_s16.c index 0f73ea28e0df..ac92a93f19c0 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vorn q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int16x8_t b) { return vornq_s16 (a, b); } -/* { dg-final { scan-assembler "vorn" } } */ +/* +**foo1: +** ... +** vorn q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int16x8_t b) { return vornq (a, b); } -/* { dg-final { scan-assembler "vorn" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_s32.c index 7d9835fc1b81..38be34838728 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vorn q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a, int32x4_t b) { return vornq_s32 (a, b); } -/* { dg-final { scan-assembler "vorn" } } */ +/* +**foo1: +** ... +** vorn q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a, int32x4_t b) { return vornq (a, b); } -/* { dg-final { scan-assembler "vorn" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_s8.c index f2ba62292f5f..3d5e47fa1e49 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_s8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vorn q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int8x16_t b) { return vornq_s8 (a, b); } -/* { dg-final { scan-assembler "vorn" } } */ +/* +**foo1: +** ... +** vorn q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int8x16_t b) { return vornq (a, b); } -/* { dg-final { scan-assembler "vorn" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_u16.c index baa3fd808134..e69212d59b0f 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_u16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vorn q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, uint16x8_t b) { return vornq_u16 (a, b); } -/* { dg-final { scan-assembler "vorn" } } */ +/* +**foo1: +** ... +** vorn q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, uint16x8_t b) { return vornq (a, b); } -/* { dg-final { scan-assembler "vorn" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_u32.c index 481db437b779..c89622c830f5 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_u32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vorn q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t a, uint32x4_t b) { return vornq_u32 (a, b); } -/* { dg-final { scan-assembler "vorn" } } */ +/* +**foo1: +** ... +** vorn q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t a, uint32x4_t b) { return vornq (a, b); } -/* { dg-final { scan-assembler "vorn" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_u8.c index 575a7365487f..61ce5ad294a8 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_u8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vorn q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, uint8x16_t b) { return vornq_u8 (a, b); } -/* { dg-final { scan-assembler "vorn" } } */ +/* +**foo1: +** ... +** vorn q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, uint8x16_t b) { return vornq (a, b); } -/* { dg-final { scan-assembler "vorn" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_f16.c index d776bff24167..2bc10776f6d8 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_f16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t a, float16x8_t b, mve_pred16_t p) { return vornq_x_f16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vornt" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p) { return vornq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_f32.c index 939e8fafb838..7b733cf6a6b7 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_f32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t a, float32x4_t b, mve_pred16_t p) { return vornq_x_f32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vornt" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p) { return vornq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_s16.c index 77569b42cc8e..beba497bbf99 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_s16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int16x8_t b, mve_pred16_t p) { return vornq_x_s16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vornt" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) { return vornq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_s32.c index 29cfd020c30d..60e6125ed6e4 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_s32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a, int32x4_t b, mve_pred16_t p) { return vornq_x_s32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vornt" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) { return vornq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_s8.c index fd10ff8e719e..f62c9b2a1119 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_s8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int8x16_t b, mve_pred16_t p) { return vornq_x_s8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vornt" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) { return vornq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_u16.c index 473f22abd526..2ac693ca30fe 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_u16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vornq_x_u16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vornt" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vornq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_u32.c index 010ac07454da..1981c8ca4083 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_u32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return vornq_x_u32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vornt" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return vornq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_u8.c index 126a6d236b3a..171dc0f58b6a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vornq_x_u8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vornq_x_u8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vornt" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vornt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vornq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_f16.c index 1481c43ae5fa..3d222d5679bf 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_f16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vorr q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t a, float16x8_t b) { return vorrq_f16 (a, b); } -/* { dg-final { scan-assembler "vorr" } } */ +/* +**foo1: +** ... +** vorr q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t a, float16x8_t b) { return vorrq (a, b); } -/* { dg-final { scan-assembler "vorr" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_f32.c index 257edd99b7bf..140817ee919e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_f32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vorr q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t a, float32x4_t b) { return vorrq_f32 (a, b); } -/* { dg-final { scan-assembler "vorr" } } */ +/* +**foo1: +** ... +** vorr q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t a, float32x4_t b) { return vorrq (a, b); } -/* { dg-final { scan-assembler "vorr" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_f16.c index 641c8f0f3bd0..dbfac7241318 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_f16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p) { return vorrq_m_f16 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vorrt" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p) { return vorrq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vorrt" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_f32.c index b537a7c74c3b..e13a1df44e2b 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_f32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p) { return vorrq_m_f32 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vorrt" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p) { return vorrq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vorrt" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_s16.c index 757482a3a95b..b591bd6fc119 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_s16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vorrt.i16 q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, mve_pred16_t p) { - return vorrq_m_n_s16 (a, 253, p); + return vorrq_m_n_s16 (a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vorrt.i16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vorrt.i16 q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, mve_pred16_t p) { - return vorrq_m_n (a, 253, p); + return vorrq_m_n (a, 1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_s32.c index 967e49e7a264..ce4dd3ee7bc4 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_s32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vorrt.i32 q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a, mve_pred16_t p) { return vorrq_m_n_s32 (a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vorrt.i32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vorrt.i32 q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a, mve_pred16_t p) { return vorrq_m_n (a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_u16.c index 01022c32a880..9e7788484ad1 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_u16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vorrt.i16 q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, mve_pred16_t p) { return vorrq_m_n_u16 (a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vorrt.i16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vorrt.i16 q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, mve_pred16_t p) { return vorrq_m_n (a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_u32.c index 809237d1cf69..613c0e2f889c 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_n_u32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vorrt.i32 q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t a, mve_pred16_t p) { return vorrq_m_n_u32 (a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vorrt.i32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vorrt.i32 q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t a, mve_pred16_t p) { return vorrq_m_n (a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_s16.c index 2714810d591f..d475f1e939f8 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_s16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) { return vorrq_m_s16 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vorrt" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) { return vorrq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vorrt" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_s32.c index c960b18631a1..e171e93e4eb3 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_s32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) { return vorrq_m_s32 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vorrt" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) { return vorrq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vorrt" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_s8.c index d1d4bc721b0e..17043b26c2e1 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_s8.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) { return vorrq_m_s8 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vorrt" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) { return vorrq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vorrt" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_u16.c index 01190ea48120..19a752ec3b7c 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_u16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vorrq_m_u16 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vorrt" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vorrq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vorrt" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_u32.c index 502ceab2fe4b..7f3985d15080 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_u32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return vorrq_m_u32 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vorrt" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return vorrq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vorrt" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_u8.c index 44cf1413ca66..5a04ebdf1dea 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_m_u8.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vorrq_m_u8 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vorrt" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vorrq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vorrt" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_s16.c index 63a369f9996c..b95418d96688 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_s16.c @@ -1,13 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vorr.i16 q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a) { return vorrq_n_s16 (a, 1); } -/* { dg-final { scan-assembler "vorr.i16" } } */ + +/* +**foo1: +** ... +** vorr.i16 q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ +int16x8_t +foo1 (int16x8_t a) +{ + return vorrq (a, 1); +} + +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_s32.c index cf7bbc8c46d0..30248216012d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_s32.c @@ -1,13 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vorr.i32 q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a) { return vorrq_n_s32 (a, 1); } -/* { dg-final { scan-assembler "vorr.i32" } } */ + +/* +**foo1: +** ... +** vorr.i32 q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ +int32x4_t +foo1 (int32x4_t a) +{ + return vorrq (a, 1); +} + +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_u16.c index 2d599e52f8d0..1f131501aec5 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_u16.c @@ -1,13 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vorr.i16 q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a) { return vorrq_n_u16 (a, 1); } -/* { dg-final { scan-assembler "vorr.i16" } } */ + +/* +**foo1: +** ... +** vorr.i16 q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ +uint16x8_t +foo1 (uint16x8_t a) +{ + return vorrq (a, 1); +} + +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_u32.c index 5a873d0d1a3e..5bfdb0b2e145 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_n_u32.c @@ -1,13 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vorr.i32 q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t a) { - return vorrq_n_u32 (a, 44); + return vorrq_n_u32 (a, 1); +} + + +/* +**foo1: +** ... +** vorr.i32 q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ +uint32x4_t +foo1 (uint32x4_t a) +{ + return vorrq (a, 1); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vorr.i32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_s16.c index 2a56912ab317..658df6f422fc 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vorr q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int16x8_t b) { return vorrq_s16 (a, b); } -/* { dg-final { scan-assembler "vorr" } } */ +/* +**foo1: +** ... +** vorr q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int16x8_t b) { return vorrq (a, b); } -/* { dg-final { scan-assembler "vorr" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_s32.c index e80b991c95a0..a0a24b7fd45e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vorr q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a, int32x4_t b) { return vorrq_s32 (a, b); } -/* { dg-final { scan-assembler "vorr" } } */ +/* +**foo1: +** ... +** vorr q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a, int32x4_t b) { return vorrq (a, b); } -/* { dg-final { scan-assembler "vorr" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_s8.c index 3456477c07c6..645c6144f46b 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_s8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vorr q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int8x16_t b) { return vorrq_s8 (a, b); } -/* { dg-final { scan-assembler "vorr" } } */ +/* +**foo1: +** ... +** vorr q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int8x16_t b) { return vorrq (a, b); } -/* { dg-final { scan-assembler "vorr" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_u16.c index bb7699c1e3b5..cb618a1f7931 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_u16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vorr q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, uint16x8_t b) { return vorrq_u16 (a, b); } -/* { dg-final { scan-assembler "vorr" } } */ +/* +**foo1: +** ... +** vorr q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, uint16x8_t b) { return vorrq (a, b); } -/* { dg-final { scan-assembler "vorr" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_u32.c index e01f5413dc34..937102ff9626 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_u32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vorr q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t a, uint32x4_t b) { return vorrq_u32 (a, b); } -/* { dg-final { scan-assembler "vorr" } } */ +/* +**foo1: +** ... +** vorr q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t a, uint32x4_t b) { return vorrq (a, b); } -/* { dg-final { scan-assembler "vorr" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_u8.c index c7ad98805c4e..07121b5b1c95 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_u8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vorr q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, uint8x16_t b) { return vorrq_u8 (a, b); } -/* { dg-final { scan-assembler "vorr" } } */ +/* +**foo1: +** ... +** vorr q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, uint8x16_t b) { return vorrq (a, b); } -/* { dg-final { scan-assembler "vorr" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_f16.c index 2e678febb78e..b34d102f470f 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_f16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t a, float16x8_t b, mve_pred16_t p) { return vorrq_x_f16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vorrt" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p) { return vorrq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_f32.c index 12acfb497739..d41a94e7a024 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_f32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t a, float32x4_t b, mve_pred16_t p) { return vorrq_x_f32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vorrt" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p) { return vorrq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_s16.c index 75fe45418452..3e1d3e97d26e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_s16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int16x8_t b, mve_pred16_t p) { return vorrq_x_s16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vorrt" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) { return vorrq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_s32.c index 37d17f046af9..0982b3d2081a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_s32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a, int32x4_t b, mve_pred16_t p) { return vorrq_x_s32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vorrt" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) { return vorrq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_s8.c index 3558db3b7b0e..0a46246e1249 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_s8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int8x16_t b, mve_pred16_t p) { return vorrq_x_s8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vorrt" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) { return vorrq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_u16.c index 7c9a2559c87d..ef83d9de2eed 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_u16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vorrq_x_u16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vorrt" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vorrq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_u32.c index 13ff34d582a0..b6abfd5b314a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_u32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return vorrq_x_u32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vorrt" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return vorrq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_u8.c index 781b2b596998..b724ed0562b8 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vorrq_x_u8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vorrq_x_u8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vorrt" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vorrt q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vorrq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpnot.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpnot.c index a84f84446c01..2b894d1d938e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpnot.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpnot.c @@ -1,21 +1,32 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpnot(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), p0(?: @.*|) +** ... +*/ mve_pred16_t foo (mve_pred16_t a) { return vpnot (a); } -/* { dg-final { scan-assembler "vpnot" } } */ - -mve_pred16_t -foo1 (mve_pred16_t a) -{ - return vpnot (a); +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpnot" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_f16.c index ff121b585eda..50127b4537db 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_f16.c @@ -1,21 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpsel q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t a, float16x8_t b, mve_pred16_t p) { return vpselq_f16 (a, b, p); } -/* { dg-final { scan-assembler "vpsel" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpsel q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p) { return vpselq (a, b, p); } -/* { dg-final { scan-assembler "vpsel" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_f32.c index 35c84761f08f..0733413f1ca1 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_f32.c @@ -1,21 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpsel q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t a, float32x4_t b, mve_pred16_t p) { return vpselq_f32 (a, b, p); } -/* { dg-final { scan-assembler "vpsel" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpsel q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p) { return vpselq (a, b, p); } -/* { dg-final { scan-assembler "vpsel" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s16.c index 0e0c14ed49d1..06ef70c40739 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s16.c @@ -1,21 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpsel q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int16x8_t b, mve_pred16_t p) { return vpselq_s16 (a, b, p); } -/* { dg-final { scan-assembler "vpsel" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpsel q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) { return vpselq (a, b, p); } -/* { dg-final { scan-assembler "vpsel" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s32.c index 0e746de6e07a..87b4b2242eb9 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s32.c @@ -1,21 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpsel q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a, int32x4_t b, mve_pred16_t p) { return vpselq_s32 (a, b, p); } -/* { dg-final { scan-assembler "vpsel" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpsel q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) { return vpselq (a, b, p); } -/* { dg-final { scan-assembler "vpsel" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s64.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s64.c index f4bbb77e268c..dedb812c11b6 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s64.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s64.c @@ -1,21 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpsel q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64x2_t foo (int64x2_t a, int64x2_t b, mve_pred16_t p) { return vpselq_s64 (a, b, p); } -/* { dg-final { scan-assembler "vpsel" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpsel q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64x2_t foo1 (int64x2_t a, int64x2_t b, mve_pred16_t p) { return vpselq (a, b, p); } -/* { dg-final { scan-assembler "vpsel" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s8.c index 65cd415c789c..5050fc035565 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_s8.c @@ -1,21 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpsel q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int8x16_t b, mve_pred16_t p) { return vpselq_s8 (a, b, p); } -/* { dg-final { scan-assembler "vpsel" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpsel q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) { return vpselq (a, b, p); } -/* { dg-final { scan-assembler "vpsel" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u16.c index 742ca17ac8ee..055f3c00381d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u16.c @@ -1,21 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpsel q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vpselq_u16 (a, b, p); } -/* { dg-final { scan-assembler "vpsel" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpsel q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vpselq (a, b, p); } -/* { dg-final { scan-assembler "vpsel" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u32.c index 9d2e01c31d4f..11333822b194 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u32.c @@ -1,21 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpsel q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return vpselq_u32 (a, b, p); } -/* { dg-final { scan-assembler "vpsel" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpsel q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return vpselq (a, b, p); } -/* { dg-final { scan-assembler "vpsel" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u64.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u64.c index 58c4169bc0ae..c08e6c54d950 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u64.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u64.c @@ -1,21 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpsel q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint64x2_t foo (uint64x2_t a, uint64x2_t b, mve_pred16_t p) { return vpselq_u64 (a, b, p); } -/* { dg-final { scan-assembler "vpsel" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpsel q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint64x2_t foo1 (uint64x2_t a, uint64x2_t b, mve_pred16_t p) { return vpselq (a, b, p); } -/* { dg-final { scan-assembler "vpsel" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u8.c index 5f73ba44ea8e..804aed384c84 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vpselq_u8.c @@ -1,21 +1,45 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpsel q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vpselq_u8 (a, b, p); } -/* { dg-final { scan-assembler "vpsel" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpsel q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vpselq (a, b, p); } -/* { dg-final { scan-assembler "vpsel" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_s16.c index bf5520ed1ff5..dd6c0300c325 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_s16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqmovnbt.s16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int16x8_t b, mve_pred16_t p) { return vqmovnbq_m_s16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqmovnbt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqmovnbt.s16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p) { return vqmovnbq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_s32.c index f07612a47d59..eb340ebe5202 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_s32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqmovnbt.s32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int32x4_t b, mve_pred16_t p) { return vqmovnbq_m_s32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqmovnbt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqmovnbt.s32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p) { return vqmovnbq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_u16.c index 79f082fefabd..673f453e7af8 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_u16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqmovnbt.u16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p) { return vqmovnbq_m_u16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqmovnbt.u16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqmovnbt.u16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p) { return vqmovnbq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_u32.c index 5d242dc497fa..84f7f9bf897c 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_m_u32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqmovnbt.u32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p) { return vqmovnbq_m_u32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqmovnbt.u32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqmovnbt.u32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p) { return vqmovnbq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_s16.c index 18df48f50840..ed17eb818842 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqmovnb.s16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int16x8_t b) { return vqmovnbq_s16 (a, b); } -/* { dg-final { scan-assembler "vqmovnb.s16" } } */ +/* +**foo1: +** ... +** vqmovnb.s16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int16x8_t b) { return vqmovnbq (a, b); } -/* { dg-final { scan-assembler "vqmovnb.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_s32.c index 37f9e817805d..065ce9b246c4 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqmovnb.s32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int32x4_t b) { return vqmovnbq_s32 (a, b); } -/* { dg-final { scan-assembler "vqmovnb.s32" } } */ +/* +**foo1: +** ... +** vqmovnb.s32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int32x4_t b) { return vqmovnbq (a, b); } -/* { dg-final { scan-assembler "vqmovnb.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_u16.c index 130dcb069441..29df4636e3d7 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_u16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqmovnb.u16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, uint16x8_t b) { return vqmovnbq_u16 (a, b); } -/* { dg-final { scan-assembler "vqmovnb.u16" } } */ +/* +**foo1: +** ... +** vqmovnb.u16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, uint16x8_t b) { return vqmovnbq (a, b); } -/* { dg-final { scan-assembler "vqmovnb.u16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_u32.c index 8bf735294e54..422c33560d3e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovnbq_u32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqmovnb.u32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, uint32x4_t b) { return vqmovnbq_u32 (a, b); } -/* { dg-final { scan-assembler "vqmovnb.u32" } } */ +/* +**foo1: +** ... +** vqmovnb.u32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, uint32x4_t b) { return vqmovnbq (a, b); } -/* { dg-final { scan-assembler "vqmovnb.u32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_s16.c index bc624bcd8776..b50964bd4f75 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_s16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqmovntt.s16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int16x8_t b, mve_pred16_t p) { return vqmovntq_m_s16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqmovntt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqmovntt.s16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p) { return vqmovntq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_s32.c index 429f25cdb0f9..5d4947abb9fe 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_s32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqmovntt.s32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int32x4_t b, mve_pred16_t p) { return vqmovntq_m_s32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqmovntt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqmovntt.s32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p) { return vqmovntq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_u16.c index a453a9fc36aa..8cfd62831eb9 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_u16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqmovntt.u16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p) { return vqmovntq_m_u16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqmovntt.u16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqmovntt.u16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p) { return vqmovntq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_u32.c index 3f9ae8a5ee4b..b9d3b7e75ac5 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_m_u32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqmovntt.u32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p) { return vqmovntq_m_u32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqmovntt.u32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqmovntt.u32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p) { return vqmovntq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_s16.c index 5de956cbac40..8838a242fd9b 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqmovnt.s16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int16x8_t b) { return vqmovntq_s16 (a, b); } -/* { dg-final { scan-assembler "vqmovnt.s16" } } */ +/* +**foo1: +** ... +** vqmovnt.s16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int16x8_t b) { return vqmovntq (a, b); } -/* { dg-final { scan-assembler "vqmovnt.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_s32.c index 30db31c47eee..1d8b0dc17efa 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqmovnt.s32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int32x4_t b) { return vqmovntq_s32 (a, b); } -/* { dg-final { scan-assembler "vqmovnt.s32" } } */ +/* +**foo1: +** ... +** vqmovnt.s32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int32x4_t b) { return vqmovntq (a, b); } -/* { dg-final { scan-assembler "vqmovnt.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_u16.c index 312ce4f865fe..10badd5feb4f 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_u16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqmovnt.u16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, uint16x8_t b) { return vqmovntq_u16 (a, b); } -/* { dg-final { scan-assembler "vqmovnt.u16" } } */ +/* +**foo1: +** ... +** vqmovnt.u16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, uint16x8_t b) { return vqmovntq (a, b); } -/* { dg-final { scan-assembler "vqmovnt.u16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_u32.c index 206233848586..804603930016 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovntq_u32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqmovnt.u32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, uint32x4_t b) { return vqmovntq_u32 (a, b); } -/* { dg-final { scan-assembler "vqmovnt.u32" } } */ +/* +**foo1: +** ... +** vqmovnt.u32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, uint32x4_t b) { return vqmovntq (a, b); } -/* { dg-final { scan-assembler "vqmovnt.u32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_m_s16.c index 8e46de63b846..d295b3f9155b 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_m_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_m_s16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqmovunbt.s16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, int16x8_t b, mve_pred16_t p) { return vqmovunbq_m_s16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqmovunbt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqmovunbt.s16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, int16x8_t b, mve_pred16_t p) { return vqmovunbq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_m_s32.c index d0ec95192f95..84b94db682f2 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_m_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_m_s32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqmovunbt.s32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, int32x4_t b, mve_pred16_t p) { return vqmovunbq_m_s32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqmovunbt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqmovunbt.s32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, int32x4_t b, mve_pred16_t p) { return vqmovunbq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_s16.c index 9b3b80d024f5..070bb90bf129 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqmovunb.s16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, int16x8_t b) { return vqmovunbq_s16 (a, b); } -/* { dg-final { scan-assembler "vqmovunb.s16" } } */ +/* +**foo1: +** ... +** vqmovunb.s16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, int16x8_t b) { return vqmovunbq (a, b); } -/* { dg-final { scan-assembler "vqmovunb.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_s32.c index 9cc43d987de2..659e703a5580 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovunbq_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqmovunb.s32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, int32x4_t b) { return vqmovunbq_s32 (a, b); } -/* { dg-final { scan-assembler "vqmovunb.s32" } } */ +/* +**foo1: +** ... +** vqmovunb.s32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, int32x4_t b) { return vqmovunbq (a, b); } -/* { dg-final { scan-assembler "vqmovunb.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_m_s16.c index a81fb8863afa..fb3b36c451e8 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_m_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_m_s16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqmovuntt.s16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, int16x8_t b, mve_pred16_t p) { return vqmovuntq_m_s16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqmovuntt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqmovuntt.s16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, int16x8_t b, mve_pred16_t p) { return vqmovuntq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_m_s32.c index e76ca2b5f48f..f6fce6d44734 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_m_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_m_s32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqmovuntt.s32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, int32x4_t b, mve_pred16_t p) { return vqmovuntq_m_s32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqmovuntt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqmovuntt.s32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, int32x4_t b, mve_pred16_t p) { return vqmovuntq_m (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_s16.c index 324d2e56f3c0..3230f25998b7 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqmovunt.s16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, int16x8_t b) { return vqmovuntq_s16 (a, b); } -/* { dg-final { scan-assembler "vqmovunt.s16" } } */ +/* +**foo1: +** ... +** vqmovunt.s16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, int16x8_t b) { return vqmovuntq (a, b); } -/* { dg-final { scan-assembler "vqmovunt.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_s32.c index 80fee05b642a..5333897a34a0 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqmovuntq_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqmovunt.s32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, int32x4_t b) { return vqmovuntq_s32 (a, b); } -/* { dg-final { scan-assembler "vqmovunt.s32" } } */ +/* +**foo1: +** ... +** vqmovunt.s32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, int32x4_t b) { return vqmovuntq (a, b); } -/* { dg-final { scan-assembler "vqmovunt.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s16.c index 5b0e134a0ff7..1140c25c4a2b 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s16.c @@ -46,4 +46,4 @@ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s32.c index 6fdf3879cc27..b3e6dac19a91 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s32.c @@ -46,4 +46,4 @@ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s8.c index ef75f737161a..5ae74e1dd2de 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s8.c @@ -46,4 +46,4 @@ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s16.c index cf7cdb202ce7..f515c3926da9 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s16.c @@ -38,4 +38,4 @@ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s32.c index 5a022fe30094..4693d01eeb48 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s32.c @@ -38,4 +38,4 @@ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s8.c index 2cb27df16f6c..cea58e4f80ab 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s8.c @@ -38,4 +38,4 @@ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s16.c index 1f68671b3f9b..3b8ea613f1d8 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s16.c @@ -46,4 +46,4 @@ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s32.c index eaea6e1f4820..6ef932672bc2 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s32.c @@ -46,4 +46,4 @@ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s8.c index 0f582a91f3a2..5b9dc5cadacc 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s8.c @@ -46,4 +46,4 @@ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s16.c index a26898ebdabe..745c70b84f72 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s16.c @@ -38,4 +38,4 @@ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s32.c index 572486ecf827..94e976f724cf 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s32.c @@ -38,4 +38,4 @@ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s8.c index 00e478b9d3e9..f8c9f4870682 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s8.c @@ -38,4 +38,4 @@ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s16.c index 304f86c6e512..f8400ac63d7a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s16.c @@ -46,4 +46,4 @@ foo1 (int16x8_t add, int16x8_t m1, int16_t m2, mve_pred16_t p) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s32.c index 265fecaf8065..fa1131de6b52 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s32.c @@ -46,4 +46,4 @@ foo1 (int32x4_t add, int32x4_t m1, int32_t m2, mve_pred16_t p) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s8.c index d1687f793114..a7ce97cc2f68 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_m_n_s8.c @@ -46,4 +46,4 @@ foo1 (int8x16_t add, int8x16_t m1, int8_t m2, mve_pred16_t p) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s16.c index 4595d55711ec..175a2f74416b 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s16.c @@ -38,4 +38,4 @@ foo1 (int16x8_t add, int16x8_t m1, int16_t m2) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s32.c index 22d9ce56a35d..56d5423bd3f1 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s32.c @@ -38,4 +38,4 @@ foo1 (int32x4_t add, int32x4_t m1, int32_t m2) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s8.c index 36a23ad2078f..992be7588374 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s8.c @@ -38,4 +38,4 @@ foo1 (int8x16_t add, int8x16_t m1, int8_t m2) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s16.c index 2995682f2526..d713c224b30b 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s16.c @@ -46,4 +46,4 @@ foo1 (int16x8_t m1, int16x8_t m2, int16_t add, mve_pred16_t p) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s32.c index 7e637e6900ff..8af4928f8339 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s32.c @@ -46,4 +46,4 @@ foo1 (int32x4_t m1, int32x4_t m2, int32_t add, mve_pred16_t p) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s8.c index d81472d933a4..9f30b7d0e13f 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_m_n_s8.c @@ -46,4 +46,4 @@ foo1 (int8x16_t m1, int8x16_t m2, int8_t add, mve_pred16_t p) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s16.c index 2710f2f04429..83caaab89265 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s16.c @@ -38,4 +38,4 @@ foo1 (int16x8_t m1, int16x8_t m2, int16_t add) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s32.c index 5fefc3938c54..337f33c51c80 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s32.c @@ -38,4 +38,4 @@ foo1 (int32x4_t m1, int32x4_t m2, int32_t add) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s8.c index df96fe852139..df005ee9b033 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s8.c @@ -38,4 +38,4 @@ foo1 (int8x16_t m1, int8x16_t m2, int8_t add) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s16.c index 6a5776215ca6..52c7f16df121 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s16.c @@ -46,4 +46,4 @@ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s32.c index 9539e249d6ab..574809dde9bd 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s32.c @@ -46,4 +46,4 @@ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s8.c index 69e54f53a764..9b509687ed99 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s8.c @@ -46,4 +46,4 @@ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s16.c index 3eb957d60294..19fdc1515504 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s16.c @@ -38,4 +38,4 @@ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s32.c index 3a3fb506c017..d50bd8500bdc 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s32.c @@ -38,4 +38,4 @@ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s8.c index 65ac15da9c76..c3f6b3e462be 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s8.c @@ -38,4 +38,4 @@ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s16.c index 3598f50ccba7..35fc3bde9751 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s16.c @@ -46,4 +46,4 @@ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s32.c index 1ab22edf9cae..7b5ee71194ce 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s32.c @@ -46,4 +46,4 @@ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s8.c index 01103e99b61b..0ceb9c55aa39 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s8.c @@ -46,4 +46,4 @@ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s16.c index 522d0ba4a3a7..b94e4cca8b2f 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s16.c @@ -38,4 +38,4 @@ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s32.c index 5198dfa754e5..0f508d9bca18 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s32.c @@ -38,4 +38,4 @@ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s8.c index b5baa3dea791..92607fe02657 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s8.c @@ -38,4 +38,4 @@ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s16.c index fc3a33073aa2..ae38058cc62d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s16.c @@ -46,4 +46,4 @@ foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s32.c index 897ad5bd28c2..e923495f4b56 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s32.c @@ -46,4 +46,4 @@ foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s8.c index 05ab0609af4f..a6ce3b2ca01c 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s8.c @@ -46,4 +46,4 @@ foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s16.c index 1d9dc07787c9..a8a749d07cbc 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s16.c @@ -46,4 +46,4 @@ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s32.c index 76d7507e35a3..ad6130dfbdcb 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s32.c @@ -46,4 +46,4 @@ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s8.c index 7fd2119ea631..da29228e5f38 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s8.c @@ -46,4 +46,4 @@ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s16.c index 8a90a3998589..342ef427bc9f 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s16.c @@ -38,4 +38,4 @@ foo1 (int16x8_t a, int16_t b) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s32.c index 973464b32974..7ae72b756892 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s32.c @@ -38,4 +38,4 @@ foo1 (int32x4_t a, int32_t b) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s8.c index 65aab964f4e1..8acb72a2245e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s8.c @@ -38,4 +38,4 @@ foo1 (int8x16_t a, int8_t b) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s16.c index f3153c86b4cf..5e93d7758c0a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s16.c @@ -38,4 +38,4 @@ foo1 (int16x8_t a, int16x8_t b) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s32.c index 48b10dbd0255..d2812c0aa059 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s32.c @@ -38,4 +38,4 @@ foo1 (int32x4_t a, int32x4_t b) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s8.c index 9f0346fc8418..5c188a6d91f4 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s8.c @@ -38,4 +38,4 @@ foo1 (int8x16_t a, int8x16_t b) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s16.c index 8d5abfd7588e..d9baa378fac7 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqrshlt.s16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int32_t b, mve_pred16_t p) { return vqrshlq_m_n_s16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqrshlt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqrshlt.s16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int32_t b, mve_pred16_t p) { return vqrshlq_m_n (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s32.c index 734f67ae2512..ce4140a6fb80 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqrshlt.s32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a, int32_t b, mve_pred16_t p) { return vqrshlq_m_n_s32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqrshlt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqrshlt.s32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a, int32_t b, mve_pred16_t p) { return vqrshlq_m_n (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s8.c index 3c6724f285b3..ce576b01d65b 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqrshlt.s8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int32_t b, mve_pred16_t p) { return vqrshlq_m_n_s8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqrshlt.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqrshlt.s8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int32_t b, mve_pred16_t p) { return vqrshlq_m_n (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u16.c index 3e39599df8af..e861a7b1f6ab 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqrshlt.u16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, int32_t b, mve_pred16_t p) { return vqrshlq_m_n_u16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqrshlt.u16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqrshlt.u16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, int32_t b, mve_pred16_t p) { return vqrshlq_m_n (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u32.c index 41f5945daf97..d4cb581c623d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqrshlt.u32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t a, int32_t b, mve_pred16_t p) { return vqrshlq_m_n_u32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqrshlt.u32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqrshlt.u32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t a, int32_t b, mve_pred16_t p) { return vqrshlq_m_n (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u8.c index 9aad25994763..f170f225d958 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqrshlt.u8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, int32_t b, mve_pred16_t p) { return vqrshlq_m_n_u8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqrshlt.u8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqrshlt.u8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, int32_t b, mve_pred16_t p) { return vqrshlq_m_n (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_s16.c index 80045c5b5835..7c5449fb168b 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_s16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqrshlt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) { return vqrshlq_m_s16 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqrshlt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqrshlt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) { return vqrshlq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqrshlt.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_s32.c index 9b4cf1663cd4..53a421cf8308 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_s32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqrshlt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) { return vqrshlq_m_s32 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqrshlt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqrshlt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) { return vqrshlq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqrshlt.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_s8.c index 55e0dd57023c..52ad43729160 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_s8.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqrshlt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) { return vqrshlq_m_s8 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqrshlt.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqrshlt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) { return vqrshlq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqrshlt.s8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_u16.c index cd5605444a1c..e7ca47863630 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_u16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqrshlt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t inactive, uint16x8_t a, int16x8_t b, mve_pred16_t p) { return vqrshlq_m_u16 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqrshlt.u16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqrshlt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t inactive, uint16x8_t a, int16x8_t b, mve_pred16_t p) { return vqrshlq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqrshlt.u16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_u32.c index 02c94d0a51f2..3785bbea0dc9 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_u32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqrshlt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t inactive, uint32x4_t a, int32x4_t b, mve_pred16_t p) { return vqrshlq_m_u32 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqrshlt.u32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqrshlt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t inactive, uint32x4_t a, int32x4_t b, mve_pred16_t p) { return vqrshlq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqrshlt.u32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_u8.c index e6058dfc4c59..c736abeceab4 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_m_u8.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqrshlt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t inactive, uint8x16_t a, int8x16_t b, mve_pred16_t p) { return vqrshlq_m_u8 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqrshlt.u8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqrshlt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t inactive, uint8x16_t a, int8x16_t b, mve_pred16_t p) { return vqrshlq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqrshlt.u8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_s16.c index 46fd917d2d9c..231ce85f1a3c 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqrshl.s16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int32_t b) { return vqrshlq_n_s16 (a, b); } -/* { dg-final { scan-assembler "vqrshl.s16" } } */ +/* +**foo1: +** ... +** vqrshl.s16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int32_t b) { return vqrshlq (a, b); } -/* { dg-final { scan-assembler "vqrshl.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_s32.c index 373de10b89cb..05589eb86cc1 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqrshl.s32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a, int32_t b) { return vqrshlq_n_s32 (a, b); } -/* { dg-final { scan-assembler "vqrshl.s32" } } */ +/* +**foo1: +** ... +** vqrshl.s32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a, int32_t b) { return vqrshlq (a, b); } -/* { dg-final { scan-assembler "vqrshl.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_s8.c index d05d2fc722fa..182e7cf260a4 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_s8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqrshl.s8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int32_t b) { return vqrshlq_n_s8 (a, b); } -/* { dg-final { scan-assembler "vqrshl.s8" } } */ +/* +**foo1: +** ... +** vqrshl.s8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int32_t b) { return vqrshlq (a, b); } -/* { dg-final { scan-assembler "vqrshl.s8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_u16.c index 8a74d61e75de..1b5214623c63 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_u16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqrshl.u16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, int32_t b) { return vqrshlq_n_u16 (a, b); } -/* { dg-final { scan-assembler "vqrshl.u16" } } */ +/* +**foo1: +** ... +** vqrshl.u16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, int32_t b) { return vqrshlq (a, b); } -/* { dg-final { scan-assembler "vqrshl.u16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_u32.c index ccb0db7bb32a..50d09bac3a98 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_u32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqrshl.u32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t a, int32_t b) { return vqrshlq_n_u32 (a, b); } -/* { dg-final { scan-assembler "vqrshl.u32" } } */ +/* +**foo1: +** ... +** vqrshl.u32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t a, int32_t b) { return vqrshlq (a, b); } -/* { dg-final { scan-assembler "vqrshl.u32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_u8.c index c3319ea29d28..846d90a2470c 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_n_u8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqrshl.u8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, int32_t b) { return vqrshlq_n_u8 (a, b); } -/* { dg-final { scan-assembler "vqrshl.u8" } } */ +/* +**foo1: +** ... +** vqrshl.u8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, int32_t b) { return vqrshlq (a, b); } -/* { dg-final { scan-assembler "vqrshl.u8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_s16.c index c5645cee518d..2a4a0feb5e6a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqrshl.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int16x8_t b) { return vqrshlq_s16 (a, b); } -/* { dg-final { scan-assembler "vqrshl.s16" } } */ +/* +**foo1: +** ... +** vqrshl.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int16x8_t b) { return vqrshlq (a, b); } -/* { dg-final { scan-assembler "vqrshl.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_s32.c index b773ccf9245b..94665928299d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqrshl.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a, int32x4_t b) { return vqrshlq_s32 (a, b); } -/* { dg-final { scan-assembler "vqrshl.s32" } } */ +/* +**foo1: +** ... +** vqrshl.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a, int32x4_t b) { return vqrshlq (a, b); } -/* { dg-final { scan-assembler "vqrshl.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_s8.c index 1a61cb6de10f..2836a6e4dc8e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_s8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqrshl.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int8x16_t b) { return vqrshlq_s8 (a, b); } -/* { dg-final { scan-assembler "vqrshl.s8" } } */ +/* +**foo1: +** ... +** vqrshl.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int8x16_t b) { return vqrshlq (a, b); } -/* { dg-final { scan-assembler "vqrshl.s8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_u16.c index 8de05a290b7f..2ea554253c16 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_u16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqrshl.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, int16x8_t b) { return vqrshlq_u16 (a, b); } -/* { dg-final { scan-assembler "vqrshl.u16" } } */ +/* +**foo1: +** ... +** vqrshl.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, int16x8_t b) { return vqrshlq (a, b); } -/* { dg-final { scan-assembler "vqrshl.u16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_u32.c index 0ceee291bab8..fef01d926b87 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_u32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqrshl.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t a, int32x4_t b) { return vqrshlq_u32 (a, b); } -/* { dg-final { scan-assembler "vqrshl.u32" } } */ +/* +**foo1: +** ... +** vqrshl.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t a, int32x4_t b) { return vqrshlq (a, b); } -/* { dg-final { scan-assembler "vqrshl.u32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_u8.c index 7779871c0971..6ceafa0f473b 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshlq_u8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqrshl.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, int8x16_t b) { return vqrshlq_u8 (a, b); } -/* { dg-final { scan-assembler "vqrshl.u8" } } */ +/* +**foo1: +** ... +** vqrshl.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, int8x16_t b) { return vqrshlq (a, b); } -/* { dg-final { scan-assembler "vqrshl.u8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_s16.c index 16a4827e50d8..76c38e07faa8 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_s16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqrshrnbt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int16x8_t b, mve_pred16_t p) { return vqrshrnbq_m_n_s16 (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqrshrnbt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqrshrnbt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p) { return vqrshrnbq_m (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqrshrnbt.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_s32.c index bb054bcf5a15..3af0ad964931 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_s32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqrshrnbt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int32x4_t b, mve_pred16_t p) { return vqrshrnbq_m_n_s32 (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqrshrnbt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqrshrnbt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p) { return vqrshrnbq_m (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqrshrnbt.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_u16.c index 45119720ed5f..f81dd96efdec 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_u16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqrshrnbt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p) { return vqrshrnbq_m_n_u16 (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqrshrnbt.u16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqrshrnbt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p) { return vqrshrnbq_m (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqrshrnbt.u16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_u32.c index a3a7a7eac3e6..ad52c378a075 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_m_n_u32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqrshrnbt.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p) { return vqrshrnbq_m_n_u32 (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqrshrnbt.u32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqrshrnbt.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p) { return vqrshrnbq_m (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqrshrnbt.u32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_s16.c index d1b2ea58dd5f..3f82f86029e2 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqrshrnb.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int16x8_t b) { return vqrshrnbq_n_s16 (a, b, 1); } -/* { dg-final { scan-assembler "vqrshrnb.s16" } } */ +/* +**foo1: +** ... +** vqrshrnb.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int16x8_t b) { return vqrshrnbq (a, b, 1); } -/* { dg-final { scan-assembler "vqrshrnb.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_s32.c index da5db1b89518..02f303052a3b 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqrshrnb.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int32x4_t b) { return vqrshrnbq_n_s32 (a, b, 1); } -/* { dg-final { scan-assembler "vqrshrnb.s32" } } */ +/* +**foo1: +** ... +** vqrshrnb.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int32x4_t b) { return vqrshrnbq (a, b, 1); } -/* { dg-final { scan-assembler "vqrshrnb.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_u16.c index 360999e37853..cda56ce3c486 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_u16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqrshrnb.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, uint16x8_t b) { return vqrshrnbq_n_u16 (a, b, 1); } -/* { dg-final { scan-assembler "vqrshrnb.u16" } } */ +/* +**foo1: +** ... +** vqrshrnb.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, uint16x8_t b) { return vqrshrnbq (a, b, 1); } -/* { dg-final { scan-assembler "vqrshrnb.u16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_u32.c index f276f24a1dd9..5202e6249a49 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrnbq_n_u32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqrshrnb.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, uint32x4_t b) { return vqrshrnbq_n_u32 (a, b, 1); } -/* { dg-final { scan-assembler "vqrshrnb.u32" } } */ +/* +**foo1: +** ... +** vqrshrnb.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, uint32x4_t b) { return vqrshrnbq (a, b, 1); } -/* { dg-final { scan-assembler "vqrshrnb.u32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_s16.c index fb21072bfa0a..39c0eff56f6d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_s16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqrshrntt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int16x8_t b, mve_pred16_t p) { return vqrshrntq_m_n_s16 (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqrshrntt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqrshrntt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p) { return vqrshrntq_m (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqrshrntt.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_s32.c index 77c4cb7e0b0f..5fb6983237c0 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_s32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqrshrntt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int32x4_t b, mve_pred16_t p) { return vqrshrntq_m_n_s32 (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqrshrntt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqrshrntt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p) { return vqrshrntq_m (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqrshrntt.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_u16.c index 1749f4866a49..91ec57955664 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_u16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqrshrntt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p) { return vqrshrntq_m_n_u16 (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqrshrntt.u16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqrshrntt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p) { return vqrshrntq_m (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqrshrntt.u16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_u32.c index e243319e2561..986437e49caf 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_m_n_u32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqrshrntt.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p) { return vqrshrntq_m_n_u32 (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqrshrntt.u32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqrshrntt.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p) { return vqrshrntq_m (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqrshrntt.u32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_s16.c index c7cdc394c35b..5dfed5dcbaa2 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqrshrnt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int16x8_t b) { return vqrshrntq_n_s16 (a, b, 1); } -/* { dg-final { scan-assembler "vqrshrnt.s16" } } */ +/* +**foo1: +** ... +** vqrshrnt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int16x8_t b) { return vqrshrntq (a, b, 1); } -/* { dg-final { scan-assembler "vqrshrnt.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_s32.c index 68dfccccc66d..7df829623427 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqrshrnt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int32x4_t b) { return vqrshrntq_n_s32 (a, b, 1); } -/* { dg-final { scan-assembler "vqrshrnt.s32" } } */ +/* +**foo1: +** ... +** vqrshrnt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int32x4_t b) { return vqrshrntq (a, b, 1); } -/* { dg-final { scan-assembler "vqrshrnt.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_u16.c index bc0572a454bd..e76d98ee3f4b 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_u16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqrshrnt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, uint16x8_t b) { return vqrshrntq_n_u16 (a, b, 1); } -/* { dg-final { scan-assembler "vqrshrnt.u16" } } */ +/* +**foo1: +** ... +** vqrshrnt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, uint16x8_t b) { return vqrshrntq (a, b, 1); } -/* { dg-final { scan-assembler "vqrshrnt.u16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_u32.c index 20bfdbf515af..bc0e39baeaee 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrntq_n_u32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqrshrnt.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, uint32x4_t b) { return vqrshrntq_n_u32 (a, b, 1); } -/* { dg-final { scan-assembler "vqrshrnt.u32" } } */ +/* +**foo1: +** ... +** vqrshrnt.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, uint32x4_t b) { return vqrshrntq (a, b, 1); } -/* { dg-final { scan-assembler "vqrshrnt.u32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_m_n_s16.c index ea12f346b0e6..299dd80a8871 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_m_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_m_n_s16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqrshrunbt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, int16x8_t b, mve_pred16_t p) { return vqrshrunbq_m_n_s16 (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqrshrunbt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqrshrunbt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, int16x8_t b, mve_pred16_t p) { return vqrshrunbq_m (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqrshrunbt.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_m_n_s32.c index d127e5381bfe..5c87efe4be92 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_m_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_m_n_s32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqrshrunbt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, int32x4_t b, mve_pred16_t p) { return vqrshrunbq_m_n_s32 (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqrshrunbt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqrshrunbt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, int32x4_t b, mve_pred16_t p) { return vqrshrunbq_m (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqrshrunbt.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_n_s16.c index 88cb39970d49..3bbf72d4def2 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_n_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqrshrunb.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, int16x8_t b) { return vqrshrunbq_n_s16 (a, b, 1); } -/* { dg-final { scan-assembler "vqrshrunb.s16" } } */ +/* +**foo1: +** ... +** vqrshrunb.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, int16x8_t b) { return vqrshrunbq (a, b, 1); } -/* { dg-final { scan-assembler "vqrshrunb.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_n_s32.c index 46f96127b1be..4dfd8f60e72b 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshrunbq_n_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqrshrunb.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, int32x4_t b) { return vqrshrunbq_n_s32 (a, b, 1); } -/* { dg-final { scan-assembler "vqrshrunb.s32" } } */ +/* +**foo1: +** ... +** vqrshrunb.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, int32x4_t b) { return vqrshrunbq (a, b, 1); } -/* { dg-final { scan-assembler "vqrshrunb.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_m_n_s16.c index 5ff25eb2d320..48c17e5e5b6a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_m_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_m_n_s16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqrshruntt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, int16x8_t b, mve_pred16_t p) { return vqrshruntq_m_n_s16 (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqrshruntt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqrshruntt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, int16x8_t b, mve_pred16_t p) { return vqrshruntq_m (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqrshruntt.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_m_n_s32.c index 4876414e308c..46912882ff12 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_m_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_m_n_s32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqrshruntt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, int32x4_t b, mve_pred16_t p) { return vqrshruntq_m_n_s32 (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqrshruntt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqrshruntt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, int32x4_t b, mve_pred16_t p) { return vqrshruntq_m (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqrshruntt.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_n_s16.c index 0f6258b35249..9dc8d3b8f5a6 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_n_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqrshrunt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, int16x8_t b) { return vqrshruntq_n_s16 (a, b, 1); } -/* { dg-final { scan-assembler "vqrshrunt.s16" } } */ +/* +**foo1: +** ... +** vqrshrunt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, int16x8_t b) { return vqrshruntq (a, b, 1); } -/* { dg-final { scan-assembler "vqrshrunt.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_n_s32.c index d307f38ec6ca..8071367fa2f6 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrshruntq_n_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqrshrunt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, int32x4_t b) { return vqrshruntq_n_s32 (a, b, 1); } -/* { dg-final { scan-assembler "vqrshrunt.s32" } } */ +/* +**foo1: +** ... +** vqrshrunt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, int32x4_t b) { return vqrshruntq (a, b, 1); } -/* { dg-final { scan-assembler "vqrshrunt.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_s16.c index a33856f17a57..6eb7443d45e3 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_s16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshlt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p) { return vqshlq_m_n_s16 (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqshlt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshlt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p) { return vqshlq_m_n (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqshlt.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_s32.c index bcfe4fc2874a..d10829c90c84 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_s32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshlt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p) { return vqshlq_m_n_s32 (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqshlt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshlt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p) { return vqshlq_m_n (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqshlt.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_s8.c index fba2f0fe8590..49886009d741 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_s8.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshlt.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p) { return vqshlq_m_n_s8 (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqshlt.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshlt.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p) { return vqshlq_m_n (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqshlt.s8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_u16.c index 1383f6a9ab43..7eb330e6c180 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_u16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshlt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p) { return vqshlq_m_n_u16 (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqshlt.u16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshlt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p) { return vqshlq_m_n (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqshlt.u16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_u32.c index 7cff29f5a28b..86ecdc6d5632 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_u32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshlt.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p) { return vqshlq_m_n_u32 (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqshlt.u32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshlt.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p) { return vqshlq_m_n (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqshlt.u32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_u8.c index cbadcbeb77ec..f3886e7bae61 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_n_u8.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshlt.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p) { return vqshlq_m_n_u8 (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqshlt.u8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshlt.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p) { return vqshlq_m_n (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqshlt.u8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_s16.c index a3057fec3437..e89298c570b0 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_s16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshlt.s16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int32_t b, mve_pred16_t p) { return vqshlq_m_r_s16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqshlt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshlt.s16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int32_t b, mve_pred16_t p) { return vqshlq_m_r (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_s32.c index 6973b49a476b..35e2552728a8 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_s32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshlt.s32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a, int32_t b, mve_pred16_t p) { return vqshlq_m_r_s32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqshlt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshlt.s32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a, int32_t b, mve_pred16_t p) { return vqshlq_m_r (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_s8.c index 282d4b45c599..366b45699a99 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_s8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshlt.s8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int32_t b, mve_pred16_t p) { return vqshlq_m_r_s8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqshlt.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshlt.s8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int32_t b, mve_pred16_t p) { return vqshlq_m_r (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_u16.c index 111d7fa23d90..86774962f0f2 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_u16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshlt.u16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, int32_t b, mve_pred16_t p) { return vqshlq_m_r_u16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqshlt.u16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshlt.u16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, int32_t b, mve_pred16_t p) { return vqshlq_m_r (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_u32.c index 96de168dd238..92a61fe4a2ea 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_u32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshlt.u32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t a, int32_t b, mve_pred16_t p) { return vqshlq_m_r_u32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqshlt.u32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshlt.u32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t a, int32_t b, mve_pred16_t p) { return vqshlq_m_r (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_u8.c index 24e388824cc7..bace3656143f 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_r_u8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshlt.u8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, int32_t b, mve_pred16_t p) { return vqshlq_m_r_u8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqshlt.u8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshlt.u8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, int32_t b, mve_pred16_t p) { return vqshlq_m_r (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_s16.c index ebae8beecb46..2df2ee5c8365 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_s16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshlt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) { return vqshlq_m_s16 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqshlt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshlt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) { return vqshlq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqshlt.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_s32.c index 80e4d860fb96..e0b2de339f24 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_s32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshlt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) { return vqshlq_m_s32 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqshlt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshlt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) { return vqshlq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqshlt.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_s8.c index e8f881130033..b65df1998feb 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_s8.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshlt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) { return vqshlq_m_s8 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqshlt.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshlt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) { return vqshlq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqshlt.s8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_u16.c index 692ff54981d7..bced90d13b9d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_u16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshlt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t inactive, uint16x8_t a, int16x8_t b, mve_pred16_t p) { return vqshlq_m_u16 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqshlt.u16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshlt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t inactive, uint16x8_t a, int16x8_t b, mve_pred16_t p) { return vqshlq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqshlt.u16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_u32.c index 1ece80681a73..409ef8524cbf 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_u32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshlt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t inactive, uint32x4_t a, int32x4_t b, mve_pred16_t p) { return vqshlq_m_u32 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqshlt.u32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshlt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t inactive, uint32x4_t a, int32x4_t b, mve_pred16_t p) { return vqshlq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqshlt.u32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_u8.c index 7302669fe260..ce9a426ccc97 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_m_u8.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshlt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t inactive, uint8x16_t a, int8x16_t b, mve_pred16_t p) { return vqshlq_m_u8 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqshlt.u8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshlt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t inactive, uint8x16_t a, int8x16_t b, mve_pred16_t p) { return vqshlq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqshlt.u8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_s16.c index b827993198d5..859da655409d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqshl.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a) { return vqshlq_n_s16 (a, 1); } -/* { dg-final { scan-assembler "vqshl.s16" } } */ +/* +**foo1: +** ... +** vqshl.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a) { return vqshlq_n (a, 1); } -/* { dg-final { scan-assembler "vqshl.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_s32.c index dbc22df551e4..1d61e8808908 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqshl.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a) { return vqshlq_n_s32 (a, 1); } -/* { dg-final { scan-assembler "vqshl.s32" } } */ +/* +**foo1: +** ... +** vqshl.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a) { return vqshlq_n (a, 1); } -/* { dg-final { scan-assembler "vqshl.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_s8.c index e4e1d193c55c..737c1bd3764b 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_s8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqshl.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a) { return vqshlq_n_s8 (a, 1); } -/* { dg-final { scan-assembler "vqshl.s8" } } */ +/* +**foo1: +** ... +** vqshl.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a) { return vqshlq_n (a, 1); } -/* { dg-final { scan-assembler "vqshl.s8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_u16.c index 8227890fc4b5..9ddb83e42875 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_u16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqshl.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a) { return vqshlq_n_u16 (a, 1); } -/* { dg-final { scan-assembler "vqshl.u16" } } */ +/* +**foo1: +** ... +** vqshl.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a) { return vqshlq_n (a, 1); } -/* { dg-final { scan-assembler "vqshl.u16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_u32.c index b91dc3b91d3e..642060f2225e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_u32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqshl.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t a) { return vqshlq_n_u32 (a, 1); } -/* { dg-final { scan-assembler "vqshl.u32" } } */ +/* +**foo1: +** ... +** vqshl.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t a) { return vqshlq_n (a, 1); } -/* { dg-final { scan-assembler "vqshl.u32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_u8.c index ab4903ae4073..bd8b93410072 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_n_u8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqshl.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a) { return vqshlq_n_u8 (a, 1); } -/* { dg-final { scan-assembler "vqshl.u8" } } */ +/* +**foo1: +** ... +** vqshl.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a) { return vqshlq_n (a, 1); } -/* { dg-final { scan-assembler "vqshl.u8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_s16.c index 4413d447b710..285f398b35a7 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqshl.s16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int32_t b) { return vqshlq_r_s16 (a, b); } -/* { dg-final { scan-assembler "vqshl.s16" } } */ +/* +**foo1: +** ... +** vqshl.s16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int32_t b) { return vqshlq_r (a, b); } -/* { dg-final { scan-assembler "vqshl.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_s32.c index 6df14afb48dd..af594003c066 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqshl.s32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a, int32_t b) { return vqshlq_r_s32 (a, b); } -/* { dg-final { scan-assembler "vqshl.s32" } } */ +/* +**foo1: +** ... +** vqshl.s32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a, int32_t b) { return vqshlq_r (a, b); } -/* { dg-final { scan-assembler "vqshl.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_s8.c index c1b93793c8fc..ef39f0c39247 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_s8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqshl.s8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int32_t b) { return vqshlq_r_s8 (a, b); } -/* { dg-final { scan-assembler "vqshl.s8" } } */ +/* +**foo1: +** ... +** vqshl.s8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int32_t b) { return vqshlq_r (a, b); } -/* { dg-final { scan-assembler "vqshl.s8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_u16.c index 20fa0263de4b..e6cc0007a2bb 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_u16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqshl.u16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, int32_t b) { return vqshlq_r_u16 (a, b); } -/* { dg-final { scan-assembler "vqshl.u16" } } */ +/* +**foo1: +** ... +** vqshl.u16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, int32_t b) { return vqshlq_r (a, b); } -/* { dg-final { scan-assembler "vqshl.u16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_u32.c index 7d56784b3d55..b30ecdf40523 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_u32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqshl.u32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t a, int32_t b) { return vqshlq_r_u32 (a, b); } -/* { dg-final { scan-assembler "vqshl.u32" } } */ +/* +**foo1: +** ... +** vqshl.u32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t a, int32_t b) { return vqshlq_r (a, b); } -/* { dg-final { scan-assembler "vqshl.u32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_u8.c index 199249bf6041..69b0a8d0b90f 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_r_u8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqshl.u8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, int32_t b) { return vqshlq_r_u8 (a, b); } -/* { dg-final { scan-assembler "vqshl.u8" } } */ +/* +**foo1: +** ... +** vqshl.u8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, int32_t b) { return vqshlq_r (a, b); } -/* { dg-final { scan-assembler "vqshl.u8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_s16.c index 2b01d3e3d31e..e7877019200d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqshl.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int16x8_t b) { return vqshlq_s16 (a, b); } -/* { dg-final { scan-assembler "vqshl.s16" } } */ +/* +**foo1: +** ... +** vqshl.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int16x8_t b) { return vqshlq (a, b); } -/* { dg-final { scan-assembler "vqshl.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_s32.c index b9b66223ae9b..a7787cabb623 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqshl.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a, int32x4_t b) { return vqshlq_s32 (a, b); } -/* { dg-final { scan-assembler "vqshl.s32" } } */ +/* +**foo1: +** ... +** vqshl.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a, int32x4_t b) { return vqshlq (a, b); } -/* { dg-final { scan-assembler "vqshl.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_s8.c index 8096205cf285..73af1790b479 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_s8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqshl.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int8x16_t b) { return vqshlq_s8 (a, b); } -/* { dg-final { scan-assembler "vqshl.s8" } } */ +/* +**foo1: +** ... +** vqshl.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int8x16_t b) { return vqshlq (a, b); } -/* { dg-final { scan-assembler "vqshl.s8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_u16.c index 61b6c18bd8ac..26119eff397b 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_u16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqshl.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, int16x8_t b) { return vqshlq_u16 (a, b); } -/* { dg-final { scan-assembler "vqshl.u16" } } */ +/* +**foo1: +** ... +** vqshl.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, int16x8_t b) { return vqshlq (a, b); } -/* { dg-final { scan-assembler "vqshl.u16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_u32.c index 06b50442d303..01b66d5dfbca 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_u32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqshl.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t a, int32x4_t b) { return vqshlq_u32 (a, b); } -/* { dg-final { scan-assembler "vqshl.u32" } } */ +/* +**foo1: +** ... +** vqshl.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t a, int32x4_t b) { return vqshlq (a, b); } -/* { dg-final { scan-assembler "vqshl.u32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_u8.c index 0cc6a1dac4b0..d4727de5de95 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshlq_u8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqshl.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, int8x16_t b) { return vqshlq_u8 (a, b); } -/* { dg-final { scan-assembler "vqshl.u8" } } */ +/* +**foo1: +** ... +** vqshl.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, int8x16_t b) { return vqshlq (a, b); } -/* { dg-final { scan-assembler "vqshl.u8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_m_n_s16.c index 885874d13fb0..ada03b165c53 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_m_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_m_n_s16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshlut.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t inactive, int16x8_t a, mve_pred16_t p) { - return vqshluq_m_n_s16 (inactive, a, 7, p); + return vqshluq_m_n_s16 (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqshlut.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshlut.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t inactive, int16x8_t a, mve_pred16_t p) { - return vqshluq_m (inactive, a, 7, p); + return vqshluq_m (inactive, a, 1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_m_n_s32.c index bb2a32947278..6ae38f1ca843 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_m_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_m_n_s32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshlut.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t inactive, int32x4_t a, mve_pred16_t p) { - return vqshluq_m_n_s32 (inactive, a, 7, p); + return vqshluq_m_n_s32 (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqshlut.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshlut.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t inactive, int32x4_t a, mve_pred16_t p) { - return vqshluq_m (inactive, a, 7, p); + return vqshluq_m (inactive, a, 1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_m_n_s8.c index 7f9a42f8027a..8d536a7b0f7f 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_m_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_m_n_s8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshlut.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t inactive, int8x16_t a, mve_pred16_t p) { - return vqshluq_m_n_s8 (inactive, a, 7, p); + return vqshluq_m_n_s8 (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqshlut.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshlut.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t inactive, int8x16_t a, mve_pred16_t p) { - return vqshluq_m (inactive, a, 7, p); + return vqshluq_m (inactive, a, 1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_n_s16.c index 481a4465834f..33ba80cbf978 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_n_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqshlu.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (int16x8_t a) { - return vqshluq_n_s16 (a, 7); + return vqshluq_n_s16 (a, 1); } -/* { dg-final { scan-assembler "vqshlu.s16" } } */ +/* +**foo1: +** ... +** vqshlu.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (int16x8_t a) { - return vqshluq (a, 7); + return vqshluq (a, 1); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vqshlu.s16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_n_s32.c index 682989638249..0d5a35f1ed38 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_n_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqshlu.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (int32x4_t a) { - return vqshluq_n_s32 (a, 7); + return vqshluq_n_s32 (a, 1); } -/* { dg-final { scan-assembler "vqshlu.s32" } } */ +/* +**foo1: +** ... +** vqshlu.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (int32x4_t a) { - return vqshluq (a, 7); + return vqshluq (a, 1); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vqshlu.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_n_s8.c index 5d52c3406674..1e2d9e044b97 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshluq_n_s8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqshlu.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (int8x16_t a) { - return vqshluq_n_s8 (a, 7); + return vqshluq_n_s8 (a, 1); } -/* { dg-final { scan-assembler "vqshlu.s8" } } */ +/* +**foo1: +** ... +** vqshlu.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (int8x16_t a) { - return vqshluq (a, 7); + return vqshluq (a, 1); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vqshlu.s8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_s16.c index 9ea58e95d37b..0266640a3ff6 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_s16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshrnbt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int16x8_t b, mve_pred16_t p) { - return vqshrnbq_m_n_s16 (a, b, 7, p); + return vqshrnbq_m_n_s16 (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqshrnbt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshrnbt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p) { - return vqshrnbq_m (a, b, 7, p); + return vqshrnbq_m (a, b, 1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqshrnbt.s16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_s32.c index b44f41b36996..59be6de392bd 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_s32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshrnbt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int32x4_t b, mve_pred16_t p) { - return vqshrnbq_m_n_s32 (a, b, 11, p); + return vqshrnbq_m_n_s32 (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqshrnbt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshrnbt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p) { - return vqshrnbq_m (a, b, 11, p); + return vqshrnbq_m (a, b, 1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqshrnbt.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_u16.c index f761d14ecec5..f227a285ea9f 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_u16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshrnbt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p) { return vqshrnbq_m_n_u16 (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqshrnbt.u16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshrnbt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p) { return vqshrnbq_m (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqshrnbt.u16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_u32.c index 3073a5b223c1..9711c2f9019e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_m_n_u32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshrnbt.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p) { return vqshrnbq_m_n_u32 (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqshrnbt.u32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshrnbt.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p) { return vqshrnbq_m (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqshrnbt.u32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_s16.c index 24133b576607..e7e9f974bd43 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqshrnb.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int16x8_t b) { return vqshrnbq_n_s16 (a, b, 1); } -/* { dg-final { scan-assembler "vqshrnb.s16" } } */ +/* +**foo1: +** ... +** vqshrnb.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int16x8_t b) { return vqshrnbq (a, b, 1); } -/* { dg-final { scan-assembler "vqshrnb.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_s32.c index 34c11e156c3d..b5e2b8af5771 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqshrnb.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int32x4_t b) { - return vqshrnbq_n_s32 (a, b, 2); + return vqshrnbq_n_s32 (a, b, 1); } -/* { dg-final { scan-assembler "vqshrnb.s32" } } */ +/* +**foo1: +** ... +** vqshrnb.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int32x4_t b) { - return vqshrnbq (a, b, 2); + return vqshrnbq (a, b, 1); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vqshrnb.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_u16.c index 23a7596e0abe..708cf3e8d742 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_u16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqshrnb.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, uint16x8_t b) { return vqshrnbq_n_u16 (a, b, 1); } -/* { dg-final { scan-assembler "vqshrnb.u16" } } */ +/* +**foo1: +** ... +** vqshrnb.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, uint16x8_t b) { return vqshrnbq (a, b, 1); } -/* { dg-final { scan-assembler "vqshrnb.u16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_u32.c index 4cb7ceaf66b5..07fbbaada67b 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrnbq_n_u32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqshrnb.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, uint32x4_t b) { - return vqshrnbq_n_u32 (a, b, 15); + return vqshrnbq_n_u32 (a, b, 1); } -/* { dg-final { scan-assembler "vqshrnb.u32" } } */ +/* +**foo1: +** ... +** vqshrnb.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, uint32x4_t b) { - return vqshrnbq (a, b, 15); + return vqshrnbq (a, b, 1); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vqshrnb.u32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_s16.c index d2ff2d359e0e..c25619df0487 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_s16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshrntt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int16x8_t b, mve_pred16_t p) { return vqshrntq_m_n_s16 (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqshrntt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshrntt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p) { return vqshrntq_m (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqshrntt.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_s32.c index 50dde4047d46..1b1d435e2828 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_s32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshrntt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int32x4_t b, mve_pred16_t p) { return vqshrntq_m_n_s32 (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqshrntt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshrntt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p) { return vqshrntq_m (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqshrntt.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_u16.c index 07949569581f..f151a277cd1a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_u16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshrntt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p) { return vqshrntq_m_n_u16 (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqshrntt.u16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshrntt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p) { return vqshrntq_m (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqshrntt.u16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_u32.c index 17f0205c8808..c336001c945c 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_m_n_u32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshrntt.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p) { return vqshrntq_m_n_u32 (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqshrntt.u32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshrntt.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p) { return vqshrntq_m (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqshrntt.u32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_s16.c index 9e8d5e886193..15b010d2c84e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqshrnt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int16x8_t b) { return vqshrntq_n_s16 (a, b, 1); } -/* { dg-final { scan-assembler "vqshrnt.s16" } } */ +/* +**foo1: +** ... +** vqshrnt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int16x8_t b) { return vqshrntq (a, b, 1); } -/* { dg-final { scan-assembler "vqshrnt.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_s32.c index 0661cefa7830..974e4a060ce1 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqshrnt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int32x4_t b) { return vqshrntq_n_s32 (a, b, 1); } -/* { dg-final { scan-assembler "vqshrnt.s32" } } */ +/* +**foo1: +** ... +** vqshrnt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int32x4_t b) { return vqshrntq (a, b, 1); } -/* { dg-final { scan-assembler "vqshrnt.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_u16.c index cda261425595..3172a330f6b2 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_u16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqshrnt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, uint16x8_t b) { return vqshrntq_n_u16 (a, b, 1); } -/* { dg-final { scan-assembler "vqshrnt.u16" } } */ +/* +**foo1: +** ... +** vqshrnt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, uint16x8_t b) { return vqshrntq (a, b, 1); } -/* { dg-final { scan-assembler "vqshrnt.u16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_u32.c index f242353f6b48..e9e31d63e982 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrntq_n_u32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqshrnt.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, uint32x4_t b) { return vqshrntq_n_u32 (a, b, 1); } -/* { dg-final { scan-assembler "vqshrnt.u32" } } */ +/* +**foo1: +** ... +** vqshrnt.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, uint32x4_t b) { return vqshrntq (a, b, 1); } -/* { dg-final { scan-assembler "vqshrnt.u32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_m_n_s16.c index 73c480646e70..b7fe0e51e823 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_m_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_m_n_s16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshrunbt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, int16x8_t b, mve_pred16_t p) { return vqshrunbq_m_n_s16 (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqshrunbt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshrunbt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, int16x8_t b, mve_pred16_t p) { return vqshrunbq_m (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqshrunbt.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_m_n_s32.c index f8887b1cecb5..fb78dd44c5d4 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_m_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_m_n_s32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshrunbt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, int32x4_t b, mve_pred16_t p) { return vqshrunbq_m_n_s32 (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqshrunbt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshrunbt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, int32x4_t b, mve_pred16_t p) { return vqshrunbq_m (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqshrunbt.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_n_s16.c index 2c64d7d08733..3c286e77a408 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_n_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqshrunb.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, int16x8_t b) { return vqshrunbq_n_s16 (a, b, 1); } -/* { dg-final { scan-assembler "vqshrunb.s16" } } */ +/* +**foo1: +** ... +** vqshrunb.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, int16x8_t b) { return vqshrunbq (a, b, 1); } -/* { dg-final { scan-assembler "vqshrunb.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_n_s32.c index 17cb0aa5da15..e22fb2b2b361 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshrunbq_n_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqshrunb.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, int32x4_t b) { return vqshrunbq_n_s32 (a, b, 1); } -/* { dg-final { scan-assembler "vqshrunb.s32" } } */ +/* +**foo1: +** ... +** vqshrunb.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, int32x4_t b) { return vqshrunbq (a, b, 1); } -/* { dg-final { scan-assembler "vqshrunb.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_m_n_s16.c index 4b9758df7ec0..22ca346d98b6 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_m_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_m_n_s16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshruntt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, int16x8_t b, mve_pred16_t p) { return vqshruntq_m_n_s16 (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqshruntt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshruntt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, int16x8_t b, mve_pred16_t p) { return vqshruntq_m (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqshruntt.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_m_n_s32.c index 18b9f117fb2f..2f6adf26e5e4 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_m_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_m_n_s32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshruntt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, int32x4_t b, mve_pred16_t p) { return vqshruntq_m_n_s32 (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqshruntt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vqshruntt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, int32x4_t b, mve_pred16_t p) { return vqshruntq_m (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vqshruntt.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_n_s16.c index f6247751c44c..96a377e13b9e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_n_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqshrunt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, int16x8_t b) { return vqshruntq_n_s16 (a, b, 1); } -/* { dg-final { scan-assembler "vqshrunt.s16" } } */ +/* +**foo1: +** ... +** vqshrunt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, int16x8_t b) { return vqshruntq (a, b, 1); } -/* { dg-final { scan-assembler "vqshrunt.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_n_s32.c index 076fd29c69fe..2e2eb93a0d69 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqshruntq_n_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vqshrunt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, int32x4_t b) { return vqshruntq_n_s32 (a, b, 1); } -/* { dg-final { scan-assembler "vqshrunt.s32" } } */ +/* +**foo1: +** ... +** vqshrunt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, int32x4_t b) { return vqshruntq (a, b, 1); } -/* { dg-final { scan-assembler "vqshrunt.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s16.c index a64b6649938c..f69649b58aff 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s16.c @@ -46,4 +46,4 @@ foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s32.c index 350629cf2349..a7843d07933e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s32.c @@ -46,4 +46,4 @@ foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s8.c index e5fa4c486bb7..f1fb5ad2a051 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_s8.c @@ -46,4 +46,4 @@ foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u16.c index 734ac2da8f7b..7e7d2c07267a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u16.c @@ -62,4 +62,4 @@ foo2 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u32.c index f54aec8dd000..13e54be06c11 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u32.c @@ -62,4 +62,4 @@ foo2 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u8.c index c96a8398bad3..ae6baaba661e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_n_u8.c @@ -62,4 +62,4 @@ foo2 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s16.c index bd6a05e858d2..fd52022fc26f 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s16.c @@ -46,4 +46,4 @@ foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s32.c index baa9e9f192c4..4225ec29c061 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s32.c @@ -46,4 +46,4 @@ foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s8.c index 746001d0efa4..27496305ee89 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_s8.c @@ -46,4 +46,4 @@ foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u16.c index ed504fe3817d..d840e51d3508 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u16.c @@ -46,4 +46,4 @@ foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u32.c index 508b54ff41f1..242903f9dc8e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u32.c @@ -46,4 +46,4 @@ foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u8.c index 5cfb2c58940a..e5a6b7aa0e4c 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_m_u8.c @@ -46,4 +46,4 @@ foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s16.c index a4407cc802f2..7a286add7439 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s16.c @@ -38,4 +38,4 @@ foo1 (int16x8_t a, int16_t b) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s32.c index 80634f0a7977..2532b216a34a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s32.c @@ -38,4 +38,4 @@ foo1 (int32x4_t a, int32_t b) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s8.c index 172609a94e78..9e0a233baa03 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_s8.c @@ -38,4 +38,4 @@ foo1 (int8x16_t a, int8_t b) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u16.c index 0a95d0ab3ceb..20d3267e583f 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u16.c @@ -50,4 +50,4 @@ foo2 (uint16x8_t a) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u32.c index 9964ea66ee8d..4805e4cd969a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u32.c @@ -50,4 +50,4 @@ foo2 (uint32x4_t a) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u8.c index b28a93ffd002..db475615bbce 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_n_u8.c @@ -50,4 +50,4 @@ foo2 (uint8x16_t a) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s16.c index 1c5edd730ad0..76def1b340d7 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s16.c @@ -38,4 +38,4 @@ foo1 (int16x8_t a, int16x8_t b) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s32.c index a7b6c07fb4b1..989ad501659d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s32.c @@ -38,4 +38,4 @@ foo1 (int32x4_t a, int32x4_t b) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s8.c index 92676fdca4f4..4cf804b4c99e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_s8.c @@ -38,4 +38,4 @@ foo1 (int8x16_t a, int8x16_t b) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u16.c index 0b816c6b7650..4d937a35269f 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u16.c @@ -38,4 +38,4 @@ foo1 (uint16x8_t a, uint16x8_t b) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u32.c index 565508db8658..5ee2c2d9cc27 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u32.c @@ -38,4 +38,4 @@ foo1 (uint32x4_t a, uint32x4_t b) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u8.c index cca60ff72477..14cfb55644cc 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqsubq_u8.c @@ -38,4 +38,4 @@ foo1 (uint8x16_t a, uint8x16_t b) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_m_s8.c index 7b06f0b3644d..b366057dfde1 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_m_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_m_s8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrev16t.8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p) { return vrev16q_m_s8 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrev16t.8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrev16t.8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p) { return vrev16q_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_m_u8.c index 8cf374d97c1d..7baad3ba72f4 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_m_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_m_u8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrev16t.8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p) { return vrev16q_m_u8 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrev16t.8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrev16t.8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p) { return vrev16q_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_s8.c index 526884024371..23fcd61a4643 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_s8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vrev16.8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a) { return vrev16q_s8 (a); } -/* { dg-final { scan-assembler "vrev16.8" } } */ +/* +**foo1: +** ... +** vrev16.8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a) { return vrev16q (a); } -/* { dg-final { scan-assembler "vrev16.8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_u8.c index 56c05c523f34..e08b4b6cda21 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_u8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vrev16.8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a) { - return vrev16q_u8 (a); + return vrev16q_u8 (a); } -/* { dg-final { scan-assembler "vrev16.8" } } */ +/* +**foo1: +** ... +** vrev16.8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a) { - return vrev16q (a); + return vrev16q (a); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vrev16.8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_x_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_x_s8.c index 700a6774e2ed..6496bf899313 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_x_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_x_s8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrev16t.8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, mve_pred16_t p) { return vrev16q_x_s8 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrev16t.8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrev16t.8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, mve_pred16_t p) { return vrev16q_x (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_x_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_x_u8.c index 3b424061f0eb..e03f6f177ff2 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_x_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev16q_x_u8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrev16t.8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, mve_pred16_t p) { return vrev16q_x_u8 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrev16t.8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrev16t.8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, mve_pred16_t p) { return vrev16q_x (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_f16.c index 946fd8ddf5bc..6e4c56917608 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_f16.c @@ -1,13 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vrev32.16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t a) { return vrev32q_f16 (a); } -/* { dg-final { scan-assembler "vrev32.16" } } */ + +/* +**foo1: +** ... +** vrev32.16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ +float16x8_t +foo1 (float16x8_t a) +{ + return vrev32q (a); +} + +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_f16.c index 623b48a92c4e..3b25f0314c71 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_f16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrev32t.16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t inactive, float16x8_t a, mve_pred16_t p) { return vrev32q_m_f16 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrev32t.16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrev32t.16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t inactive, float16x8_t a, mve_pred16_t p) { return vrev32q_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_s16.c index 4040707d02c4..36f671924b36 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_s16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrev32t.16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p) { return vrev32q_m_s16 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrev32t.16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrev32t.16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p) { return vrev32q_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_s8.c index ad15e9d2bcaa..139605691381 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_s8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrev32t.8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p) { return vrev32q_m_s8 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrev32t.8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrev32t.8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p) { return vrev32q_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_u16.c index 8cd61e6bb1fb..7683397030b6 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_u16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrev32t.16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p) { return vrev32q_m_u16 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrev32t.16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrev32t.16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p) { return vrev32q_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_u8.c index 44600e2d1e73..72fc03bff2d7 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_m_u8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrev32t.8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p) { return vrev32q_m_u8 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrev32t.8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrev32t.8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p) { return vrev32q_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_s16.c index 503616e2a29d..cd02518fd9db 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_s16.c @@ -1,21 +1,41 @@ -/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ -/* { dg-add-options arm_v8_1m_mve_fp } */ +/* { dg-require-effective-target arm_v8_1m_mve_ok } */ +/* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vrev32.16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a) { return vrev32q_s16 (a); } -/* { dg-final { scan-assembler "vrev32.16" } } */ +/* +**foo1: +** ... +** vrev32.16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a) { return vrev32q (a); } -/* { dg-final { scan-assembler "vrev32.16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_s8.c index aa98f965713e..3a156b7014fc 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_s8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vrev32.8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a) { return vrev32q_s8 (a); } -/* { dg-final { scan-assembler "vrev32.8" } } */ +/* +**foo1: +** ... +** vrev32.8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a) { return vrev32q (a); } -/* { dg-final { scan-assembler "vrev32.8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_u16.c index 6a441ed0edb8..299f015bb046 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_u16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vrev32.16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a) { - return vrev32q_u16 (a); + return vrev32q_u16 (a); } -/* { dg-final { scan-assembler "vrev32.16" } } */ +/* +**foo1: +** ... +** vrev32.16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a) { - return vrev32q (a); + return vrev32q (a); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vrev32.16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_u8.c index 787f236411d9..fb65d0a38212 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_u8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vrev32.8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a) { - return vrev32q_u8 (a); + return vrev32q_u8 (a); } -/* { dg-final { scan-assembler "vrev32.8" } } */ +/* +**foo1: +** ... +** vrev32.8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a) { - return vrev32q (a); + return vrev32q (a); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vrev32.8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_f16.c index f7dc8fb14ece..d1c22aa72f4d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_f16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrev32t.16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t a, mve_pred16_t p) { return vrev32q_x_f16 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrev32t.16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrev32t.16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t a, mve_pred16_t p) { return vrev32q_x (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_s16.c index 81ec83dec4bd..0f0c19b14835 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_s16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrev32t.16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, mve_pred16_t p) { return vrev32q_x_s16 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrev32t.16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrev32t.16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, mve_pred16_t p) { return vrev32q_x (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_s8.c index 8d3bac1e82cc..2457dde2a58a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_s8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrev32t.8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, mve_pred16_t p) { return vrev32q_x_s8 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrev32t.8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrev32t.8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, mve_pred16_t p) { return vrev32q_x (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_u16.c index 36ba71752a86..b1b1237344ea 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_u16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrev32t.16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, mve_pred16_t p) { return vrev32q_x_u16 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrev32t.16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrev32t.16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, mve_pred16_t p) { return vrev32q_x (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_u8.c index 9d15c9df43c4..21d392745771 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev32q_x_u8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrev32t.8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, mve_pred16_t p) { return vrev32q_x_u8 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrev32t.8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrev32t.8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, mve_pred16_t p) { return vrev32q_x (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_f16.c index 7ec0962a95e2..a2dc89574675 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_f16.c @@ -1,13 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vrev64.16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t a) { return vrev64q_f16 (a); } -/* { dg-final { scan-assembler "vrev64.16" } } */ + +/* +**foo1: +** ... +** vrev64.16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ +float16x8_t +foo1 (float16x8_t a) +{ + return vrev64q (a); +} + +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_f32.c index 01c342496da5..78add56a4da2 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_f32.c @@ -1,13 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vrev64.32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t a) { return vrev64q_f32 (a); } -/* { dg-final { scan-assembler "vrev64.32" } } */ + +/* +**foo1: +** ... +** vrev64.32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ +float32x4_t +foo1 (float32x4_t a) +{ + return vrev64q (a); +} + +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_f16.c index ef47bab03146..0fb44077ec4b 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_f16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrev64t.16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t inactive, float16x8_t a, mve_pred16_t p) { return vrev64q_m_f16 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrev64t.16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrev64t.16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t inactive, float16x8_t a, mve_pred16_t p) { return vrev64q_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_f32.c index 6df0ba62effe..ff62ea7d0212 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_f32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrev64t.32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t inactive, float32x4_t a, mve_pred16_t p) { return vrev64q_m_f32 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrev64t.32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrev64t.32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t inactive, float32x4_t a, mve_pred16_t p) { return vrev64q_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s16.c index 9f9bbe0e666d..b30ce76c68fd 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrev64t.16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p) { return vrev64q_m_s16 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrev64t.16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrev64t.16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p) { return vrev64q_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s32.c index 132628b5a80c..b44d363a7126 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrev64t.32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p) { return vrev64q_m_s32 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrev64t.32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrev64t.32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p) { return vrev64q_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s8.c index eb6e560ac3ce..4804b8acaf3a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_s8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrev64t.8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p) { return vrev64q_m_s8 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrev64t.8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrev64t.8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p) { return vrev64q_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_u16.c index 4534a64ee84d..12c26144cd2f 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_u16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrev64t.16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p) { return vrev64q_m_u16 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrev64t.16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrev64t.16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p) { return vrev64q_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_u32.c index 3f1ab24527c7..ff90d92fff3f 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_u32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrev64t.32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p) { return vrev64q_m_u32 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrev64t.32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrev64t.32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p) { return vrev64q_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_u8.c index 4adb70963dd3..267c3b6bee2e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_m_u8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrev64t.8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p) { return vrev64q_m_u8 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrev64t.8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrev64t.8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p) { return vrev64q_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s16.c index a886b0b0c6a3..b6083f9d69c5 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vrev64.16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a) { return vrev64q_s16 (a); } -/* { dg-final { scan-assembler "vrev64.16" } } */ +/* +**foo1: +** ... +** vrev64.16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a) { return vrev64q (a); } -/* { dg-final { scan-assembler "vrev64.16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s32.c index b0ba64b186ba..81fc7d1bdd0d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vrev64.32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a) { return vrev64q_s32 (a); } -/* { dg-final { scan-assembler "vrev64.32" } } */ +/* +**foo1: +** ... +** vrev64.32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a) { return vrev64q (a); } -/* { dg-final { scan-assembler "vrev64.32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s8.c index 12f9f1ac3895..3fced7396812 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_s8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vrev64.8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a) { return vrev64q_s8 (a); } -/* { dg-final { scan-assembler "vrev64.8" } } */ +/* +**foo1: +** ... +** vrev64.8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a) { return vrev64q (a); } -/* { dg-final { scan-assembler "vrev64.8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_u16.c index ee3813428c9a..b25fccc6c2ae 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_u16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vrev64.16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a) { - return vrev64q_u16 (a); + return vrev64q_u16 (a); } -/* { dg-final { scan-assembler "vrev64.16" } } */ +/* +**foo1: +** ... +** vrev64.16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a) { - return vrev64q (a); + return vrev64q (a); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vrev64.16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_u32.c index c4a551dcc15f..9d203b1f6bf2 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_u32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vrev64.32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t a) { - return vrev64q_u32 (a); + return vrev64q_u32 (a); } -/* { dg-final { scan-assembler "vrev64.32" } } */ +/* +**foo1: +** ... +** vrev64.32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t a) { - return vrev64q (a); + return vrev64q (a); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vrev64.32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_u8.c index 578d538f019f..9acd52439e52 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_u8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vrev64.8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a) { - return vrev64q_u8 (a); + return vrev64q_u8 (a); } -/* { dg-final { scan-assembler "vrev64.8" } } */ +/* +**foo1: +** ... +** vrev64.8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a) { - return vrev64q (a); + return vrev64q (a); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vrev64.8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_f16.c index 467da7fe9efb..9c949028d8b6 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_f16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrev64t.16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t a, mve_pred16_t p) { return vrev64q_x_f16 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrev64t.16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrev64t.16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t a, mve_pred16_t p) { return vrev64q_x (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_f32.c index 1a3cd17ebd61..445834a55f8b 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_f32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrev64t.32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t a, mve_pred16_t p) { return vrev64q_x_f32 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrev64t.32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrev64t.32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t a, mve_pred16_t p) { return vrev64q_x (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_s16.c index b9932eddf388..66daa3d9131d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_s16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrev64t.16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, mve_pred16_t p) { return vrev64q_x_s16 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrev64t.16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrev64t.16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, mve_pred16_t p) { return vrev64q_x (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_s32.c index 4eb3d4d09b10..2c5a5ee1a0c7 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_s32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrev64t.32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a, mve_pred16_t p) { return vrev64q_x_s32 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrev64t.32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrev64t.32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a, mve_pred16_t p) { return vrev64q_x (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_s8.c index 5c22c3875865..a24f17d57973 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_s8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrev64t.8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, mve_pred16_t p) { return vrev64q_x_s8 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrev64t.8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrev64t.8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, mve_pred16_t p) { return vrev64q_x (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_u16.c index bbf42931d92a..4c11e79254b1 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_u16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrev64t.16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, mve_pred16_t p) { return vrev64q_x_u16 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrev64t.16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrev64t.16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, mve_pred16_t p) { return vrev64q_x (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_u32.c index 1b595c3ad2fe..14f676e0cffd 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_u32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrev64t.32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t a, mve_pred16_t p) { return vrev64q_x_u32 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrev64t.32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrev64t.32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t a, mve_pred16_t p) { return vrev64q_x (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_u8.c index abff81e40b99..542dcaa782cc 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrev64q_x_u8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrev64t.8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, mve_pred16_t p) { return vrev64q_x_u8 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrev64t.8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrev64t.8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, mve_pred16_t p) { return vrev64q_x (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_s16.c index 01d72efc34b3..0deef7943522 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_s16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrhaddt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) { return vrhaddq_m_s16 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrhaddt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrhaddt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) { return vrhaddq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrhaddt.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_s32.c index dfe8d7334a84..e584987fb3ec 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_s32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrhaddt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) { return vrhaddq_m_s32 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrhaddt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrhaddt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) { return vrhaddq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrhaddt.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_s8.c index 9eceda2b1154..40e3472bbf05 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_s8.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrhaddt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) { return vrhaddq_m_s8 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrhaddt.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrhaddt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) { return vrhaddq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrhaddt.s8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_u16.c index ec11b660a4ef..bd53871cc58a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_u16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrhaddt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vrhaddq_m_u16 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrhaddt.u16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrhaddt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vrhaddq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrhaddt.u16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_u32.c index 25c6208ec065..30037083a01c 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_u32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrhaddt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return vrhaddq_m_u32 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrhaddt.u32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrhaddt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return vrhaddq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrhaddt.u32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_u8.c index 7b25bf8faa8f..3208ac1589ba 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_m_u8.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrhaddt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vrhaddq_m_u8 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrhaddt.u8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrhaddt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vrhaddq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrhaddt.u8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_s16.c index 36f36f772335..bafb1dc57955 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vrhadd.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int16x8_t b) { return vrhaddq_s16 (a, b); } -/* { dg-final { scan-assembler "vrhadd.s16" } } */ +/* +**foo1: +** ... +** vrhadd.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int16x8_t b) { return vrhaddq (a, b); } -/* { dg-final { scan-assembler "vrhadd.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_s32.c index 813cf91649e1..bbee81fffd6d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vrhadd.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a, int32x4_t b) { return vrhaddq_s32 (a, b); } -/* { dg-final { scan-assembler "vrhadd.s32" } } */ +/* +**foo1: +** ... +** vrhadd.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a, int32x4_t b) { return vrhaddq (a, b); } -/* { dg-final { scan-assembler "vrhadd.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_s8.c index 5ce1109d676b..3fad58d4e0d5 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_s8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vrhadd.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int8x16_t b) { return vrhaddq_s8 (a, b); } -/* { dg-final { scan-assembler "vrhadd.s8" } } */ +/* +**foo1: +** ... +** vrhadd.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int8x16_t b) { return vrhaddq (a, b); } -/* { dg-final { scan-assembler "vrhadd.s8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_u16.c index 9d9bf18ec70f..91273571ec85 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_u16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vrhadd.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, uint16x8_t b) { return vrhaddq_u16 (a, b); } -/* { dg-final { scan-assembler "vrhadd.u16" } } */ +/* +**foo1: +** ... +** vrhadd.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, uint16x8_t b) { return vrhaddq (a, b); } -/* { dg-final { scan-assembler "vrhadd.u16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_u32.c index e465197505bb..79a21051b0bb 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_u32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vrhadd.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t a, uint32x4_t b) { return vrhaddq_u32 (a, b); } -/* { dg-final { scan-assembler "vrhadd.u32" } } */ +/* +**foo1: +** ... +** vrhadd.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t a, uint32x4_t b) { return vrhaddq (a, b); } -/* { dg-final { scan-assembler "vrhadd.u32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_u8.c index cbede385f204..4bdd23419a39 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_u8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vrhadd.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, uint8x16_t b) { return vrhaddq_u8 (a, b); } -/* { dg-final { scan-assembler "vrhadd.u8" } } */ +/* +**foo1: +** ... +** vrhadd.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, uint8x16_t b) { return vrhaddq (a, b); } -/* { dg-final { scan-assembler "vrhadd.u8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_s16.c index 8507b436dc84..363dedd3304b 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_s16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrhaddt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int16x8_t b, mve_pred16_t p) { return vrhaddq_x_s16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrhaddt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrhaddt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) { return vrhaddq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_s32.c index 756c52f8f1e9..f1df6749f332 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_s32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrhaddt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a, int32x4_t b, mve_pred16_t p) { return vrhaddq_x_s32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrhaddt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrhaddt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) { return vrhaddq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_s8.c index 9b5807820988..107cf2daa588 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_s8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrhaddt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int8x16_t b, mve_pred16_t p) { return vrhaddq_x_s8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrhaddt.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrhaddt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) { return vrhaddq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_u16.c index ec534c8262e4..5837437d33c7 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_u16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrhaddt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vrhaddq_x_u16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrhaddt.u16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrhaddt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vrhaddq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_u32.c index c79f406439e5..0d8d118987ef 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_u32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrhaddt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return vrhaddq_x_u32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrhaddt.u32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrhaddt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return vrhaddq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_u8.c index c4c16f8a7538..37711710ee84 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrhaddq_x_u8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrhaddt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vrhaddq_x_u8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrhaddt.u8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrhaddt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vrhaddq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_s32.c index 2134e3fc0dda..c18ff82f8f5f 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_s32.c @@ -46,4 +46,4 @@ foo1 (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_u32.c index 4ebd337e8ee5..ba0a9587e3f8 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_u32.c @@ -62,4 +62,4 @@ foo2 (uint32x4_t b, uint32x4_t c, mve_pred16_t p) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_s32.c index 2efde824eb33..b2ced4b41c7c 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_s32.c @@ -38,4 +38,4 @@ foo1 (int64_t a, int32x4_t b, int32x4_t c) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_u32.c index 745655f31d07..96f1ab72e928 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_u32.c @@ -50,4 +50,4 @@ foo2 (uint32x4_t b, uint32x4_t c) } #endif -/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaxq_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaxq_p_s32.c index 0e29e886ce13..a0164ed2bb7a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaxq_p_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaxq_p_s32.c @@ -1,21 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrmlaldavhaxt.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t foo (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p) { return vrmlaldavhaxq_p_s32 (a, b, c, p); } -/* { dg-final { scan-assembler "vrmlaldavhaxt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrmlaldavhaxt.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t foo1 (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p) { return vrmlaldavhaxq_p (a, b, c, p); } -/* { dg-final { scan-assembler "vrmlaldavhaxt.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaxq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaxq_s32.c index 063c94d8c5bc..4e71fd72e358 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaxq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaxq_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vrmlaldavhax.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t foo (int64_t a, int32x4_t b, int32x4_t c) { return vrmlaldavhaxq_s32 (a, b, c); } -/* { dg-final { scan-assembler "vrmlaldavhax.s32" } } */ +/* +**foo1: +** ... +** vrmlaldavhax.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t foo1 (int64_t a, int32x4_t b, int32x4_t c) { return vrmlaldavhaxq (a, b, c); } -/* { dg-final { scan-assembler "vrmlaldavhax.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_p_s32.c index 1d7a5e3d690f..b8f346f9740e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_p_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_p_s32.c @@ -1,21 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrmlaldavht.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t foo (int32x4_t a, int32x4_t b, mve_pred16_t p) { return vrmlaldavhq_p_s32 (a, b, p); } -/* { dg-final { scan-assembler "vrmlaldavht.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrmlaldavht.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) { return vrmlaldavhq_p (a, b, p); } -/* { dg-final { scan-assembler "vrmlaldavht.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_p_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_p_u32.c index 539b04254cd4..d6c6d503a9b1 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_p_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_p_u32.c @@ -1,21 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrmlaldavht.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint64_t foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return vrmlaldavhq_p_u32 (a, b, p); } -/* { dg-final { scan-assembler "vrmlaldavht.u32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrmlaldavht.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint64_t foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return vrmlaldavhq_p (a, b, p); } -/* { dg-final { scan-assembler "vrmlaldavht.u32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_s32.c index 566b85d17217..22c1164b6a9a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vrmlaldavh.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t foo (int32x4_t a, int32x4_t b) { return vrmlaldavhq_s32 (a, b); } -/* { dg-final { scan-assembler "vrmlaldavh.s32" } } */ +/* +**foo1: +** ... +** vrmlaldavh.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t foo1 (int32x4_t a, int32x4_t b) { return vrmlaldavhq (a, b); } -/* { dg-final { scan-assembler "vrmlaldavh.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_u32.c index 352cd58c8e86..6517ee8cd60a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhq_u32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vrmlaldavh.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint64_t foo (uint32x4_t a, uint32x4_t b) { return vrmlaldavhq_u32 (a, b); } -/* { dg-final { scan-assembler "vrmlaldavh.u32" } } */ +/* +**foo1: +** ... +** vrmlaldavh.u32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint64_t foo1 (uint32x4_t a, uint32x4_t b) { return vrmlaldavhq (a, b); } -/* { dg-final { scan-assembler "vrmlaldavh.u32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhxq_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhxq_p_s32.c index d99ebffbea07..ebe1012f53fd 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhxq_p_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhxq_p_s32.c @@ -1,21 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrmlaldavhxt.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t foo (int32x4_t a, int32x4_t b, mve_pred16_t p) { return vrmlaldavhxq_p_s32 (a, b, p); } -/* { dg-final { scan-assembler "vrmlaldavhxt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrmlaldavhxt.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) { return vrmlaldavhxq_p (a, b, p); } -/* { dg-final { scan-assembler "vrmlaldavhxt.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhxq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhxq_s32.c index 64f02971eb3c..56a2071d61cf 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhxq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhxq_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vrmlaldavhx.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t foo (int32x4_t a, int32x4_t b) { return vrmlaldavhxq_s32 (a, b); } -/* { dg-final { scan-assembler "vrmlaldavhx.s32" } } */ +/* +**foo1: +** ... +** vrmlaldavhx.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t foo1 (int32x4_t a, int32x4_t b) { return vrmlaldavhxq (a, b); } -/* { dg-final { scan-assembler "vrmlaldavhx.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaq_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaq_p_s32.c index 83d5a8ce251e..aad2f009ba32 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaq_p_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaq_p_s32.c @@ -1,21 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrmlsldavhat.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t foo (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p) { return vrmlsldavhaq_p_s32 (a, b, c, p); } -/* { dg-final { scan-assembler "vrmlsldavhat.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrmlsldavhat.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t foo1 (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p) { return vrmlsldavhaq_p (a, b, c, p); } -/* { dg-final { scan-assembler "vrmlsldavhat.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaq_s32.c index a8a320c6a434..f30870181b85 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaq_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vrmlsldavha.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t foo (int64_t a, int32x4_t b, int32x4_t c) { return vrmlsldavhaq_s32 (a, b, c); } -/* { dg-final { scan-assembler "vrmlsldavha.s32" } } */ +/* +**foo1: +** ... +** vrmlsldavha.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t foo1 (int64_t a, int32x4_t b, int32x4_t c) { return vrmlsldavhaq (a, b, c); } -/* { dg-final { scan-assembler "vrmlsldavha.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaxq_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaxq_p_s32.c index aa20ba1a7eb0..2a3f441e429c 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaxq_p_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaxq_p_s32.c @@ -1,21 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrmlsldavhaxt.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t foo (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p) { return vrmlsldavhaxq_p_s32 (a, b, c, p); } -/* { dg-final { scan-assembler "vrmlsldavhaxt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrmlsldavhaxt.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t foo1 (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p) { return vrmlsldavhaxq_p (a, b, c, p); } -/* { dg-final { scan-assembler "vrmlsldavhaxt.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaxq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaxq_s32.c index 78932840dfe0..06afa309bfa0 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaxq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhaxq_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vrmlsldavhax.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t foo (int64_t a, int32x4_t b, int32x4_t c) { return vrmlsldavhaxq_s32 (a, b, c); } -/* { dg-final { scan-assembler "vrmlsldavhax.s32" } } */ +/* +**foo1: +** ... +** vrmlsldavhax.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t foo1 (int64_t a, int32x4_t b, int32x4_t c) { return vrmlsldavhaxq (a, b, c); } -/* { dg-final { scan-assembler "vrmlsldavhax.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhq_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhq_p_s32.c index 1e2127a17beb..9f1f82a7c62c 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhq_p_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhq_p_s32.c @@ -1,21 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrmlsldavht.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t foo (int32x4_t a, int32x4_t b, mve_pred16_t p) { return vrmlsldavhq_p_s32 (a, b, p); } -/* { dg-final { scan-assembler "vrmlsldavht.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrmlsldavht.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) { return vrmlsldavhq_p (a, b, p); } -/* { dg-final { scan-assembler "vrmlsldavht.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhq_s32.c index 2a7844fa370b..ff867d5c2081 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhq_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vrmlsldavh.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t foo (int32x4_t a, int32x4_t b) { return vrmlsldavhq_s32 (a, b); } -/* { dg-final { scan-assembler "vrmlsldavh.s32" } } */ +/* +**foo1: +** ... +** vrmlsldavh.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t foo1 (int32x4_t a, int32x4_t b) { return vrmlsldavhq (a, b); } -/* { dg-final { scan-assembler "vrmlsldavh.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhxq_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhxq_p_s32.c index ecbc9737d8fe..2a127c76df85 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhxq_p_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhxq_p_s32.c @@ -1,21 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrmlsldavhxt.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t foo (int32x4_t a, int32x4_t b, mve_pred16_t p) { return vrmlsldavhxq_p_s32 (a, b, p); } -/* { dg-final { scan-assembler "vrmlsldavhxt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrmlsldavhxt.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) { return vrmlsldavhxq_p (a, b, p); } -/* { dg-final { scan-assembler "vrmlsldavhxt.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhxq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhxq_s32.c index 0cea55724aa1..41539059d7f7 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhxq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlsldavhxq_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vrmlsldavhx.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t foo (int32x4_t a, int32x4_t b) { return vrmlsldavhxq_s32 (a, b); } -/* { dg-final { scan-assembler "vrmlsldavhx.s32" } } */ +/* +**foo1: +** ... +** vrmlsldavhx.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int64_t foo1 (int32x4_t a, int32x4_t b) { return vrmlsldavhxq (a, b); } -/* { dg-final { scan-assembler "vrmlsldavhx.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_s16.c index 6adaf3f64316..e5c70a0a3235 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_s16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrmulht.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) { return vrmulhq_m_s16 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrmulht.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrmulht.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) { return vrmulhq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrmulht.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_s32.c index a90a67971c8c..6b373e1739ac 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_s32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrmulht.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) { return vrmulhq_m_s32 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrmulht.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrmulht.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) { return vrmulhq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrmulht.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_s8.c index d0dd99aa4c35..961ba71ccb73 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_s8.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrmulht.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) { return vrmulhq_m_s8 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrmulht.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrmulht.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) { return vrmulhq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrmulht.s8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_u16.c index 50d05c1de11e..3a782c295e14 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_u16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrmulht.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vrmulhq_m_u16 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrmulht.u16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrmulht.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vrmulhq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrmulht.u16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_u32.c index a7da7330266a..818fb631ff72 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_u32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrmulht.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return vrmulhq_m_u32 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrmulht.u32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrmulht.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return vrmulhq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrmulht.u32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_u8.c index 42b0b9f0f2f3..3d1eb365c633 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_m_u8.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrmulht.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vrmulhq_m_u8 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrmulht.u8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrmulht.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vrmulhq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrmulht.u8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_s16.c index ac77b9f13ba0..34c3f182628c 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vrmulh.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int16x8_t b) { return vrmulhq_s16 (a, b); } -/* { dg-final { scan-assembler "vrmulh.s16" } } */ +/* +**foo1: +** ... +** vrmulh.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int16x8_t b) { return vrmulhq (a, b); } -/* { dg-final { scan-assembler "vrmulh.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_s32.c index a7bbd19c3938..fe4d11c5acd6 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vrmulh.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a, int32x4_t b) { return vrmulhq_s32 (a, b); } -/* { dg-final { scan-assembler "vrmulh.s32" } } */ +/* +**foo1: +** ... +** vrmulh.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a, int32x4_t b) { return vrmulhq (a, b); } -/* { dg-final { scan-assembler "vrmulh.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_s8.c index b0d1a856794d..4b5a2e656ed0 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_s8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vrmulh.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int8x16_t b) { return vrmulhq_s8 (a, b); } -/* { dg-final { scan-assembler "vrmulh.s8" } } */ +/* +**foo1: +** ... +** vrmulh.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int8x16_t b) { return vrmulhq (a, b); } -/* { dg-final { scan-assembler "vrmulh.s8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_u16.c index b43cb07b1bfd..478d5885edd9 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_u16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vrmulh.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, uint16x8_t b) { return vrmulhq_u16 (a, b); } -/* { dg-final { scan-assembler "vrmulh.u16" } } */ +/* +**foo1: +** ... +** vrmulh.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, uint16x8_t b) { return vrmulhq (a, b); } -/* { dg-final { scan-assembler "vrmulh.u16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_u32.c index f37eeb606f22..e3dc75d10aa8 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_u32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vrmulh.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t a, uint32x4_t b) { return vrmulhq_u32 (a, b); } -/* { dg-final { scan-assembler "vrmulh.u32" } } */ +/* +**foo1: +** ... +** vrmulh.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t a, uint32x4_t b) { return vrmulhq (a, b); } -/* { dg-final { scan-assembler "vrmulh.u32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_u8.c index ab5d7597a434..108357b6d351 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_u8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vrmulh.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, uint8x16_t b) { return vrmulhq_u8 (a, b); } -/* { dg-final { scan-assembler "vrmulh.u8" } } */ +/* +**foo1: +** ... +** vrmulh.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, uint8x16_t b) { return vrmulhq (a, b); } -/* { dg-final { scan-assembler "vrmulh.u8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_s16.c index 3ef89bd686b3..00f728bdaf2b 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_s16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrmulht.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int16x8_t b, mve_pred16_t p) { return vrmulhq_x_s16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrmulht.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrmulht.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) { return vrmulhq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_s32.c index 2a4b9d0d1478..49a739d9a95f 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_s32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrmulht.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a, int32x4_t b, mve_pred16_t p) { return vrmulhq_x_s32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrmulht.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrmulht.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) { return vrmulhq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_s8.c index d3ef8713dbac..7d97cbc5f8e3 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_s8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrmulht.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int8x16_t b, mve_pred16_t p) { return vrmulhq_x_s8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrmulht.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrmulht.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) { return vrmulhq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_u16.c index 5ce4d01a2352..31622dce8dfb 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_u16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrmulht.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vrmulhq_x_u16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrmulht.u16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrmulht.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p) { return vrmulhq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_u32.c index 4a965976c2d7..f6d2582bac84 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_u32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrmulht.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return vrmulhq_x_u32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrmulht.u32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrmulht.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p) { return vrmulhq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_u8.c index 015530c08b28..15e947618f29 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmulhq_x_u8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrmulht.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vrmulhq_x_u8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrmulht.u8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrmulht.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p) { return vrmulhq_x (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_f16.c index ba8426fdff3c..17b11972e848 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_f16.c @@ -1,13 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vrinta.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t a) { return vrndaq_f16 (a); } -/* { dg-final { scan-assembler "vrinta.f16" } } */ + +/* +**foo1: +** ... +** vrinta.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ +float16x8_t +foo1 (float16x8_t a) +{ + return vrndaq (a); +} + +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_f32.c index a8c9c28422f1..dc3689a66d1d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_f32.c @@ -1,13 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vrinta.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t a) { return vrndaq_f32 (a); } -/* { dg-final { scan-assembler "vrinta.f32" } } */ + +/* +**foo1: +** ... +** vrinta.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ +float32x4_t +foo1 (float32x4_t a) +{ + return vrndaq (a); +} + +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_m_f16.c index 3617d796351e..ffbdf3dad947 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_m_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_m_f16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrintat.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t inactive, float16x8_t a, mve_pred16_t p) { return vrndaq_m_f16 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrintat.f16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrintat.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t inactive, float16x8_t a, mve_pred16_t p) { return vrndaq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_m_f32.c index fdb9ddb35514..d20f8050c454 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_m_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_m_f32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrintat.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t inactive, float32x4_t a, mve_pred16_t p) { return vrndaq_m_f32 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrintat.f32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrintat.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t inactive, float32x4_t a, mve_pred16_t p) { return vrndaq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_x_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_x_f16.c index f398e86b689d..141f612ddcb9 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_x_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_x_f16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrintat.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t a, mve_pred16_t p) { return vrndaq_x_f16 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrintat.f16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrintat.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t a, mve_pred16_t p) { return vrndaq_x (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_x_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_x_f32.c index f5f21808528b..277d2a7b6680 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_x_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndaq_x_f32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrintat.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t a, mve_pred16_t p) { return vrndaq_x_f32 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrintat.f32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrintat.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t a, mve_pred16_t p) { return vrndaq_x (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_f16.c index 911a2b1cb29d..a51878645dab 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_f16.c @@ -1,13 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vrintm.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t a) { return vrndmq_f16 (a); } -/* { dg-final { scan-assembler "vrintm.f16" } } */ + +/* +**foo1: +** ... +** vrintm.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ +float16x8_t +foo1 (float16x8_t a) +{ + return vrndmq (a); +} + +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_f32.c index 496a2e55d553..4b79490cc212 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_f32.c @@ -1,13 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vrintm.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t a) { return vrndmq_f32 (a); } -/* { dg-final { scan-assembler "vrintm.f32" } } */ + +/* +**foo1: +** ... +** vrintm.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ +float32x4_t +foo1 (float32x4_t a) +{ + return vrndmq (a); +} + +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_m_f16.c index 86f58e2eb888..e6eb2a1015d9 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_m_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_m_f16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrintmt.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t inactive, float16x8_t a, mve_pred16_t p) { return vrndmq_m_f16 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrintmt.f16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrintmt.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t inactive, float16x8_t a, mve_pred16_t p) { return vrndmq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_m_f32.c index 247595df56a3..99f3f206823f 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_m_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_m_f32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrintmt.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t inactive, float32x4_t a, mve_pred16_t p) { return vrndmq_m_f32 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrintmt.f32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrintmt.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t inactive, float32x4_t a, mve_pred16_t p) { return vrndmq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_x_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_x_f16.c index accc79579ec8..cdef684f3817 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_x_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_x_f16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrintmt.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t a, mve_pred16_t p) { return vrndmq_x_f16 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrintmt.f16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrintmt.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t a, mve_pred16_t p) { return vrndmq_x (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_x_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_x_f32.c index 0e4200dc2f53..94da7738d165 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_x_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndmq_x_f32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrintmt.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t a, mve_pred16_t p) { return vrndmq_x_f32 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrintmt.f32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrintmt.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t a, mve_pred16_t p) { return vrndmq_x (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_f16.c index 23299c2a06fe..b1b31bebb111 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_f16.c @@ -1,13 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vrintn.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t a) { return vrndnq_f16 (a); } -/* { dg-final { scan-assembler "vrintn.f16" } } */ + +/* +**foo1: +** ... +** vrintn.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ +float16x8_t +foo1 (float16x8_t a) +{ + return vrndnq (a); +} + +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_f32.c index ce445f2249f7..e2fec8a87e23 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_f32.c @@ -1,13 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vrintn.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t a) { return vrndnq_f32 (a); } -/* { dg-final { scan-assembler "vrintn.f32" } } */ + +/* +**foo1: +** ... +** vrintn.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ +float32x4_t +foo1 (float32x4_t a) +{ + return vrndnq (a); +} + +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_m_f16.c index c41e38070bf0..04d828bde24a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_m_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_m_f16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrintnt.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t inactive, float16x8_t a, mve_pred16_t p) { return vrndnq_m_f16 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrintnt.f16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrintnt.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t inactive, float16x8_t a, mve_pred16_t p) { return vrndnq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_m_f32.c index 09b9b95d67da..b32eacd9b20c 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_m_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_m_f32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrintnt.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t inactive, float32x4_t a, mve_pred16_t p) { return vrndnq_m_f32 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrintnt.f32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrintnt.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t inactive, float32x4_t a, mve_pred16_t p) { return vrndnq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_x_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_x_f16.c index beeb23cf364a..093aaa04d570 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_x_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_x_f16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrintnt.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t a, mve_pred16_t p) { return vrndnq_x_f16 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrintnt.f16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrintnt.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t a, mve_pred16_t p) { return vrndnq_x (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_x_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_x_f32.c index d09e55d53b3c..8428800d5036 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_x_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndnq_x_f32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrintnt.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t a, mve_pred16_t p) { return vrndnq_x_f32 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrintnt.f32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrintnt.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t a, mve_pred16_t p) { return vrndnq_x (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_f16.c index 25dcbd5f3bf8..3145faf9f702 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_f16.c @@ -1,13 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vrintp.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t a) { return vrndpq_f16 (a); } -/* { dg-final { scan-assembler "vrintp.f16" } } */ + +/* +**foo1: +** ... +** vrintp.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ +float16x8_t +foo1 (float16x8_t a) +{ + return vrndpq (a); +} + +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_f32.c index 5ab6f7ae9c39..2754af48612d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_f32.c @@ -1,13 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vrintp.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t a) { return vrndpq_f32 (a); } -/* { dg-final { scan-assembler "vrintp.f32" } } */ + +/* +**foo1: +** ... +** vrintp.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ +float32x4_t +foo1 (float32x4_t a) +{ + return vrndpq (a); +} + +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_m_f16.c index 2cf8220c7899..e62883c1edb1 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_m_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_m_f16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrintpt.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t inactive, float16x8_t a, mve_pred16_t p) { return vrndpq_m_f16 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrintpt.f16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrintpt.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t inactive, float16x8_t a, mve_pred16_t p) { return vrndpq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_m_f32.c index 7ed26e8d9260..b8370b85373d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_m_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_m_f32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrintpt.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t inactive, float32x4_t a, mve_pred16_t p) { return vrndpq_m_f32 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrintpt.f32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrintpt.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t inactive, float32x4_t a, mve_pred16_t p) { return vrndpq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_x_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_x_f16.c index 233a6e843e83..574653851734 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_x_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_x_f16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrintpt.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t a, mve_pred16_t p) { return vrndpq_x_f16 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrintpt.f16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrintpt.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t a, mve_pred16_t p) { return vrndpq_x (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_x_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_x_f32.c index f689ce6510b6..86a94c0dfe52 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_x_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndpq_x_f32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrintpt.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t a, mve_pred16_t p) { return vrndpq_x_f32 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrintpt.f32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrintpt.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t a, mve_pred16_t p) { return vrndpq_x (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_f16.c index 6fe3b2eae48a..4b2ee2c3da24 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_f16.c @@ -1,13 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vrintz.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t a) { return vrndq_f16 (a); } -/* { dg-final { scan-assembler "vrintz.f16" } } */ + +/* +**foo1: +** ... +** vrintz.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ +float16x8_t +foo1 (float16x8_t a) +{ + return vrndq (a); +} + +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_f32.c index a27b5c99b3a8..301e9e4c25e8 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_f32.c @@ -1,13 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vrintz.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t a) { return vrndq_f32 (a); } -/* { dg-final { scan-assembler "vrintz.f32" } } */ + +/* +**foo1: +** ... +** vrintz.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ +float32x4_t +foo1 (float32x4_t a) +{ + return vrndq (a); +} + +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_m_f16.c index 3a9edafc7725..d7ba6d4f11f0 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_m_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_m_f16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrintzt.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t inactive, float16x8_t a, mve_pred16_t p) { return vrndq_m_f16 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrintzt.f16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrintzt.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t inactive, float16x8_t a, mve_pred16_t p) { return vrndq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_m_f32.c index 0ae4b92d235c..6bfe1d499417 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_m_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_m_f32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrintzt.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t inactive, float32x4_t a, mve_pred16_t p) { return vrndq_m_f32 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrintzt.f32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrintzt.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t inactive, float32x4_t a, mve_pred16_t p) { return vrndq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_x_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_x_f16.c index eb6c3c37876a..13ba05011e41 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_x_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_x_f16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrintzt.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t a, mve_pred16_t p) { return vrndq_x_f16 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrintzt.f16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrintzt.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t a, mve_pred16_t p) { return vrndq_x (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_x_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_x_f32.c index 8b4c8c1e2890..162d199420d5 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_x_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndq_x_f32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrintzt.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t a, mve_pred16_t p) { return vrndq_x_f32 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrintzt.f32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrintzt.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t a, mve_pred16_t p) { return vrndq_x (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_f16.c index e6f2028de304..9df65c5473de 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_f16.c @@ -1,13 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vrintx.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t a) { return vrndxq_f16 (a); } -/* { dg-final { scan-assembler "vrintx.f16" } } */ + +/* +**foo1: +** ... +** vrintx.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ +float16x8_t +foo1 (float16x8_t a) +{ + return vrndxq (a); +} + +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_f32.c index 32e6c90e60e7..92bc6df13619 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_f32.c @@ -1,13 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vrintx.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t a) { return vrndxq_f32 (a); } -/* { dg-final { scan-assembler "vrintx.f32" } } */ + +/* +**foo1: +** ... +** vrintx.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ +float32x4_t +foo1 (float32x4_t a) +{ + return vrndxq (a); +} + +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_m_f16.c index 0e6a6119f087..9d92566b08de 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_m_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_m_f16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrintxt.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t inactive, float16x8_t a, mve_pred16_t p) { return vrndxq_m_f16 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrintxt.f16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrintxt.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t inactive, float16x8_t a, mve_pred16_t p) { return vrndxq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_m_f32.c index 3b09769814b2..7a216050fb10 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_m_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_m_f32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrintxt.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t inactive, float32x4_t a, mve_pred16_t p) { return vrndxq_m_f32 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrintxt.f32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrintxt.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t inactive, float32x4_t a, mve_pred16_t p) { return vrndxq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_x_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_x_f16.c index c160800023f6..537506cd5be4 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_x_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_x_f16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrintxt.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo (float16x8_t a, mve_pred16_t p) { return vrndxq_x_f16 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrintxt.f16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrintxt.f16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float16x8_t foo1 (float16x8_t a, mve_pred16_t p) { return vrndxq_x (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_x_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_x_f32.c index 48b761610326..e19ba0c0a3c2 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_x_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrndxq_x_f32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrintxt.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo (float32x4_t a, mve_pred16_t p) { return vrndxq_x_f32 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrintxt.f32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrintxt.f32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ float32x4_t foo1 (float32x4_t a, mve_pred16_t p) { return vrndxq_x (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_s16.c index 9e7f22ccad91..e30cfe16fdfd 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_s16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrshrnbt.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int16x8_t b, mve_pred16_t p) { return vrshrnbq_m_n_s16 (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrshrnbt.i16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrshrnbt.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p) { return vrshrnbq_m (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrshrnbt.i16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_s32.c index 6b6a98c3da42..acb89bd462a2 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_s32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrshrnbt.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int32x4_t b, mve_pred16_t p) { return vrshrnbq_m_n_s32 (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrshrnbt.i32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrshrnbt.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p) { return vrshrnbq_m (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrshrnbt.i32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_u16.c index e54893d2abc4..4d0c60489715 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_u16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrshrnbt.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p) { return vrshrnbq_m_n_u16 (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrshrnbt.i16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrshrnbt.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p) { return vrshrnbq_m (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrshrnbt.i16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_u32.c index ecb41a2c4441..1b768a130618 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_m_n_u32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrshrnbt.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p) { return vrshrnbq_m_n_u32 (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrshrnbt.i32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrshrnbt.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p) { return vrshrnbq_m (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrshrnbt.i32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_s16.c index f09db27adeee..6350e3c4cca3 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vrshrnb.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int16x8_t b) { return vrshrnbq_n_s16 (a, b, 1); } -/* { dg-final { scan-assembler "vrshrnb.i16" } } */ +/* +**foo1: +** ... +** vrshrnb.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int16x8_t b) { return vrshrnbq (a, b, 1); } -/* { dg-final { scan-assembler "vrshrnb.i16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_s32.c index 2bc4170b07f8..8ae96d8a2b82 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vrshrnb.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int32x4_t b) { return vrshrnbq_n_s32 (a, b, 1); } -/* { dg-final { scan-assembler "vrshrnb.i32" } } */ +/* +**foo1: +** ... +** vrshrnb.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int32x4_t b) { return vrshrnbq (a, b, 1); } -/* { dg-final { scan-assembler "vrshrnb.i32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_u16.c index 990871f5b9ef..2918cb05e437 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_u16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vrshrnb.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, uint16x8_t b) { return vrshrnbq_n_u16 (a, b, 1); } -/* { dg-final { scan-assembler "vrshrnb.i16" } } */ +/* +**foo1: +** ... +** vrshrnb.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, uint16x8_t b) { return vrshrnbq (a, b, 1); } -/* { dg-final { scan-assembler "vrshrnb.i16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_u32.c index 875fed28fe7c..c615d8083d7c 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrnbq_n_u32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vrshrnb.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, uint32x4_t b) { return vrshrnbq_n_u32 (a, b, 1); } -/* { dg-final { scan-assembler "vrshrnb.i32" } } */ +/* +**foo1: +** ... +** vrshrnb.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, uint32x4_t b) { return vrshrnbq (a, b, 1); } -/* { dg-final { scan-assembler "vrshrnb.i32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_s16.c index 72206c36fda1..639f25ed7192 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_s16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrshrntt.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int16x8_t b, mve_pred16_t p) { return vrshrntq_m_n_s16 (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrshrntt.i16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrshrntt.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p) { return vrshrntq_m (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrshrntt.i16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_s32.c index e964af2e8b5a..07a53e364f25 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_s32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrshrntt.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int32x4_t b, mve_pred16_t p) { return vrshrntq_m_n_s32 (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrshrntt.i32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrshrntt.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p) { return vrshrntq_m (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrshrntt.i32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_u16.c index ad98b7677f06..f00d62bcb7af 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_u16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrshrntt.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p) { return vrshrntq_m_n_u16 (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrshrntt.i16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrshrntt.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p) { return vrshrntq_m (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrshrntt.i16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_u32.c index adee8b28b88c..bb809acfe6e2 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_m_n_u32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrshrntt.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p) { return vrshrntq_m_n_u32 (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrshrntt.i32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrshrntt.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p) { return vrshrntq_m (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrshrntt.i32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_s16.c index 4c2f133b6054..926a897d50e4 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vrshrnt.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int16x8_t b) { return vrshrntq_n_s16 (a, b, 1); } -/* { dg-final { scan-assembler "vrshrnt.i16" } } */ +/* +**foo1: +** ... +** vrshrnt.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int16x8_t b) { return vrshrntq (a, b, 1); } -/* { dg-final { scan-assembler "vrshrnt.i16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_s32.c index 26508ba7961b..7e9313557512 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vrshrnt.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int32x4_t b) { return vrshrntq_n_s32 (a, b, 1); } -/* { dg-final { scan-assembler "vrshrnt.i32" } } */ +/* +**foo1: +** ... +** vrshrnt.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int32x4_t b) { return vrshrntq (a, b, 1); } -/* { dg-final { scan-assembler "vrshrnt.i32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_u16.c index eea3d4974db8..61636d301f7b 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_u16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vrshrnt.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, uint16x8_t b) { return vrshrntq_n_u16 (a, b, 1); } -/* { dg-final { scan-assembler "vrshrnt.i16" } } */ +/* +**foo1: +** ... +** vrshrnt.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, uint16x8_t b) { return vrshrntq (a, b, 1); } -/* { dg-final { scan-assembler "vrshrnt.i16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_u32.c index 49afdf0c61e8..b82dad525f4b 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrntq_n_u32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vrshrnt.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, uint32x4_t b) { return vrshrntq_n_u32 (a, b, 1); } -/* { dg-final { scan-assembler "vrshrnt.i32" } } */ +/* +**foo1: +** ... +** vrshrnt.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, uint32x4_t b) { return vrshrntq (a, b, 1); } -/* { dg-final { scan-assembler "vrshrnt.i32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_s16.c index ee48f8c2733b..b1a2f8133201 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_s16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrshrt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p) { - return vrshrq_m_n_s16 (inactive, a, 16, p); + return vrshrq_m_n_s16 (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrshrt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrshrt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p) { - return vrshrq_m (inactive, a, 16, p); + return vrshrq_m (inactive, a, 1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrshrt.s16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_s32.c index 4330dcfaaa68..fb229273b865 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_s32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrshrt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p) { - return vrshrq_m_n_s32 (inactive, a, 32, p); + return vrshrq_m_n_s32 (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrshrt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrshrt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p) { - return vrshrq_m (inactive, a, 32, p); + return vrshrq_m (inactive, a, 1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrshrt.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_s8.c index 4b35c597a134..b9136b8dd695 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_s8.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrshrt.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p) { - return vrshrq_m_n_s8 (inactive, a, 8, p); + return vrshrq_m_n_s8 (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrshrt.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrshrt.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p) { - return vrshrq_m (inactive, a, 8, p); + return vrshrq_m (inactive, a, 1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrshrt.s8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_u16.c index 2e83c60ad956..9dbc3fed62af 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_u16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrshrt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p) { - return vrshrq_m_n_u16 (inactive, a, 16, p); + return vrshrq_m_n_u16 (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrshrt.u16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrshrt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p) { - return vrshrq_m (inactive, a, 16, p); + return vrshrq_m (inactive, a, 1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrshrt.u16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_u32.c index 5d2a9d8f4f46..0e0cb10b4765 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_u32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrshrt.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p) { - return vrshrq_m_n_u32 (inactive, a, 32, p); + return vrshrq_m_n_u32 (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrshrt.u32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrshrt.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p) { - return vrshrq_m (inactive, a, 32, p); + return vrshrq_m (inactive, a, 1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrshrt.u32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_u8.c index f5b437086899..010a7915c564 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_m_n_u8.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrshrt.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p) { - return vrshrq_m_n_u8 (inactive, a, 8, p); + return vrshrq_m_n_u8 (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrshrt.u8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrshrt.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p) { - return vrshrq_m (inactive, a, 8, p); + return vrshrq_m (inactive, a, 1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrshrt.u8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_s16.c index 2cd934774ce9..ff3d552bd785 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vrshr.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a) { - return vrshrq_n_s16 (a, 16); + return vrshrq_n_s16 (a, 1); } -/* { dg-final { scan-assembler "vrshr.s16" } } */ +/* +**foo1: +** ... +** vrshr.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a) { - return vrshrq (a, 16); + return vrshrq (a, 1); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vrshr.s16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_s32.c index 3cc21f2b2774..db161f7d009a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vrshr.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a) { - return vrshrq_n_s32 (a, 32); + return vrshrq_n_s32 (a, 1); } -/* { dg-final { scan-assembler "vrshr.s32" } } */ +/* +**foo1: +** ... +** vrshr.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a) { - return vrshrq (a, 32); + return vrshrq (a, 1); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vrshr.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_s8.c index 251d5324f5ca..86a0294f8a8a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_s8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vrshr.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a) { - return vrshrq_n_s8 (a, 8); + return vrshrq_n_s8 (a, 1); } -/* { dg-final { scan-assembler "vrshr.s8" } } */ +/* +**foo1: +** ... +** vrshr.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a) { - return vrshrq (a, 8); + return vrshrq (a, 1); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vrshr.s8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_u16.c index 6934597f8449..897247fce6c0 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_u16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vrshr.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a) { - return vrshrq_n_u16 (a, 16); + return vrshrq_n_u16 (a, 1); } -/* { dg-final { scan-assembler "vrshr.u16" } } */ +/* +**foo1: +** ... +** vrshr.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a) { - return vrshrq (a, 16); + return vrshrq (a, 1); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vrshr.u16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_u32.c index 52b287b8f3b2..e8f7f1c33e00 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_u32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vrshr.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t a) { - return vrshrq_n_u32 (a, 32); + return vrshrq_n_u32 (a, 1); } -/* { dg-final { scan-assembler "vrshr.u32" } } */ +/* +**foo1: +** ... +** vrshr.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t a) { - return vrshrq (a, 32); + return vrshrq (a, 1); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vrshr.u32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_u8.c index ac595a9ac956..a22521b14ae1 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_n_u8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vrshr.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a) { - return vrshrq_n_u8 (a, 8); + return vrshrq_n_u8 (a, 1); } -/* { dg-final { scan-assembler "vrshr.u8" } } */ +/* +**foo1: +** ... +** vrshr.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a) { - return vrshrq (a, 8); + return vrshrq (a, 1); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vrshr.u8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_s16.c index 14b5c1884f44..37f364cfc396 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_s16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrshrt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, mve_pred16_t p) { - return vrshrq_x_n_s16 (a, 16, p); + return vrshrq_x_n_s16 (a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrshrt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrshrt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, mve_pred16_t p) { - return vrshrq_x (a, 16, p); + return vrshrq_x (a, 1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrshrt.s16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_s32.c index 846ddb96782d..0da2fd750569 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_s32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrshrt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a, mve_pred16_t p) { - return vrshrq_x_n_s32 (a, 32, p); + return vrshrq_x_n_s32 (a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrshrt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrshrt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a, mve_pred16_t p) { - return vrshrq_x (a, 32, p); + return vrshrq_x (a, 1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrshrt.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_s8.c index 06f75e56db63..90c814b20c53 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_s8.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrshrt.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, mve_pred16_t p) { - return vrshrq_x_n_s8 (a, 8, p); + return vrshrq_x_n_s8 (a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrshrt.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrshrt.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, mve_pred16_t p) { - return vrshrq_x (a, 8, p); + return vrshrq_x (a, 1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrshrt.s8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_u16.c index bc946497cfc5..135b9e7e90fe 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_u16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrshrt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, mve_pred16_t p) { - return vrshrq_x_n_u16 (a, 16, p); + return vrshrq_x_n_u16 (a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrshrt.u16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrshrt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, mve_pred16_t p) { - return vrshrq_x (a, 16, p); + return vrshrq_x (a, 1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrshrt.u16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_u32.c index 55002cd196de..dd656f49aa78 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_u32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrshrt.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t a, mve_pred16_t p) { - return vrshrq_x_n_u32 (a, 32, p); + return vrshrq_x_n_u32 (a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrshrt.u32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrshrt.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t a, mve_pred16_t p) { - return vrshrq_x (a, 32, p); + return vrshrq_x (a, 1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrshrt.u32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_u8.c index e31306577110..e41abc450a09 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vrshrq_x_n_u8.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrshrt.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, mve_pred16_t p) { - return vrshrq_x_n_u8 (a, 8, p); + return vrshrq_x_n_u8 (a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrshrt.u8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vrshrt.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, mve_pred16_t p) { - return vrshrq_x (a, 8, p); + return vrshrq_x (a, 1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vrshrt.u8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_m_s32.c index 21f4219faa32..66a5c4c9da3e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_m_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_m_s32.c @@ -1,23 +1,61 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vsbcit.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +** ... +** lsr (?:ip|fp|r[0-9]+), #29(?: @.*|) +** ... +** and (?:ip|fp|r[0-9]+), #1(?: @.*|) +** ... +*/ int32x4_t -foo (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned * carry_out, mve_pred16_t p) +foo (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned *carry_out, mve_pred16_t p) { return vsbciq_m_s32 (inactive, a, b, carry_out, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vsbcit.i32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vsbcit.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +** ... +** lsr (?:ip|fp|r[0-9]+), #29(?: @.*|) +** ... +** and (?:ip|fp|r[0-9]+), #1(?: @.*|) +** ... +*/ int32x4_t -foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned * carry_out, mve_pred16_t p) +foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned *carry_out, mve_pred16_t p) { return vsbciq_m (inactive, a, b, carry_out, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vsbcit.i32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_m_u32.c index ef9eed92d33a..9306f152cdeb 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_m_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_m_u32.c @@ -1,23 +1,61 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vsbcit.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +** ... +** lsr (?:ip|fp|r[0-9]+), #29(?: @.*|) +** ... +** and (?:ip|fp|r[0-9]+), #1(?: @.*|) +** ... +*/ uint32x4_t -foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned * carry_out, mve_pred16_t p) +foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned *carry_out, mve_pred16_t p) { return vsbciq_m_u32 (inactive, a, b, carry_out, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vsbcit.i32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vsbcit.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +** ... +** lsr (?:ip|fp|r[0-9]+), #29(?: @.*|) +** ... +** and (?:ip|fp|r[0-9]+), #1(?: @.*|) +** ... +*/ uint32x4_t -foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned * carry_out, mve_pred16_t p) +foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned *carry_out, mve_pred16_t p) { return vsbciq_m (inactive, a, b, carry_out, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vsbcit.i32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_s32.c index 2181a3a2879c..0b5040f0b2a2 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_s32.c @@ -1,21 +1,53 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vsbci.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +** ... +** lsr (?:ip|fp|r[0-9]+), #29(?: @.*|) +** ... +** and (?:ip|fp|r[0-9]+), #1(?: @.*|) +** ... +*/ int32x4_t -foo (int32x4_t a, int32x4_t b, unsigned * carry_out) +foo (int32x4_t a, int32x4_t b, unsigned *carry_out) { return vsbciq_s32 (a, b, carry_out); } -/* { dg-final { scan-assembler "vsbci.i32" } } */ +/* +**foo1: +** ... +** vsbci.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +** ... +** lsr (?:ip|fp|r[0-9]+), #29(?: @.*|) +** ... +** and (?:ip|fp|r[0-9]+), #1(?: @.*|) +** ... +*/ int32x4_t -foo1 (int32x4_t a, int32x4_t b, unsigned * carry_out) +foo1 (int32x4_t a, int32x4_t b, unsigned *carry_out) { - return vsbciq_s32 (a, b, carry_out); + return vsbciq (a, b, carry_out); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vsbci.i32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_u32.c index df0487f3b886..df211a64daad 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbciq_u32.c @@ -1,21 +1,53 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vsbci.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +** ... +** lsr (?:ip|fp|r[0-9]+), #29(?: @.*|) +** ... +** and (?:ip|fp|r[0-9]+), #1(?: @.*|) +** ... +*/ uint32x4_t -foo (uint32x4_t a, uint32x4_t b, unsigned * carry_out) +foo (uint32x4_t a, uint32x4_t b, unsigned *carry_out) { return vsbciq_u32 (a, b, carry_out); } -/* { dg-final { scan-assembler "vsbci.i32" } } */ +/* +**foo1: +** ... +** vsbci.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +** ... +** lsr (?:ip|fp|r[0-9]+), #29(?: @.*|) +** ... +** and (?:ip|fp|r[0-9]+), #1(?: @.*|) +** ... +*/ uint32x4_t -foo1 (uint32x4_t a, uint32x4_t b, unsigned * carry_out) +foo1 (uint32x4_t a, uint32x4_t b, unsigned *carry_out) { - return vsbciq_u32 (a, b, carry_out); + return vsbciq (a, b, carry_out); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vsbci.i32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_m_s32.c index 73be46a8459f..217cfa7ac213 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_m_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_m_s32.c @@ -1,23 +1,73 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +** ... +** bfi (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|) +** ... +** vmsr FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vsbct.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +** ... +** lsr (?:ip|fp|r[0-9]+), #29(?: @.*|) +** ... +** and (?:ip|fp|r[0-9]+), #1(?: @.*|) +** ... +*/ int32x4_t -foo (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned * carry, mve_pred16_t p) +foo (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned *carry, mve_pred16_t p) { - return vsbcq_m_s32 (inactive, a, b, carry, p); + return vsbcq_m_s32 (inactive, a, b, carry, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vsbct.i32" } } */ +/* +**foo1: +** ... +** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +** ... +** bfi (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|) +** ... +** vmsr FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vsbct.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +** ... +** lsr (?:ip|fp|r[0-9]+), #29(?: @.*|) +** ... +** and (?:ip|fp|r[0-9]+), #1(?: @.*|) +** ... +*/ int32x4_t -foo1(int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned * carry, mve_pred16_t p) +foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, unsigned *carry, mve_pred16_t p) { - return vsbcq_m (inactive, a, b, carry, p); + return vsbcq_m (inactive, a, b, carry, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vsbct.i32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_m_u32.c index 80cf70584e55..dad04d05d68c 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_m_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_m_u32.c @@ -1,22 +1,73 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +** ... +** bfi (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|) +** ... +** vmsr FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vsbct.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +** ... +** lsr (?:ip|fp|r[0-9]+), #29(?: @.*|) +** ... +** and (?:ip|fp|r[0-9]+), #1(?: @.*|) +** ... +*/ uint32x4_t -foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned * carry, mve_pred16_t p) +foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned *carry, mve_pred16_t p) { - return vsbcq_m_u32 (inactive, a, b, carry, p); + return vsbcq_m_u32 (inactive, a, b, carry, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vsbct.i32" } } */ + +/* +**foo1: +** ... +** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +** ... +** bfi (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|) +** ... +** vmsr FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vsbct.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +** ... +** lsr (?:ip|fp|r[0-9]+), #29(?: @.*|) +** ... +** and (?:ip|fp|r[0-9]+), #1(?: @.*|) +** ... +*/ uint32x4_t -foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned * carry, mve_pred16_t p) +foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, unsigned *carry, mve_pred16_t p) { - return vsbcq_m (inactive, a, b, carry, p); + return vsbcq_m (inactive, a, b, carry, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vsbct.i32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_s32.c index 23e42575bd72..cd033640bcc0 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_s32.c @@ -1,21 +1,65 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +** ... +** bfi (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|) +** ... +** vmsr FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vsbc.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +** ... +** lsr (?:ip|fp|r[0-9]+), #29(?: @.*|) +** ... +** and (?:ip|fp|r[0-9]+), #1(?: @.*|) +** ... +*/ int32x4_t -foo (int32x4_t a, int32x4_t b, unsigned * carry) +foo (int32x4_t a, int32x4_t b, unsigned *carry) { return vsbcq_s32 (a, b, carry); } -/* { dg-final { scan-assembler "vsbc.i32" } } */ +/* +**foo1: +** ... +** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +** ... +** bfi (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|) +** ... +** vmsr FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vsbc.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +** ... +** lsr (?:ip|fp|r[0-9]+), #29(?: @.*|) +** ... +** and (?:ip|fp|r[0-9]+), #1(?: @.*|) +** ... +*/ int32x4_t -foo1 (int32x4_t a, int32x4_t b, unsigned * carry) +foo1 (int32x4_t a, int32x4_t b, unsigned *carry) { return vsbcq (a, b, carry); } -/* { dg-final { scan-assembler "vsbc.i32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_u32.c index d3aa66f61346..6ca0c753b5e4 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsbcq_u32.c @@ -1,21 +1,65 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +** ... +** bfi (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|) +** ... +** vmsr FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vsbc.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +** ... +** lsr (?:ip|fp|r[0-9]+), #29(?: @.*|) +** ... +** and (?:ip|fp|r[0-9]+), #1(?: @.*|) +** ... +*/ uint32x4_t -foo (uint32x4_t a, uint32x4_t b, unsigned * carry) +foo (uint32x4_t a, uint32x4_t b, unsigned *carry) { return vsbcq_u32 (a, b, carry); } -/* { dg-final { scan-assembler "vsbc.i32" } } */ +/* +**foo1: +** ... +** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +** ... +** bfi (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #29, #1(?: @.*|) +** ... +** vmsr FPSCR_nzcvqc, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vsbc.i32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +** vmrs (?:ip|fp|r[0-9]+), FPSCR_nzcvqc(?: @.*|) +** ... +** lsr (?:ip|fp|r[0-9]+), #29(?: @.*|) +** ... +** and (?:ip|fp|r[0-9]+), #1(?: @.*|) +** ... +*/ uint32x4_t -foo1 (uint32x4_t a, uint32x4_t b, unsigned * carry) +foo1 (uint32x4_t a, uint32x4_t b, unsigned *carry) { return vsbcq (a, b, carry); } -/* { dg-final { scan-assembler "vsbc.i32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_s16.c index c4c77f2559c2..c603a89117f5 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_s16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlct q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +** ... +*/ int16x8_t -foo (int16x8_t a, uint32_t * b, mve_pred16_t p) +foo (int16x8_t a, uint32_t *b, mve_pred16_t p) { - return vshlcq_m_s16 (a, b, 32, p); + return vshlcq_m_s16 (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshlct" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlct q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +** ... +*/ int16x8_t -foo1 (int16x8_t a, uint32_t * b, mve_pred16_t p) +foo1 (int16x8_t a, uint32_t *b, mve_pred16_t p) { - return vshlcq_m (a, b, 32, p); + return vshlcq_m (a, b, 1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshlct" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_s32.c index 20cfd09c82dc..46e75033ae61 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_s32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlct q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +** ... +*/ int32x4_t -foo (int32x4_t a, uint32_t * b, mve_pred16_t p) +foo (int32x4_t a, uint32_t *b, mve_pred16_t p) { return vshlcq_m_s32 (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshlct" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlct q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +** ... +*/ int32x4_t -foo1 (int32x4_t a, uint32_t * b, mve_pred16_t p) +foo1 (int32x4_t a, uint32_t *b, mve_pred16_t p) { return vshlcq_m (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshlct" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_s8.c index 33dde10e4a8c..868de5df80b5 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_s8.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlct q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +** ... +*/ int8x16_t -foo (int8x16_t a, uint32_t * b, mve_pred16_t p) +foo (int8x16_t a, uint32_t *b, mve_pred16_t p) { return vshlcq_m_s8 (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshlct" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlct q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +** ... +*/ int8x16_t -foo1 (int8x16_t a, uint32_t * b, mve_pred16_t p) +foo1 (int8x16_t a, uint32_t *b, mve_pred16_t p) { return vshlcq_m (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshlct" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_u16.c index 2bf69f0c465e..a1e1c3f9bc45 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_u16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlct q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t -foo (uint16x8_t a, uint32_t * b, mve_pred16_t p) +foo (uint16x8_t a, uint32_t *b, mve_pred16_t p) { return vshlcq_m_u16 (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshlct" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlct q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t -foo1 (uint16x8_t a, uint32_t * b, mve_pred16_t p) +foo1 (uint16x8_t a, uint32_t *b, mve_pred16_t p) { return vshlcq_m (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshlct" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_u32.c index e6650302ea71..bcb0bebd969d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_u32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlct q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +** ... +*/ uint32x4_t -foo (uint32x4_t a, uint32_t * b, mve_pred16_t p) +foo (uint32x4_t a, uint32_t *b, mve_pred16_t p) { return vshlcq_m_u32 (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshlct" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlct q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +** ... +*/ uint32x4_t -foo1 (uint32x4_t a, uint32_t * b, mve_pred16_t p) +foo1 (uint32x4_t a, uint32_t *b, mve_pred16_t p) { return vshlcq_m (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshlct" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_u8.c index 95857f09371d..989364474519 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_m_u8.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlct q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t -foo (uint8x16_t a, uint32_t * b, mve_pred16_t p) +foo (uint8x16_t a, uint32_t *b, mve_pred16_t p) { return vshlcq_m_u8 (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshlct" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlct q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t -foo1 (uint8x16_t a, uint32_t * b, mve_pred16_t p) +foo1 (uint8x16_t a, uint32_t *b, mve_pred16_t p) { return vshlcq_m (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshlct" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_s16.c index ecd4fce5de32..e6c5069af215 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vshlc q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +** ... +*/ int16x8_t -foo (int16x8_t a, uint32_t * b) +foo (int16x8_t a, uint32_t *b) { return vshlcq_s16 (a, b, 1); } -/* { dg-final { scan-assembler "vshlc" } } */ +/* +**foo1: +** ... +** vshlc q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +** ... +*/ int16x8_t -foo1 (int16x8_t a, uint32_t * b) +foo1 (int16x8_t a, uint32_t *b) { return vshlcq (a, b, 1); } -/* { dg-final { scan-assembler "vshlc" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_s32.c index 2956b93138e4..2c17845fd7e3 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vshlc q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +** ... +*/ int32x4_t -foo (int32x4_t a, uint32_t * b) +foo (int32x4_t a, uint32_t *b) { return vshlcq_s32 (a, b, 1); } -/* { dg-final { scan-assembler "vshlc" } } */ +/* +**foo1: +** ... +** vshlc q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +** ... +*/ int32x4_t -foo1 (int32x4_t a, uint32_t * b) +foo1 (int32x4_t a, uint32_t *b) { return vshlcq (a, b, 1); } -/* { dg-final { scan-assembler "vshlc" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_s8.c index cc22b1b1bd99..ab55f3a29bad 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_s8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vshlc q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +** ... +*/ int8x16_t -foo (int8x16_t a, uint32_t * b) +foo (int8x16_t a, uint32_t *b) { return vshlcq_s8 (a, b, 1); } -/* { dg-final { scan-assembler "vshlc" } } */ +/* +**foo1: +** ... +** vshlc q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +** ... +*/ int8x16_t -foo1 (int8x16_t a, uint32_t * b) +foo1 (int8x16_t a, uint32_t *b) { return vshlcq (a, b, 1); } -/* { dg-final { scan-assembler "vshlc" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_u16.c index bbf6c5315731..e1862be0249a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_u16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vshlc q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t -foo (uint16x8_t a, uint32_t * b) +foo (uint16x8_t a, uint32_t *b) { return vshlcq_u16 (a, b, 1); } -/* { dg-final { scan-assembler "vshlc" } } */ +/* +**foo1: +** ... +** vshlc q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t -foo1 (uint16x8_t a, uint32_t * b) +foo1 (uint16x8_t a, uint32_t *b) { return vshlcq (a, b, 1); } -/* { dg-final { scan-assembler "vshlc" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_u32.c index c42d9c10afe2..dc1030fbedf1 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_u32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vshlc q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +** ... +*/ uint32x4_t -foo (uint32x4_t a, uint32_t * b) +foo (uint32x4_t a, uint32_t *b) { return vshlcq_u32 (a, b, 1); } -/* { dg-final { scan-assembler "vshlc" } } */ +/* +**foo1: +** ... +** vshlc q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +** ... +*/ uint32x4_t -foo1 (uint32x4_t a, uint32_t * b) +foo1 (uint32x4_t a, uint32_t *b) { return vshlcq (a, b, 1); } -/* { dg-final { scan-assembler "vshlc" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_u8.c index f24b22797c2c..cb24651a2949 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlcq_u8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vshlc q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t -foo (uint8x16_t a, uint32_t * b) +foo (uint8x16_t a, uint32_t *b) { return vshlcq_u8 (a, b, 1); } -/* { dg-final { scan-assembler "vshlc" } } */ +/* +**foo1: +** ... +** vshlc q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t -foo1 (uint8x16_t a, uint32_t * b) +foo1 (uint8x16_t a, uint32_t *b) { return vshlcq (a, b, 1); } -/* { dg-final { scan-assembler "vshlc" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_s16.c index 6d6c4b2d7370..1ee641d8d684 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_s16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshllbt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t inactive, int16x8_t a, mve_pred16_t p) { return vshllbq_m_n_s16 (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshllbt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshllbt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t inactive, int16x8_t a, mve_pred16_t p) { return vshllbq_m (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshllbt.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_s8.c index 5d7b9623f1a8..93a06cb2676d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_s8.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshllbt.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t inactive, int8x16_t a, mve_pred16_t p) { return vshllbq_m_n_s8 (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshllbt.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshllbt.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t inactive, int8x16_t a, mve_pred16_t p) { return vshllbq_m (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshllbt.s8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_u16.c index 3697775ea0f3..67039260cd57 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_u16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshllbt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t inactive, uint16x8_t a, mve_pred16_t p) { return vshllbq_m_n_u16 (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshllbt.u16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshllbt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t inactive, uint16x8_t a, mve_pred16_t p) { return vshllbq_m (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshllbt.u16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_u8.c index 39a10e21b0b4..f02293bb8745 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_m_n_u8.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshllbt.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t inactive, uint8x16_t a, mve_pred16_t p) { return vshllbq_m_n_u8 (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshllbt.u8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshllbt.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t inactive, uint8x16_t a, mve_pred16_t p) { return vshllbq_m (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshllbt.u8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_s16.c index 7d3a4d811cb8..906f7fb75d1f 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vshllb.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int16x8_t a) { return vshllbq_n_s16 (a, 1); } -/* { dg-final { scan-assembler "vshllb.s16" } } */ +/* +**foo1: +** ... +** vshllb.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int16x8_t a) { return vshllbq (a, 1); } -/* { dg-final { scan-assembler "vshllb.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_s8.c index 63b406978c1e..f63ff4b75561 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_s8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vshllb.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int8x16_t a) { return vshllbq_n_s8 (a, 1); } -/* { dg-final { scan-assembler "vshllb.s8" } } */ +/* +**foo1: +** ... +** vshllb.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int8x16_t a) { return vshllbq (a, 1); } -/* { dg-final { scan-assembler "vshllb.s8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_u16.c index 9306d2446457..883d2979f327 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_u16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vshllb.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint16x8_t a) { return vshllbq_n_u16 (a, 1); } -/* { dg-final { scan-assembler "vshllb.u16" } } */ +/* +**foo1: +** ... +** vshllb.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint16x8_t a) { return vshllbq (a, 1); } -/* { dg-final { scan-assembler "vshllb.u16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_u8.c index 0b24160216e7..bbdec7ba3216 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_n_u8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vshllb.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint8x16_t a) { return vshllbq_n_u8 (a, 1); } -/* { dg-final { scan-assembler "vshllb.u8" } } */ +/* +**foo1: +** ... +** vshllb.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint8x16_t a) { return vshllbq (a, 1); } -/* { dg-final { scan-assembler "vshllb.u8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_s16.c index 689fc749b00d..239c536f4a45 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_s16.c @@ -1,15 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshllbt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int16x8_t a, mve_pred16_t p) { - return vshllbq_x_n_s16 (a, 1, p); + return vshllbq_x_n_s16 (a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshllbt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshllbt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ +int32x4_t +foo1 (int16x8_t a, mve_pred16_t p) +{ + return vshllbq_x (a, 1, p); +} + +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_s8.c index 82f684d1cd54..9371b523c3f5 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_s8.c @@ -1,15 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshllbt.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int8x16_t a, mve_pred16_t p) { - return vshllbq_x_n_s8 (a, 1, p); + return vshllbq_x_n_s8 (a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshllbt.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshllbt.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ +int16x8_t +foo1 (int8x16_t a, mve_pred16_t p) +{ + return vshllbq_x (a, 1, p); +} + +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_u16.c index 5c51a4e4011b..72f9aed343ea 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_u16.c @@ -1,15 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshllbt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint16x8_t a, mve_pred16_t p) { - return vshllbq_x_n_u16 (a, 1, p); + return vshllbq_x_n_u16 (a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshllbt.u16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshllbt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ +uint32x4_t +foo1 (uint16x8_t a, mve_pred16_t p) +{ + return vshllbq_x (a, 1, p); +} + +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_u8.c index 5a713befb274..bd2094283005 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshllbq_x_n_u8.c @@ -1,15 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshllbt.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint8x16_t a, mve_pred16_t p) { - return vshllbq_x_n_u8 (a, 1, p); + return vshllbq_x_n_u8 (a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshllbt.u8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshllbt.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ +uint16x8_t +foo1 (uint8x16_t a, mve_pred16_t p) +{ + return vshllbq_x (a, 1, p); +} + +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_s16.c index 8153a570a9a2..800350115270 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_s16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlltt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t inactive, int16x8_t a, mve_pred16_t p) { return vshlltq_m_n_s16 (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshlltt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlltt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t inactive, int16x8_t a, mve_pred16_t p) { return vshlltq_m (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshlltt.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_s8.c index 3f47337c9b69..19e2f3c7469e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_s8.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlltt.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t inactive, int8x16_t a, mve_pred16_t p) { return vshlltq_m_n_s8 (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshlltt.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlltt.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t inactive, int8x16_t a, mve_pred16_t p) { return vshlltq_m (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshlltt.s8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_u16.c index f5af1b31087d..46af8731146c 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_u16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlltt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t inactive, uint16x8_t a, mve_pred16_t p) { return vshlltq_m_n_u16 (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshlltt.u16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlltt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t inactive, uint16x8_t a, mve_pred16_t p) { return vshlltq_m (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshlltt.u16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_u8.c index 92154d253871..ed7814c39dc4 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_m_n_u8.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlltt.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t inactive, uint8x16_t a, mve_pred16_t p) { return vshlltq_m_n_u8 (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshlltt.u8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlltt.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t inactive, uint8x16_t a, mve_pred16_t p) { return vshlltq_m (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshlltt.u8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_s16.c index ced2aa64217a..b2987300406e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vshllt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int16x8_t a) { return vshlltq_n_s16 (a, 1); } -/* { dg-final { scan-assembler "vshllt.s16" } } */ +/* +**foo1: +** ... +** vshllt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int16x8_t a) { return vshlltq (a, 1); } -/* { dg-final { scan-assembler "vshllt.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_s8.c index 9fc0cd7ced95..c5b84aa5e2e8 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_s8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vshllt.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int8x16_t a) { return vshlltq_n_s8 (a, 1); } -/* { dg-final { scan-assembler "vshllt.s8" } } */ +/* +**foo1: +** ... +** vshllt.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int8x16_t a) { return vshlltq (a, 1); } -/* { dg-final { scan-assembler "vshllt.s8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_u16.c index 47b948e24689..358a5b4a3e7f 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_u16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vshllt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint16x8_t a) { return vshlltq_n_u16 (a, 1); } -/* { dg-final { scan-assembler "vshllt.u16" } } */ +/* +**foo1: +** ... +** vshllt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint16x8_t a) { return vshlltq (a, 1); } -/* { dg-final { scan-assembler "vshllt.u16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_u8.c index eac7422a1f1c..223649215a60 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_n_u8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vshllt.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint8x16_t a) { return vshlltq_n_u8 (a, 1); } -/* { dg-final { scan-assembler "vshllt.u8" } } */ +/* +**foo1: +** ... +** vshllt.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint8x16_t a) { return vshlltq (a, 1); } -/* { dg-final { scan-assembler "vshllt.u8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_s16.c index 0e9e789c1e06..12d55e49aeda 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_s16.c @@ -1,15 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlltt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int16x8_t a, mve_pred16_t p) { - return vshlltq_x_n_s16 (a, 1, p); + return vshlltq_x_n_s16 (a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshlltt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlltt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ +int32x4_t +foo1 (int16x8_t a, mve_pred16_t p) +{ + return vshlltq_x (a, 1, p); +} + +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_s8.c index 67966bed12cd..dfad54a5eae1 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_s8.c @@ -1,15 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlltt.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int8x16_t a, mve_pred16_t p) { - return vshlltq_x_n_s8 (a, 1, p); + return vshlltq_x_n_s8 (a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshlltt.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlltt.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ +int16x8_t +foo1 (int8x16_t a, mve_pred16_t p) +{ + return vshlltq_x (a, 1, p); +} + +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_u16.c index dedc795797e4..e9077d269184 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_u16.c @@ -1,15 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlltt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint16x8_t a, mve_pred16_t p) { - return vshlltq_x_n_u16 (a, 1, p); + return vshlltq_x_n_u16 (a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshlltt.u16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlltt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ +uint32x4_t +foo1 (uint16x8_t a, mve_pred16_t p) +{ + return vshlltq_x (a, 1, p); +} + +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_u8.c index a93c69d8d984..1d4d2795fa9c 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlltq_x_n_u8.c @@ -1,15 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlltt.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint8x16_t a, mve_pred16_t p) { - return vshlltq_x_n_u8 (a, 1, p); + return vshlltq_x_n_u8 (a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshlltt.u8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlltt.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ +uint16x8_t +foo1 (uint8x16_t a, mve_pred16_t p) +{ + return vshlltq_x (a, 1, p); +} + +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_s16.c index 6c0342da0cc8..754d412c81d4 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_s16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p) { return vshlq_m_n_s16 (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshlt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p) { return vshlq_m_n (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshlt.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_s32.c index 0e472801de57..5805f90a1051 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_s32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p) { return vshlq_m_n_s32 (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshlt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p) { return vshlq_m_n (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshlt.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_s8.c index 0f9efacc7495..b69b52cf0995 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_s8.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlt.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p) { return vshlq_m_n_s8 (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshlt.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlt.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p) { return vshlq_m_n (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshlt.s8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_u16.c index 0c4d9e9b7b51..152844bf3186 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_u16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p) { return vshlq_m_n_u16 (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshlt.u16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p) { return vshlq_m_n (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshlt.u16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_u32.c index cf247f879aad..9acfd9b8c6ea 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_u32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlt.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p) { return vshlq_m_n_u32 (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshlt.u32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlt.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p) { return vshlq_m_n (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshlt.u32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_u8.c index 64bda13216db..d2e7fe59f3f8 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_n_u8.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlt.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p) { return vshlq_m_n_u8 (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshlt.u8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlt.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p) { return vshlq_m_n (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshlt.u8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_s16.c index abd747e90086..ce72e8c408bc 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_s16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlt.s16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int32_t b, mve_pred16_t p) { return vshlq_m_r_s16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshlt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlt.s16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int32_t b, mve_pred16_t p) { return vshlq_m_r (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_s32.c index 001a8d170fc6..219c7d2ca73f 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_s32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlt.s32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a, int32_t b, mve_pred16_t p) { return vshlq_m_r_s32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshlt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlt.s32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a, int32_t b, mve_pred16_t p) { return vshlq_m_r (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_s8.c index 890dd359e658..22fdee6bd6c6 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_s8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlt.s8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int32_t b, mve_pred16_t p) { return vshlq_m_r_s8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshlt.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlt.s8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int32_t b, mve_pred16_t p) { return vshlq_m_r (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_u16.c index 91574c5db260..25eca63907de 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_u16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlt.u16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, int32_t b, mve_pred16_t p) { return vshlq_m_r_u16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshlt.u16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlt.u16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, int32_t b, mve_pred16_t p) { return vshlq_m_r (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_u32.c index f6ec8797a830..9d24eda6e608 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_u32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlt.u32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t a, int32_t b, mve_pred16_t p) { return vshlq_m_r_u32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshlt.u32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlt.u32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t a, int32_t b, mve_pred16_t p) { return vshlq_m_r (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_u8.c index 37f0f4888019..2421e0b72ec4 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_r_u8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlt.u8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, int32_t b, mve_pred16_t p) { return vshlq_m_r_u8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshlt.u8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlt.u8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, int32_t b, mve_pred16_t p) { return vshlq_m_r (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_s16.c index 759379c9fc5d..c28996ad2cc6 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_s16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) { return vshlq_m_s16 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshlt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) { return vshlq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_s32.c index 4878f0b0e4f5..ca4801df9baf 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_s32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) { return vshlq_m_s32 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshlt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p) { return vshlq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_s8.c index f4ed7f5aaeb6..782eedbc7740 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_s8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) { return vshlq_m_s8 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshlt.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p) { return vshlq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_u16.c index 99ae7ed9a53c..941a6cc3578d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_u16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t inactive, uint16x8_t a, int16x8_t b, mve_pred16_t p) { return vshlq_m_u16 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshlt.u16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t inactive, uint16x8_t a, int16x8_t b, mve_pred16_t p) { return vshlq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_u32.c index 7094ba2ccd7f..75e10801ae7e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_u32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t inactive, uint32x4_t a, int32x4_t b, mve_pred16_t p) { return vshlq_m_u32 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshlt.u32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t inactive, uint32x4_t a, int32x4_t b, mve_pred16_t p) { return vshlq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_u8.c index e7c481a3b8c2..dbabcd559006 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_m_u8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t inactive, uint8x16_t a, int8x16_t b, mve_pred16_t p) { return vshlq_m_u8 (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshlt.u8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t inactive, uint8x16_t a, int8x16_t b, mve_pred16_t p) { return vshlq_m (inactive, a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_s16.c index e24bb9acd754..83dee27238aa 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vshl.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a) { return vshlq_n_s16 (a, 1); } -/* { dg-final { scan-assembler "vshl.s16" } } */ +/* +**foo1: +** ... +** vshl.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a) { return vshlq_n (a, 1); } -/* { dg-final { scan-assembler "vshl.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_s32.c index f537879249f9..6b390c8b3332 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vshl.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a) { - return vshlq_n_s32 (a, 16); + return vshlq_n_s32 (a, 1); } -/* { dg-final { scan-assembler "vshl.s32" } } */ +/* +**foo1: +** ... +** vshl.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a) { - return vshlq_n (a, 16); + return vshlq_n (a, 1); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vshl.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_s8.c index ba6ddf3f8a10..e4fd7121bff8 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_s8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vshl.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a) { return vshlq_n_s8 (a, 1); } -/* { dg-final { scan-assembler "vshl.s8" } } */ +/* +**foo1: +** ... +** vshl.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a) { return vshlq_n (a, 1); } -/* { dg-final { scan-assembler "vshl.s8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_u16.c index 730c7af40c6c..6c37303a9fe3 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_u16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vshl.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a) { - return vshlq_n_u16 (a, 11); + return vshlq_n_u16 (a, 1); } -/* { dg-final { scan-assembler "vshl.u16" } } */ +/* +**foo1: +** ... +** vshl.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a) { - return vshlq_n (a, 11); + return vshlq_n (a, 1); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vshl.u16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_u32.c index 36caf5a90326..408f756408f4 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_u32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vshl.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t a) { return vshlq_n_u32 (a, 1); } -/* { dg-final { scan-assembler "vshl.u32" } } */ +/* +**foo1: +** ... +** vshl.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t a) { return vshlq_n (a, 1); } -/* { dg-final { scan-assembler "vshl.u32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_u8.c index a5ba9805d9b9..5ecdddccadf5 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_n_u8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vshl.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a) { return vshlq_n_u8 (a, 1); } -/* { dg-final { scan-assembler "vshl.u8" } } */ +/* +**foo1: +** ... +** vshl.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a) { return vshlq_n (a, 1); } -/* { dg-final { scan-assembler "vshl.u8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_s16.c index b6d3e858d7cd..f9a8257729e3 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vshl.s16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int32_t b) { return vshlq_r_s16 (a, b); } -/* { dg-final { scan-assembler "vshl.s16" } } */ +/* +**foo1: +** ... +** vshl.s16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int32_t b) { return vshlq_r (a, b); } -/* { dg-final { scan-assembler "vshl.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_s32.c index e04e2a7bcf37..f4f8e3630593 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vshl.s32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a, int32_t b) { return vshlq_r_s32 (a, b); } -/* { dg-final { scan-assembler "vshl.s32" } } */ +/* +**foo1: +** ... +** vshl.s32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a, int32_t b) { return vshlq_r (a, b); } -/* { dg-final { scan-assembler "vshl.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_s8.c index d5e54c0a79a3..c14d012a1e28 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_s8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vshl.s8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int32_t b) { return vshlq_r_s8 (a, b); } -/* { dg-final { scan-assembler "vshl.s8" } } */ +/* +**foo1: +** ... +** vshl.s8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int32_t b) { return vshlq_r (a, b); } -/* { dg-final { scan-assembler "vshl.s8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_u16.c index 813bea0575d8..71634680deb1 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_u16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vshl.u16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, int32_t b) { return vshlq_r_u16 (a, b); } -/* { dg-final { scan-assembler "vshl.u16" } } */ +/* +**foo1: +** ... +** vshl.u16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, int32_t b) { return vshlq_r (a, b); } -/* { dg-final { scan-assembler "vshl.u16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_u32.c index 84a61e47ca73..0d47f85bc822 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_u32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vshl.u32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t a, int32_t b) { return vshlq_r_u32 (a, b); } -/* { dg-final { scan-assembler "vshl.u32" } } */ +/* +**foo1: +** ... +** vshl.u32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t a, int32_t b) { return vshlq_r (a, b); } -/* { dg-final { scan-assembler "vshl.u32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_u8.c index 01f9a7d8f197..2d64908eeca4 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_r_u8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vshl.u8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, int32_t b) { return vshlq_r_u8 (a, b); } -/* { dg-final { scan-assembler "vshl.u8" } } */ +/* +**foo1: +** ... +** vshl.u8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, int32_t b) { return vshlq_r (a, b); } -/* { dg-final { scan-assembler "vshl.u8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_s16.c index 5d3e1e5fdf9a..6158fafcdb5d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vshl.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int16x8_t b) { return vshlq_s16 (a, b); } -/* { dg-final { scan-assembler "vshl.s16" } } */ +/* +**foo1: +** ... +** vshl.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int16x8_t b) { return vshlq (a, b); } -/* { dg-final { scan-assembler "vshl.s16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_s32.c index cecd050888fa..b0b18470dea7 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vshl.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a, int32x4_t b) { return vshlq_s32 (a, b); } -/* { dg-final { scan-assembler "vshl.s32" } } */ +/* +**foo1: +** ... +** vshl.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a, int32x4_t b) { return vshlq (a, b); } -/* { dg-final { scan-assembler "vshl.s32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_s8.c index d44610f4f5bd..70b2d8061313 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_s8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vshl.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int8x16_t b) { return vshlq_s8 (a, b); } -/* { dg-final { scan-assembler "vshl.s8" } } */ +/* +**foo1: +** ... +** vshl.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int8x16_t b) { return vshlq (a, b); } -/* { dg-final { scan-assembler "vshl.s8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_u16.c index 210fa905d3d0..3ab782fa7344 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_u16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vshl.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, int16x8_t b) { return vshlq_u16 (a, b); } -/* { dg-final { scan-assembler "vshl.u16" } } */ +/* +**foo1: +** ... +** vshl.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, int16x8_t b) { return vshlq (a, b); } -/* { dg-final { scan-assembler "vshl.u16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_u32.c index 8fc596200165..f104235caee0 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_u32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vshl.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t a, int32x4_t b) { return vshlq_u32 (a, b); } -/* { dg-final { scan-assembler "vshl.u32" } } */ +/* +**foo1: +** ... +** vshl.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t a, int32x4_t b) { return vshlq (a, b); } -/* { dg-final { scan-assembler "vshl.u32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_u8.c index 8332d501640e..1a93abfefb18 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_u8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vshl.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, int8x16_t b) { return vshlq_u8 (a, b); } -/* { dg-final { scan-assembler "vshl.u8" } } */ +/* +**foo1: +** ... +** vshl.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, int8x16_t b) { return vshlq (a, b); } -/* { dg-final { scan-assembler "vshl.u8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_s16.c index 4bdbc848bb73..5ac725187e8d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_s16.c @@ -1,15 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, mve_pred16_t p) { - return vshlq_x_n_s16 (a, 1, p); + return vshlq_x_n_s16 (a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshlt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ +int16x8_t +foo1 (int16x8_t a, mve_pred16_t p) +{ + return vshlq_x_n (a, 1, p); +} + +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_s32.c index 7648d2e2c661..e5e3ab03f019 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_s32.c @@ -1,15 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a, mve_pred16_t p) { - return vshlq_x_n_s32 (a, 1, p); + return vshlq_x_n_s32 (a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshlt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ +int32x4_t +foo1 (int32x4_t a, mve_pred16_t p) +{ + return vshlq_x_n (a, 1, p); +} + +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_s8.c index 4b303e92e81c..7618d83b85bf 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_s8.c @@ -1,15 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlt.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, mve_pred16_t p) { - return vshlq_x_n_s8 (a, 1, p); + return vshlq_x_n_s8 (a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshlt.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlt.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ +int8x16_t +foo1 (int8x16_t a, mve_pred16_t p) +{ + return vshlq_x_n (a, 1, p); +} + +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_u16.c index a2b6ac2d4c00..b4f937ae8f4a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_u16.c @@ -1,15 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, mve_pred16_t p) { - return vshlq_x_n_u16 (a, 1, p); + return vshlq_x_n_u16 (a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshlt.u16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ +uint16x8_t +foo1 (uint16x8_t a, mve_pred16_t p) +{ + return vshlq_x_n (a, 1, p); +} + +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_u32.c index 59aa9dbe1823..e42270ba2934 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_u32.c @@ -1,15 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlt.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t a, mve_pred16_t p) { - return vshlq_x_n_u32 (a, 1, p); + return vshlq_x_n_u32 (a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshlt.u32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlt.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ +uint32x4_t +foo1 (uint32x4_t a, mve_pred16_t p) +{ + return vshlq_x_n (a, 1, p); +} + +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_u8.c index 64069bb17289..7e01f8b2ab51 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_n_u8.c @@ -1,15 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlt.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, mve_pred16_t p) { - return vshlq_x_n_u8 (a, 1, p); + return vshlq_x_n_u8 (a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshlt.u8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlt.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ +uint8x16_t +foo1 (uint8x16_t a, mve_pred16_t p) +{ + return vshlq_x_n (a, 1, p); +} + +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_s16.c index 61a643d64bd7..a6eeff654e34 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_s16.c @@ -1,15 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int16x8_t b, mve_pred16_t p) { - return vshlq_x_s16 (a, b, p); + return vshlq_x_s16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshlt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ +int16x8_t +foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) +{ + return vshlq_x (a, b, p); +} + +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_s32.c index 71424456f7d0..cc3c434708a8 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_s32.c @@ -1,15 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a, int32x4_t b, mve_pred16_t p) { - return vshlq_x_s32 (a, b, p); + return vshlq_x_s32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshlt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ +int32x4_t +foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) +{ + return vshlq_x (a, b, p); +} + +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_s8.c index 0d4825a03ad3..430a3ab43eda 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_s8.c @@ -1,15 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int8x16_t b, mve_pred16_t p) { - return vshlq_x_s8 (a, b, p); + return vshlq_x_s8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshlt.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ +int8x16_t +foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) +{ + return vshlq_x (a, b, p); +} + +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_u16.c index 7ce187224441..9f5d0903588a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_u16.c @@ -1,15 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, int16x8_t b, mve_pred16_t p) { - return vshlq_x_u16 (a, b, p); + return vshlq_x_u16 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshlt.u16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ +uint16x8_t +foo1 (uint16x8_t a, int16x8_t b, mve_pred16_t p) +{ + return vshlq_x (a, b, p); +} + +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_u32.c index fe02cc694a2f..32d729f69549 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_u32.c @@ -1,15 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t a, int32x4_t b, mve_pred16_t p) { - return vshlq_x_u32 (a, b, p); + return vshlq_x_u32 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshlt.u32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ +uint32x4_t +foo1 (uint32x4_t a, int32x4_t b, mve_pred16_t p) +{ + return vshlq_x (a, b, p); +} + +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_u8.c index 9611b268ca57..45e72c9dffa0 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshlq_x_u8.c @@ -1,15 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, int8x16_t b, mve_pred16_t p) { - return vshlq_x_u8 (a, b, p); + return vshlq_x_u8 (a, b, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshlt.u8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshlt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ +uint8x16_t +foo1 (uint8x16_t a, int8x16_t b, mve_pred16_t p) +{ + return vshlq_x (a, b, p); +} + +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_s16.c index d069cb0db449..ab37f2605e0b 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_s16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshrnbt.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int16x8_t b, mve_pred16_t p) { - return vshrnbq_m_n_s16 (a, b, 8, p); + return vshrnbq_m_n_s16 (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshrnbt.i16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshrnbt.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p) { - return vshrnbq_m (a, b, 8, p); + return vshrnbq_m (a, b, 1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshrnbt.i16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_s32.c index 50a450f5b52f..9fd9f8a78042 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_s32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshrnbt.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int32x4_t b, mve_pred16_t p) { - return vshrnbq_m_n_s32 (a, b, 16, p); + return vshrnbq_m_n_s32 (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshrnbt.i32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshrnbt.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p) { - return vshrnbq_m (a, b, 16, p); + return vshrnbq_m (a, b, 1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshrnbt.i32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_u16.c index e5762145e649..e9408eeb1bf5 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_u16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshrnbt.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p) { - return vshrnbq_m_n_u16 (a, b, 8, p); + return vshrnbq_m_n_u16 (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshrnbt.i16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshrnbt.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p) { - return vshrnbq_m (a, b, 8, p); + return vshrnbq_m (a, b, 1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshrnbt.i16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_u32.c index 88da8e6f3418..69699fd15ab4 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_m_n_u32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshrnbt.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p) { - return vshrnbq_m_n_u32 (a, b, 16, p); + return vshrnbq_m_n_u32 (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshrnbt.i32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshrnbt.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p) { - return vshrnbq_m (a, b, 16, p); + return vshrnbq_m (a, b, 1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshrnbt.i32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_s16.c index 7fcd9e479dc2..0320d6906276 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vshrnb.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int16x8_t b) { - return vshrnbq_n_s16 (a, b, 8); + return vshrnbq_n_s16 (a, b, 1); } -/* { dg-final { scan-assembler "vshrnb.i16" } } */ +/* +**foo1: +** ... +** vshrnb.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int16x8_t b) { - return vshrnbq (a, b, 8); + return vshrnbq (a, b, 1); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vshrnb.i16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_s32.c index 38d4fdfc05fd..aa7b107f7f93 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vshrnb.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int32x4_t b) { - return vshrnbq_n_s32 (a, b, 16); + return vshrnbq_n_s32 (a, b, 1); } -/* { dg-final { scan-assembler "vshrnb.i32" } } */ +/* +**foo1: +** ... +** vshrnb.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int32x4_t b) { - return vshrnbq (a, b, 16); + return vshrnbq (a, b, 1); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vshrnb.i32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_u16.c index ff341a9f2028..4f896469eb43 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_u16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vshrnb.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, uint16x8_t b) { - return vshrnbq_n_u16 (a, b, 8); + return vshrnbq_n_u16 (a, b, 1); } -/* { dg-final { scan-assembler "vshrnb.i16" } } */ +/* +**foo1: +** ... +** vshrnb.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, uint16x8_t b) { - return vshrnbq (a, b, 8); + return vshrnbq (a, b, 1); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vshrnb.i16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_u32.c index b891c036d36f..d3d229785429 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrnbq_n_u32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vshrnb.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, uint32x4_t b) { - return vshrnbq_n_u32 (a, b, 16); + return vshrnbq_n_u32 (a, b, 1); } -/* { dg-final { scan-assembler "vshrnb.i32" } } */ +/* +**foo1: +** ... +** vshrnb.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, uint32x4_t b) { - return vshrnbq (a, b, 16); + return vshrnbq (a, b, 1); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vshrnb.i32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_s16.c index 305354709616..77f39ac10c76 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_s16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshrntt.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int16x8_t b, mve_pred16_t p) { - return vshrntq_m_n_s16 (a, b, 8, p); + return vshrntq_m_n_s16 (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshrntt.i16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshrntt.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int16x8_t b, mve_pred16_t p) { - return vshrntq_m (a, b, 8, p); + return vshrntq_m (a, b, 1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshrntt.i16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_s32.c index 2d52f5b6bb10..462d5f446f20 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_s32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshrntt.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int32x4_t b, mve_pred16_t p) { - return vshrntq_m_n_s32 (a, b, 16, p); + return vshrntq_m_n_s32 (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshrntt.i32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshrntt.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int32x4_t b, mve_pred16_t p) { - return vshrntq_m (a, b, 16, p); + return vshrntq_m (a, b, 1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshrntt.i32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_u16.c index ed774e0b31a0..0328cc3ef93a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_u16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshrntt.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, uint16x8_t b, mve_pred16_t p) { - return vshrntq_m_n_u16 (a, b, 8, p); + return vshrntq_m_n_u16 (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshrntt.i16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshrntt.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, uint16x8_t b, mve_pred16_t p) { - return vshrntq_m (a, b, 8, p); + return vshrntq_m (a, b, 1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshrntt.i16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_u32.c index e592e96a5f9b..d4882dc2d6d3 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_m_n_u32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshrntt.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, uint32x4_t b, mve_pred16_t p) { - return vshrntq_m_n_u32 (a, b, 16, p); + return vshrntq_m_n_u32 (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshrntt.i32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshrntt.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, uint32x4_t b, mve_pred16_t p) { - return vshrntq_m (a, b, 16, p); + return vshrntq_m (a, b, 1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshrntt.i32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_s16.c index ddd9d5c05071..c9016ac124ff 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vshrnt.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int16x8_t b) { - return vshrntq_n_s16 (a, b, 8); + return vshrntq_n_s16 (a, b, 1); } -/* { dg-final { scan-assembler "vshrnt.i16" } } */ +/* +**foo1: +** ... +** vshrnt.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int16x8_t b) { - return vshrntq (a, b, 8); + return vshrntq (a, b, 1); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vshrnt.i16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_s32.c index e35dbf07fac6..6150f28d8728 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vshrnt.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int32x4_t b) { - return vshrntq_n_s32 (a, b, 16); + return vshrntq_n_s32 (a, b, 1); } -/* { dg-final { scan-assembler "vshrnt.i32" } } */ +/* +**foo1: +** ... +** vshrnt.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int32x4_t b) { - return vshrntq (a, b, 16); + return vshrntq (a, b, 1); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vshrnt.i32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_u16.c index 58a6eea561aa..75be307feaa1 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_u16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vshrnt.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, uint16x8_t b) { - return vshrntq_n_u16 (a, b, 8); + return vshrntq_n_u16 (a, b, 1); } -/* { dg-final { scan-assembler "vshrnt.i16" } } */ +/* +**foo1: +** ... +** vshrnt.i16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, uint16x8_t b) { - return vshrntq (a, b, 8); + return vshrntq (a, b, 1); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vshrnt.i16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_u32.c index ec0c10007ff8..9b9e534e3d2e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrntq_n_u32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vshrnt.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, uint32x4_t b) { - return vshrntq_n_u32 (a, b, 16); + return vshrntq_n_u32 (a, b, 1); } -/* { dg-final { scan-assembler "vshrnt.i32" } } */ +/* +**foo1: +** ... +** vshrnt.i32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, uint32x4_t b) { - return vshrntq (a, b, 16); + return vshrntq (a, b, 1); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vshrnt.i32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_s16.c index 00f236c6d74b..ed1833b86732 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_s16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshrt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p) { - return vshrq_m_n_s16 (inactive, a, 16, p); + return vshrq_m_n_s16 (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshrt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshrt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p) { - return vshrq_m (inactive, a, 16, p); + return vshrq_m (inactive, a, 1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshrt.s16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_s32.c index 1d1be501e16f..880cd9e3545b 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_s32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshrt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p) { - return vshrq_m_n_s32 (inactive, a, 32, p); + return vshrq_m_n_s32 (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshrt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshrt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p) { - return vshrq_m (inactive, a, 32, p); + return vshrq_m (inactive, a, 1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshrt.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_s8.c index 7410ba9c8e94..53fc84857b71 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_s8.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshrt.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p) { - return vshrq_m_n_s8 (inactive, a, 8, p); + return vshrq_m_n_s8 (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshrt.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshrt.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p) { - return vshrq_m (inactive, a, 8, p); + return vshrq_m (inactive, a, 1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshrt.s8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_u16.c index 4b0dd59eefa4..c3e311454b69 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_u16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshrt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p) { - return vshrq_m_n_u16 (inactive, a, 16, p); + return vshrq_m_n_u16 (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshrt.u16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshrt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p) { - return vshrq_m (inactive, a, 16, p); + return vshrq_m (inactive, a, 1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshrt.u16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_u32.c index 47ccc1b74990..6c0471f0120f 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_u32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshrt.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p) { - return vshrq_m_n_u32 (inactive, a, 32, p); + return vshrq_m_n_u32 (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshrt.u32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshrt.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p) { - return vshrq_m (inactive, a, 32, p); + return vshrq_m (inactive, a, 1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshrt.u32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_u8.c index 44f96027a04d..5621608a2ebd 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_m_n_u8.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshrt.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p) { - return vshrq_m_n_u8 (inactive, a, 8, p); + return vshrq_m_n_u8 (inactive, a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshrt.u8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshrt.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p) { - return vshrq_m (inactive, a, 8, p); + return vshrq_m (inactive, a, 1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshrt.u8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_s16.c index 051fa4a14a11..59a589b21a15 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vshr.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a) { - return vshrq_n_s16 (a, 16); + return vshrq_n_s16 (a, 1); } -/* { dg-final { scan-assembler "vshr.s16" } } */ +/* +**foo1: +** ... +** vshr.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a) { - return vshrq (a, 16); + return vshrq (a, 1); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vshr.s16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_s32.c index 65a0b2e62240..1666b6657f2b 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vshr.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a) { - return vshrq_n_s32 (a, 32); + return vshrq_n_s32 (a, 1); } -/* { dg-final { scan-assembler "vshr.s32" } } */ +/* +**foo1: +** ... +** vshr.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a) { - return vshrq (a, 32); + return vshrq (a, 1); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vshr.s32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_s8.c index c5adcc1a4652..1ce29185bcf9 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_s8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vshr.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a) { - return vshrq_n_s8 (a, 8); + return vshrq_n_s8 (a, 1); } -/* { dg-final { scan-assembler "vshr.s8" } } */ +/* +**foo1: +** ... +** vshr.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a) { - return vshrq (a, 8); + return vshrq (a, 1); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vshr.s8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_u16.c index 1b68fafea8af..c2dbe6e5041a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_u16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vshr.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a) { - return vshrq_n_u16 (a, 16); + return vshrq_n_u16 (a, 1); } -/* { dg-final { scan-assembler "vshr.u16" } } */ +/* +**foo1: +** ... +** vshr.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a) { - return vshrq (a, 16); + return vshrq (a, 1); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vshr.u16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_u32.c index 8b798b793c0d..15d231c217fc 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_u32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vshr.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t a) { - return vshrq_n_u32 (a, 32); + return vshrq_n_u32 (a, 1); } -/* { dg-final { scan-assembler "vshr.u32" } } */ +/* +**foo1: +** ... +** vshr.u32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t a) { - return vshrq (a, 32); + return vshrq (a, 1); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vshr.u32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_u8.c index 14cdf5917e24..19924e0fcdb0 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_n_u8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vshr.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a) { - return vshrq_n_u8 (a, 8); + return vshrq_n_u8 (a, 1); } -/* { dg-final { scan-assembler "vshr.u8" } } */ +/* +**foo1: +** ... +** vshr.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a) { - return vshrq (a, 8); + return vshrq (a, 1); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vshr.u8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_s16.c index 4652693d75cf..fc26fd8fd3b2 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_s16.c @@ -1,15 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshrt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, mve_pred16_t p) { - return vshrq_x_n_s16 (a, 16, p); + return vshrq_x_n_s16 (a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshrt.s16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshrt.s16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ +int16x8_t +foo1 (int16x8_t a, mve_pred16_t p) +{ + return vshrq_x (a, 1, p); +} + +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_s32.c index 43fa28a1f8d0..bc9ae54faad6 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_s32.c @@ -1,15 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshrt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a, mve_pred16_t p) { - return vshrq_x_n_s32 (a, 32, p); + return vshrq_x_n_s32 (a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshrt.s32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshrt.s32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ +int32x4_t +foo1 (int32x4_t a, mve_pred16_t p) +{ + return vshrq_x (a, 1, p); +} + +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_s8.c index 042bf488284c..391ced240790 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_s8.c @@ -1,15 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshrt.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, mve_pred16_t p) { - return vshrq_x_n_s8 (a, 8, p); + return vshrq_x_n_s8 (a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshrt.s8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshrt.s8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ +int8x16_t +foo1 (int8x16_t a, mve_pred16_t p) +{ + return vshrq_x (a, 1, p); +} + +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_u16.c index d627565fe84c..eddb977fa839 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_u16.c @@ -1,15 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshrt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, mve_pred16_t p) { - return vshrq_x_n_u16 (a, 16, p); + return vshrq_x_n_u16 (a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshrt.u16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshrt.u16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ +uint16x8_t +foo1 (uint16x8_t a, mve_pred16_t p) +{ + return vshrq_x (a, 1, p); +} + +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_u8.c index 0f26e7b9efc4..6867668d1ce2 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vshrq_x_n_u8.c @@ -1,15 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshrt.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, mve_pred16_t p) { - return vshrq_x_n_u8 (a, 8, p); + return vshrq_x_n_u8 (a, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vshrt.u8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vshrt.u8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ +uint8x16_t +foo1 (uint8x16_t a, mve_pred16_t p) +{ + return vshrq_x (a, 1, p); +} + +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_s16.c index 49d342e7c176..23b346b1cab8 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_s16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vslit.16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int16x8_t b, mve_pred16_t p) { - return vsliq_m_n_s16 (a, b, 15, p); + return vsliq_m_n_s16 (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vslit.16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vslit.16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) { - return vsliq_m (a, b, 15, p); + return vsliq_m (a, b, 1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vslit.16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_s32.c index f0f7619dd0a8..d640e1f8df40 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_s32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vslit.32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a, int32x4_t b, mve_pred16_t p) { - return vsliq_m_n_s32 (a, b, 31, p); + return vsliq_m_n_s32 (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vslit.32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vslit.32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) { - return vsliq_m (a, b, 31, p); + return vsliq_m (a, b, 1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vslit.32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_s8.c index 12d295e70f67..14b1afa1d01b 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_s8.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vslit.8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int8x16_t b, mve_pred16_t p) { - return vsliq_m_n_s8 (a, b, 7, p); + return vsliq_m_n_s8 (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vslit.8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vslit.8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) { - return vsliq_m (a, b, 7, p); + return vsliq_m (a, b, 1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vslit.8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_u16.c index 78cdbdf39506..521abbf46942 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_u16.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vslit.16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p) { - return vsliq_m_n_u16 (a, b, 15, p); + return vsliq_m_n_u16 (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vslit.16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vslit.16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p) { - return vsliq_m (a, b, 15, p); + return vsliq_m (a, b, 1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vslit.16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_u32.c index 62e9cfd9f310..951204a31a0e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_u32.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vslit.32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p) { - return vsliq_m_n_u32 (a, b, 31, p); + return vsliq_m_n_u32 (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vslit.32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vslit.32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p) { - return vsliq_m (a, b, 31, p); + return vsliq_m (a, b, 1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vslit.32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_u8.c index f86fea32a903..8b893a8c4d2f 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_m_n_u8.c @@ -1,23 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vslit.8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p) { - return vsliq_m_n_u8 (a, b, 7, p); + return vsliq_m_n_u8 (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vslit.8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vslit.8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p) { - return vsliq_m (a, b, 7, p); + return vsliq_m (a, b, 1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vslit.8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_s16.c index 2c5f82bb3177..a6c86764eab6 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vsli.16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int16x8_t b) { - return vsliq_n_s16 (a, b, 15); + return vsliq_n_s16 (a, b, 1); } -/* { dg-final { scan-assembler "vsli.16" } } */ +/* +**foo1: +** ... +** vsli.16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int16x8_t b) { - return vsliq (a, b, 15); + return vsliq (a, b, 1); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vsli.16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_s32.c index 0738fd612035..301cdd463b5c 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vsli.32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a, int32x4_t b) { - return vsliq_n_s32 (a, b, 31); + return vsliq_n_s32 (a, b, 1); } -/* { dg-final { scan-assembler "vsli.32" } } */ +/* +**foo1: +** ... +** vsli.32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a, int32x4_t b) { - return vsliq (a, b, 31); + return vsliq (a, b, 1); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vsli.32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_s8.c index 25f2f761c3cc..2a26f7f444b4 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_s8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vsli.8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int8x16_t b) { - return vsliq_n_s8 (a, b, 7); + return vsliq_n_s8 (a, b, 1); } -/* { dg-final { scan-assembler "vsli.8" } } */ +/* +**foo1: +** ... +** vsli.8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int8x16_t b) { - return vsliq (a, b, 7); + return vsliq (a, b, 1); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vsli.8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_u16.c index 25bbcd8f3fa6..b71572a232e2 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_u16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vsli.16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, uint16x8_t b) { - return vsliq_n_u16 (a, b, 15); + return vsliq_n_u16 (a, b, 1); } -/* { dg-final { scan-assembler "vsli.16" } } */ +/* +**foo1: +** ... +** vsli.16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, uint16x8_t b) { - return vsliq (a, b, 15); + return vsliq (a, b, 1); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vsli.16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_u32.c index 970e069cabf3..ecafb61b487c 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_u32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vsli.32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t a, uint32x4_t b) { - return vsliq_n_u32 (a, b, 31); + return vsliq_n_u32 (a, b, 1); } -/* { dg-final { scan-assembler "vsli.32" } } */ +/* +**foo1: +** ... +** vsli.32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t a, uint32x4_t b) { - return vsliq (a, b, 31); + return vsliq (a, b, 1); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vsli.32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_u8.c index c24e354a9575..e20ec7e030ed 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsliq_n_u8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vsli.8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, uint8x16_t b) { - return vsliq_n_u8 (a, b, 7); + return vsliq_n_u8 (a, b, 1); } -/* { dg-final { scan-assembler "vsli.8" } } */ +/* +**foo1: +** ... +** vsli.8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, uint8x16_t b) { - return vsliq (a, b, 7); + return vsliq (a, b, 1); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vsli.8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_s16.c index 799232a8dc17..086f5f86fc18 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_s16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vsrit.16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int16x8_t b, mve_pred16_t p) { - return vsriq_m_n_s16 (a, b, 4, p); + return vsriq_m_n_s16 (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vsrit.16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vsrit.16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p) { - return vsriq_m (a, b, 4, p); + return vsriq_m (a, b, 1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_s32.c index 7e019782c881..90267f67e54a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_s32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vsrit.32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a, int32x4_t b, mve_pred16_t p) { - return vsriq_m_n_s32 (a, b, 2, p); + return vsriq_m_n_s32 (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vsrit.32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vsrit.32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p) { - return vsriq_m (a, b, 2, p); + return vsriq_m (a, b, 1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_s8.c index 8fa3e757f6de..6c7552905b45 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_s8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vsrit.8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int8x16_t b, mve_pred16_t p) { - return vsriq_m_n_s8 (a, b, 4, p); + return vsriq_m_n_s8 (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vsrit.8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vsrit.8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p) { - return vsriq_m (a, b, 4, p); + return vsriq_m (a, b, 1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_u16.c index 5e2c4a3deb3a..624732b0c918 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_u16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vsrit.16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p) { - return vsriq_m_n_u16 (a, b, 4, p); + return vsriq_m_n_u16 (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vsrit.16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vsrit.16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p) { - return vsriq_m (a, b, 4, p); + return vsriq_m (a, b, 1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_u32.c index 368115e27b2a..48abe8b9c0d7 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_u32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vsrit.32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p) { - return vsriq_m_n_u32 (a, b, 4, p); + return vsriq_m_n_u32 (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vsrit.32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vsrit.32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p) { - return vsriq_m (a, b, 4, p); + return vsriq_m (a, b, 1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_u8.c index 54db7d788360..b1f9ecd0c9fb 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_m_n_u8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vsrit.8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p) { - return vsriq_m_n_u8 (a, b, 4, p); + return vsriq_m_n_u8 (a, b, 1, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vsrit.8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vsrit.8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p) { - return vsriq_m (a, b, 4, p); + return vsriq_m (a, b, 1, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vpst" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_s16.c index 75f57ae76a73..2f8bde64ff59 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_s16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vsri.16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, int16x8_t b) { - return vsriq_n_s16 (a, b, 4); + return vsriq_n_s16 (a, b, 1); } -/* { dg-final { scan-assembler "vsri.16" } } */ +/* +**foo1: +** ... +** vsri.16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, int16x8_t b) { - return vsriq (a, b, 4); + return vsriq (a, b, 1); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vsri.16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_s32.c index 46d9ead1e9a7..a95e6dae8f70 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vsri.32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a, int32x4_t b) { - return vsriq_n_s32 (a, b, 4); + return vsriq_n_s32 (a, b, 1); } -/* { dg-final { scan-assembler "vsri.32" } } */ +/* +**foo1: +** ... +** vsri.32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a, int32x4_t b) { - return vsriq (a, b, 4); + return vsriq (a, b, 1); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vsri.32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_s8.c index 3dcc5a34f906..7726a7ed934b 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_s8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vsri.8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, int8x16_t b) { - return vsriq_n_s8 (a, b, 4); + return vsriq_n_s8 (a, b, 1); } -/* { dg-final { scan-assembler "vsri.8" } } */ +/* +**foo1: +** ... +** vsri.8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, int8x16_t b) { - return vsriq (a, b, 4); + return vsriq (a, b, 1); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vsri.8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_u16.c index ff6c4f0c277a..4d8d5930b492 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_u16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vsri.16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, uint16x8_t b) { - return vsriq_n_u16 (a, b, 4); + return vsriq_n_u16 (a, b, 1); } -/* { dg-final { scan-assembler "vsri.16" } } */ +/* +**foo1: +** ... +** vsri.16 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, uint16x8_t b) { - return vsriq (a, b, 4); + return vsriq (a, b, 1); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vsri.16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_u32.c index f6b79b262351..83a6b13ef403 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_u32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vsri.32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t a, uint32x4_t b) { - return vsriq_n_u32 (a, b, 4); + return vsriq_n_u32 (a, b, 1); } -/* { dg-final { scan-assembler "vsri.32" } } */ +/* +**foo1: +** ... +** vsri.32 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t a, uint32x4_t b) { - return vsriq (a, b, 4); + return vsriq (a, b, 1); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vsri.32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_u8.c index 4c56b3ab00dc..0bd9ac5ddfda 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsriq_n_u8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vsri.8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, uint8x16_t b) { - return vsriq_n_u8 (a, b, 4); + return vsriq_n_u8 (a, b, 1); } -/* { dg-final { scan-assembler "vsri.8" } } */ +/* +**foo1: +** ... +** vsri.8 q[0-9]+, q[0-9]+, #[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, uint8x16_t b) { - return vsriq (a, b, 4); + return vsriq (a, b, 1); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vsri.8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_f16.c index 312b7464f17b..1fa02f00f539 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_f16.c @@ -1,25 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" -void -foo (float16_t * addr, float16x8_t value) -{ - vst1q_f16 (addr, value); -} +#ifdef __cplusplus +extern "C" { +#endif +/* +**foo: +** ... +** vstrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +*/ void -foo1 (float16_t * addr, float16x8_t value) +foo (float16_t *base, float16x8_t value) { - vst1q (addr, value); + return vst1q_f16 (base, value); } -/* { dg-final { scan-assembler-times "vstrh.16" 2 } } */ +/* +**foo1: +** ... +** vstrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +*/ void -foo2 (float16_t a, float16x8_t x) +foo1 (float16_t *base, float16x8_t value) { - vst1q (&a, x); + return vst1q (base, value); } + +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_f32.c index a6ae1cef2d46..67cc3ae3b477 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_f32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vstrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +*/ void -foo (float32_t * addr, float32x4_t value) +foo (float32_t *base, float32x4_t value) { - vst1q_f32 (addr, value); + return vst1q_f32 (base, value); } -/* { dg-final { scan-assembler "vstrw.32" } } */ +/* +**foo1: +** ... +** vstrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +*/ void -foo1 (float32_t * addr, float32x4_t value) +foo1 (float32_t *base, float32x4_t value) { - vst1q (addr, value); + return vst1q (base, value); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vstrw.32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_f16.c index f6db22d481a2..06b2bd3910dd 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_f16.c @@ -1,21 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +*/ void -foo (float16_t * addr, float16x8_t value, mve_pred16_t p) +foo (float16_t *base, float16x8_t value, mve_pred16_t p) { - vst1q_p_f16 (addr, value, p); + return vst1q_p_f16 (base, value, p); } -/* { dg-final { scan-assembler "vstrht.16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +*/ void -foo1 (float16_t * addr, float16x8_t value, mve_pred16_t p) +foo1 (float16_t *base, float16x8_t value, mve_pred16_t p) { - vst1q_p (addr, value, p); + return vst1q_p (base, value, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vstrht.16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_f32.c index 17e7f9c5dfd4..e492a705ea0e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_f32.c @@ -1,21 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +*/ void -foo (float32_t * addr, float32x4_t value, mve_pred16_t p) +foo (float32_t *base, float32x4_t value, mve_pred16_t p) { - vst1q_p_f32 (addr, value, p); + return vst1q_p_f32 (base, value, p); } -/* { dg-final { scan-assembler "vstrwt.32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +*/ void -foo1 (float32_t * addr, float32x4_t value, mve_pred16_t p) +foo1 (float32_t *base, float32x4_t value, mve_pred16_t p) { - vst1q_p (addr, value, p); + return vst1q_p (base, value, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vstrwt.32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_s16.c index b142fc3b021e..7b76d1d76871 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_s16.c @@ -1,21 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +*/ void -foo (int16_t * addr, int16x8_t value, mve_pred16_t p) +foo (int16_t *base, int16x8_t value, mve_pred16_t p) { - vst1q_p_s16 (addr, value, p); + return vst1q_p_s16 (base, value, p); } -/* { dg-final { scan-assembler "vstrht.16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +*/ void -foo1 (int16_t * addr, int16x8_t value, mve_pred16_t p) +foo1 (int16_t *base, int16x8_t value, mve_pred16_t p) { - vst1q_p (addr, value, p); + return vst1q_p (base, value, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vstrht.16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_s32.c index 6334462e2301..4ad32a68a964 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_s32.c @@ -1,21 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +*/ void -foo (int32_t * addr, int32x4_t value, mve_pred16_t p) +foo (int32_t *base, int32x4_t value, mve_pred16_t p) { - vst1q_p_s32 (addr, value, p); + return vst1q_p_s32 (base, value, p); } -/* { dg-final { scan-assembler "vstrwt.32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +*/ void -foo1 (int32_t * addr, int32x4_t value, mve_pred16_t p) +foo1 (int32_t *base, int32x4_t value, mve_pred16_t p) { - vst1q_p (addr, value, p); + return vst1q_p (base, value, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vstrwt.32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_s8.c index 1f3f03438203..2425b9cec002 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_s8.c @@ -1,21 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vstrbt.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +*/ void -foo (int8_t * addr, int8x16_t value, mve_pred16_t p) +foo (int8_t *base, int8x16_t value, mve_pred16_t p) { - vst1q_p_s8 (addr, value, p); + return vst1q_p_s8 (base, value, p); } -/* { dg-final { scan-assembler "vstrbt.8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vstrbt.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +*/ void -foo1 (int8_t * addr, int8x16_t value, mve_pred16_t p) +foo1 (int8_t *base, int8x16_t value, mve_pred16_t p) { - vst1q_p (addr, value, p); + return vst1q_p (base, value, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vstrbt.8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_u16.c index 331cd34cdcec..c0065ef6ff5d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_u16.c @@ -1,21 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +*/ void -foo (uint16_t * addr, uint16x8_t value, mve_pred16_t p) +foo (uint16_t *base, uint16x8_t value, mve_pred16_t p) { - vst1q_p_u16 (addr, value, p); + return vst1q_p_u16 (base, value, p); } -/* { dg-final { scan-assembler "vstrht.16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vstrht.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +*/ void -foo1 (uint16_t * addr, uint16x8_t value, mve_pred16_t p) +foo1 (uint16_t *base, uint16x8_t value, mve_pred16_t p) { - vst1q_p (addr, value, p); + return vst1q_p (base, value, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vstrht.16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_u32.c index 27836c324510..c41c4184b9b8 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_u32.c @@ -1,21 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +*/ void -foo (uint32_t * addr, uint32x4_t value, mve_pred16_t p) +foo (uint32_t *base, uint32x4_t value, mve_pred16_t p) { - vst1q_p_u32 (addr, value, p); + return vst1q_p_u32 (base, value, p); } -/* { dg-final { scan-assembler "vstrwt.32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vstrwt.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +*/ void -foo1 (uint32_t * addr, uint32x4_t value, mve_pred16_t p) +foo1 (uint32_t *base, uint32x4_t value, mve_pred16_t p) { - vst1q_p (addr, value, p); + return vst1q_p (base, value, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vstrwt.32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_u8.c index bfbc542dc353..1cd3a781357b 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_p_u8.c @@ -1,21 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vstrbt.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +*/ void -foo (uint8_t * addr, uint8x16_t value, mve_pred16_t p) +foo (uint8_t *base, uint8x16_t value, mve_pred16_t p) { - vst1q_p_u8 (addr, value, p); + return vst1q_p_u8 (base, value, p); } -/* { dg-final { scan-assembler "vstrbt.8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vstrbt.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +*/ void -foo1 (uint8_t * addr, uint8x16_t value, mve_pred16_t p) +foo1 (uint8_t *base, uint8x16_t value, mve_pred16_t p) { - vst1q_p (addr, value, p); + return vst1q_p (base, value, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vstrbt.8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_s16.c index cd14e2c408f1..052959b2083d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_s16.c @@ -1,25 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" -void -foo (int16_t * addr, int16x8_t value) -{ - vst1q_s16 (addr, value); -} +#ifdef __cplusplus +extern "C" { +#endif +/* +**foo: +** ... +** vstrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +*/ void -foo1 (int16_t * addr, int16x8_t value) +foo (int16_t *base, int16x8_t value) { - vst1q (addr, value); + return vst1q_s16 (base, value); } -/* { dg-final { scan-assembler-times "vstrh.16" 2 } } */ +/* +**foo1: +** ... +** vstrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +*/ void -foo2 (int16_t a, int16x8_t x) +foo1 (int16_t *base, int16x8_t value) { - vst1q (&a, x); + return vst1q (base, value); } + +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_s32.c index e07e8a30f9d3..444ad07f4ef6 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_s32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vstrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +*/ void -foo (int32_t * addr, int32x4_t value) +foo (int32_t *base, int32x4_t value) { - vst1q_s32 (addr, value); + return vst1q_s32 (base, value); } -/* { dg-final { scan-assembler "vstrw.32" } } */ +/* +**foo1: +** ... +** vstrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +*/ void -foo1 (int32_t * addr, int32x4_t value) +foo1 (int32_t *base, int32x4_t value) { - vst1q (addr, value); + return vst1q (base, value); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vstrw.32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_s8.c index 0004c80963ec..684ff0aca5b0 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_s8.c @@ -1,25 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" -void -foo (int8_t * addr, int8x16_t value) -{ - vst1q_s8 (addr, value); -} +#ifdef __cplusplus +extern "C" { +#endif +/* +**foo: +** ... +** vstrb.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +*/ void -foo1 (int8_t * addr, int8x16_t value) +foo (int8_t *base, int8x16_t value) { - vst1q (addr, value); + return vst1q_s8 (base, value); } -/* { dg-final { scan-assembler-times "vstrb.8" 2 } } */ +/* +**foo1: +** ... +** vstrb.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +*/ void -foo2 (int8_t a, int8x16_t x) +foo1 (int8_t *base, int8x16_t value) { - vst1q (&a, x); + return vst1q (base, value); } + +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_u16.c index 248e7ce82b09..1fea2de1e76c 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_u16.c @@ -1,25 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" -void -foo (uint16_t * addr, uint16x8_t value) -{ - vst1q_u16 (addr, value); -} +#ifdef __cplusplus +extern "C" { +#endif +/* +**foo: +** ... +** vstrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +*/ void -foo1 (uint16_t * addr, uint16x8_t value) +foo (uint16_t *base, uint16x8_t value) { - vst1q (addr, value); + return vst1q_u16 (base, value); } -/* { dg-final { scan-assembler-times "vstrh.16" 2 } } */ +/* +**foo1: +** ... +** vstrh.16 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +*/ void -foo2 (uint16_t a, uint16x8_t x) +foo1 (uint16_t *base, uint16x8_t value) { - vst1q (&a, x); + return vst1q (base, value); } + +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_u32.c index d1fdf8897b5f..64c43c59d473 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_u32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vstrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +*/ void -foo (uint32_t * addr, uint32x4_t value) +foo (uint32_t *base, uint32x4_t value) { - vst1q_u32 (addr, value); + return vst1q_u32 (base, value); } -/* { dg-final { scan-assembler "vstrw.32" } } */ +/* +**foo1: +** ... +** vstrw.32 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +*/ void -foo1 (uint32_t * addr, uint32x4_t value) +foo1 (uint32_t *base, uint32x4_t value) { - vst1q (addr, value); + return vst1q (base, value); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vstrw.32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_u8.c index f8b48a69903a..5517611bba63 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_u8.c @@ -1,25 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" -void -foo (uint8_t * addr, uint8x16_t value) -{ - vst1q_u8 (addr, value); -} +#ifdef __cplusplus +extern "C" { +#endif +/* +**foo: +** ... +** vstrb.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +*/ void -foo1 (uint8_t * addr, uint8x16_t value) +foo (uint8_t *base, uint8x16_t value) { - vst1q (addr, value); + return vst1q_u8 (base, value); } -/* { dg-final { scan-assembler-times "vstrb.8" 2 } } */ +/* +**foo1: +** ... +** vstrb.8 q[0-9]+, \[(?:ip|fp|r[0-9]+)\](?: @.*|) +** ... +*/ void -foo2 (uint8_t a, uint8x16_t x) +foo1 (uint8_t *base, uint8x16_t value) { - vst1q (&a, x); + return vst1q (base, value); } + +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_p_s64.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_p_s64.c index c694e2b6ad39..25a889dd1f00 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_p_s64.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_p_s64.c @@ -1,21 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vstrdt.u64 q[0-9]+, \[q[0-9]+, #[0-9]+\](?: @.*|) +** ... +*/ void -foo (uint64x2_t addr, const int offset, int64x2_t value, mve_pred16_t p) +foo (uint64x2_t addr, int64x2_t value, mve_pred16_t p) { - vstrdq_scatter_base_p_s64 (addr, 8, value, p); + return vstrdq_scatter_base_p_s64 (addr, 0, value, p); } -/* { dg-final { scan-assembler "vstrdt.u64" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vstrdt.u64 q[0-9]+, \[q[0-9]+, #[0-9]+\](?: @.*|) +** ... +*/ void -foo1 (uint64x2_t addr, const int offset, int64x2_t value, mve_pred16_t p) +foo1 (uint64x2_t addr, int64x2_t value, mve_pred16_t p) { - vstrdq_scatter_base_p (addr, 8, value, p); + return vstrdq_scatter_base_p (addr, 0, value, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vstrdt.u64" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_p_u64.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_p_u64.c index 6e8507c81d97..f0731f69a092 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_p_u64.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_p_u64.c @@ -1,21 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vstrdt.u64 q[0-9]+, \[q[0-9]+, #[0-9]+\](?: @.*|) +** ... +*/ void -foo (uint64x2_t addr, const int offset, uint64x2_t value, mve_pred16_t p) +foo (uint64x2_t addr, uint64x2_t value, mve_pred16_t p) { - vstrdq_scatter_base_p_u64 (addr, 8, value, p); + return vstrdq_scatter_base_p_u64 (addr, 0, value, p); } -/* { dg-final { scan-assembler "vstrdt.u64" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vstrdt.u64 q[0-9]+, \[q[0-9]+, #[0-9]+\](?: @.*|) +** ... +*/ void -foo1 (uint64x2_t addr, const int offset, uint64x2_t value, mve_pred16_t p) +foo1 (uint64x2_t addr, uint64x2_t value, mve_pred16_t p) { - vstrdq_scatter_base_p (addr, 8, value, p); + return vstrdq_scatter_base_p (addr, 0, value, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vstrdt.u64" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_s64.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_s64.c index b9aac8036d47..31cdec9ba0ae 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_s64.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_s64.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vstrd.u64 q[0-9]+, \[q[0-9]+, #[0-9]+\](?: @.*|) +** ... +*/ void -foo (uint64x2_t addr, const int offset, int64x2_t value) +foo (uint64x2_t addr, int64x2_t value) { - vstrdq_scatter_base_s64 (addr, 1016, value); + return vstrdq_scatter_base_s64 (addr, 0, value); } -/* { dg-final { scan-assembler "vstrd.u64" } } */ +/* +**foo1: +** ... +** vstrd.u64 q[0-9]+, \[q[0-9]+, #[0-9]+\](?: @.*|) +** ... +*/ void -foo1 (uint64x2_t addr, const int offset, int64x2_t value) +foo1 (uint64x2_t addr, int64x2_t value) { - vstrdq_scatter_base (addr, 1016, value); + return vstrdq_scatter_base (addr, 0, value); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vstrd.u64" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_u64.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_u64.c index 888d4e0c031f..8f0195c9e8f3 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_u64.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_u64.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vstrd.u64 q[0-9]+, \[q[0-9]+, #[0-9]+\](?: @.*|) +** ... +*/ void -foo (uint64x2_t addr, const int offset, uint64x2_t value) +foo (uint64x2_t addr, uint64x2_t value) { - vstrdq_scatter_base_u64 (addr, 8, value); + return vstrdq_scatter_base_u64 (addr, 0, value); } -/* { dg-final { scan-assembler "vstrd.u64" } } */ +/* +**foo1: +** ... +** vstrd.u64 q[0-9]+, \[q[0-9]+, #[0-9]+\](?: @.*|) +** ... +*/ void -foo1 (uint64x2_t addr, const int offset, uint64x2_t value) +foo1 (uint64x2_t addr, uint64x2_t value) { - vstrdq_scatter_base (addr, 8, value); + return vstrdq_scatter_base (addr, 0, value); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vstrd.u64" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_s64.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_s64.c index 319188b706fb..8f19ede4e1ae 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_s64.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_s64.c @@ -1,19 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vstrdt.u64 q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?: @.*|) +** ... +*/ void -foo (uint64x2_t * addr, const int offset, int64x2_t value, mve_pred16_t p) +foo (uint64x2_t *addr, int64x2_t value, mve_pred16_t p) { - vstrdq_scatter_base_wb_p_s64 (addr, 8, value, p); + return vstrdq_scatter_base_wb_p_s64 (addr, 0, value, p); } + +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vstrdt.u64 q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?: @.*|) +** ... +*/ void -foo1 (uint64x2_t * addr, const int offset, int64x2_t value, mve_pred16_t p) +foo1 (uint64x2_t *addr, int64x2_t value, mve_pred16_t p) { - vstrdq_scatter_base_wb_p (addr, 8, value, p); + return vstrdq_scatter_base_wb_p (addr, 0, value, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler-times "vstrdt.u64\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" 2 } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_u64.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_u64.c index 940b5421c840..41958c961f48 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_u64.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_p_u64.c @@ -1,19 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vstrdt.u64 q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?: @.*|) +** ... +*/ void -foo (uint64x2_t * addr, const int offset, uint64x2_t value, mve_pred16_t p) +foo (uint64x2_t *addr, uint64x2_t value, mve_pred16_t p) { - vstrdq_scatter_base_wb_p_u64 (addr, 8, value, p); + return vstrdq_scatter_base_wb_p_u64 (addr, 0, value, p); } + +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vstrdt.u64 q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?: @.*|) +** ... +*/ void -foo1 (uint64x2_t * addr, const int offset, uint64x2_t value, mve_pred16_t p) +foo1 (uint64x2_t *addr, uint64x2_t value, mve_pred16_t p) { - vstrdq_scatter_base_wb_p (addr, 8, value, p); + return vstrdq_scatter_base_wb_p (addr, 0, value, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler-times "vstrdt.u64\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" 2 } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_s64.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_s64.c index 33926d5c9e2e..fc06db1c2029 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_s64.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_s64.c @@ -1,19 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vstrd.u64 q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?: @.*|) +** ... +*/ void -foo (uint64x2_t * addr, const int offset, int64x2_t value) +foo (uint64x2_t *addr, int64x2_t value) { - vstrdq_scatter_base_wb_s64 (addr, 8, value); + return vstrdq_scatter_base_wb_s64 (addr, 0, value); } + +/* +**foo1: +** ... +** vstrd.u64 q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?: @.*|) +** ... +*/ void -foo1 (uint64x2_t * addr, const int offset, int64x2_t value) +foo1 (uint64x2_t *addr, int64x2_t value) { - vstrdq_scatter_base_wb (addr, 8, value); + return vstrdq_scatter_base_wb (addr, 0, value); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler-times "vstrd.u64\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" 2 } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_u64.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_u64.c index b7ffcf9b5dd1..c6529e617e33 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_u64.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_base_wb_u64.c @@ -1,19 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vstrd.u64 q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?: @.*|) +** ... +*/ void -foo (uint64x2_t * addr, const int offset, uint64x2_t value) +foo (uint64x2_t *addr, uint64x2_t value) { - vstrdq_scatter_base_wb_u64 (addr, 8, value); + return vstrdq_scatter_base_wb_u64 (addr, 0, value); } + +/* +**foo1: +** ... +** vstrd.u64 q[0-9]+, \[q[0-9]+, #[0-9]+\]!(?: @.*|) +** ... +*/ void -foo1 (uint64x2_t * addr, const int offset, uint64x2_t value) +foo1 (uint64x2_t *addr, uint64x2_t value) { - vstrdq_scatter_base_wb (addr, 8, value); + return vstrdq_scatter_base_wb (addr, 0, value); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler-times "vstrd.u64\tq\[0-9\]+, \\\[q\[0-9\]+, #\[0-9\]+\\\]!" 2 } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_p_s64.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_p_s64.c index 7ebf858f8160..754fb59df4cf 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_p_s64.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_p_s64.c @@ -1,21 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vstrdt.64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +** ... +*/ void -foo (int64_t * base, uint64x2_t offset, int64x2_t value, mve_pred16_t p) +foo (int64_t *base, uint64x2_t offset, int64x2_t value, mve_pred16_t p) { - vstrdq_scatter_offset_p_s64 (base, offset, value, p); + return vstrdq_scatter_offset_p_s64 (base, offset, value, p); } -/* { dg-final { scan-assembler "vstrdt.64" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vstrdt.64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +** ... +*/ void -foo1 (int64_t * base, uint64x2_t offset, int64x2_t value, mve_pred16_t p) +foo1 (int64_t *base, uint64x2_t offset, int64x2_t value, mve_pred16_t p) { - vstrdq_scatter_offset_p (base, offset, value, p); + return vstrdq_scatter_offset_p (base, offset, value, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vstrdt.64" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_p_u64.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_p_u64.c index 4829bada1a92..046f29a66214 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_p_u64.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_p_u64.c @@ -1,21 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vstrdt.64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +** ... +*/ void -foo (uint64_t * base, uint64x2_t offset, uint64x2_t value, mve_pred16_t p) +foo (uint64_t *base, uint64x2_t offset, uint64x2_t value, mve_pred16_t p) { - vstrdq_scatter_offset_p_u64 (base, offset, value, p); + return vstrdq_scatter_offset_p_u64 (base, offset, value, p); } -/* { dg-final { scan-assembler "vstrdt.64" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vstrdt.64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +** ... +*/ void -foo1 (uint64_t * base, uint64x2_t offset, uint64x2_t value, mve_pred16_t p) +foo1 (uint64_t *base, uint64x2_t offset, uint64x2_t value, mve_pred16_t p) { - vstrdq_scatter_offset_p (base, offset, value, p); + return vstrdq_scatter_offset_p (base, offset, value, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vstrdt.64" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_s64.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_s64.c index fb7317bc4d7f..73e25cdf0ed4 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_s64.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_s64.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vstrd.64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +** ... +*/ void -foo (int64_t * base, uint64x2_t offset, int64x2_t value) +foo (int64_t *base, uint64x2_t offset, int64x2_t value) { - vstrdq_scatter_offset_s64 (base, offset, value); + return vstrdq_scatter_offset_s64 (base, offset, value); } -/* { dg-final { scan-assembler "vstrd.64" } } */ +/* +**foo1: +** ... +** vstrd.64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +** ... +*/ void -foo1 (int64_t * base, uint64x2_t offset, int64x2_t value) +foo1 (int64_t *base, uint64x2_t offset, int64x2_t value) { - vstrdq_scatter_offset (base, offset, value); + return vstrdq_scatter_offset (base, offset, value); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vstrd.64" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_u64.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_u64.c index e8b3a0210b44..d49adde0b944 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_u64.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_offset_u64.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vstrd.64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +** ... +*/ void -foo (uint64_t * base, uint64x2_t offset, uint64x2_t value) +foo (uint64_t *base, uint64x2_t offset, uint64x2_t value) { - vstrdq_scatter_offset_u64 (base, offset, value); + return vstrdq_scatter_offset_u64 (base, offset, value); } -/* { dg-final { scan-assembler "vstrd.64" } } */ +/* +**foo1: +** ... +** vstrd.64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+\](?: @.*|) +** ... +*/ void -foo1 (uint64_t * base, uint64x2_t offset, uint64x2_t value) +foo1 (uint64_t *base, uint64x2_t offset, uint64x2_t value) { - vstrdq_scatter_offset (base, offset, value); + return vstrdq_scatter_offset (base, offset, value); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vstrd.64" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_p_s64.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_p_s64.c index 9ca83e0f3fd1..8acfba1f55e6 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_p_s64.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_p_s64.c @@ -1,21 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vstrdt.64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?: @.*|) +** ... +*/ void -foo (int64_t * base, uint64x2_t offset, int64x2_t value, mve_pred16_t p) +foo (int64_t *base, uint64x2_t offset, int64x2_t value, mve_pred16_t p) { - vstrdq_scatter_shifted_offset_p_s64 (base, offset, value, p); + return vstrdq_scatter_shifted_offset_p_s64 (base, offset, value, p); } -/* { dg-final { scan-assembler "vstrdt.64" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vstrdt.64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?: @.*|) +** ... +*/ void -foo1 (int64_t * base, uint64x2_t offset, int64x2_t value, mve_pred16_t p) +foo1 (int64_t *base, uint64x2_t offset, int64x2_t value, mve_pred16_t p) { - vstrdq_scatter_shifted_offset_p (base, offset, value, p); + return vstrdq_scatter_shifted_offset_p (base, offset, value, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vstrdt.64" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_p_u64.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_p_u64.c index 1c33df18e842..630c627d604b 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_p_u64.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_p_u64.c @@ -1,21 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vstrdt.64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?: @.*|) +** ... +*/ void -foo (uint64_t * base, uint64x2_t offset, uint64x2_t value, mve_pred16_t p) +foo (uint64_t *base, uint64x2_t offset, uint64x2_t value, mve_pred16_t p) { - vstrdq_scatter_shifted_offset_p_u64 (base, offset, value, p); + return vstrdq_scatter_shifted_offset_p_u64 (base, offset, value, p); } -/* { dg-final { scan-assembler "vstrdt.64" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vstrdt.64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?: @.*|) +** ... +*/ void -foo1 (uint64_t * base, uint64x2_t offset, uint64x2_t value, mve_pred16_t p) +foo1 (uint64_t *base, uint64x2_t offset, uint64x2_t value, mve_pred16_t p) { - vstrdq_scatter_shifted_offset_p (base, offset, value, p); + return vstrdq_scatter_shifted_offset_p (base, offset, value, p); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vstrdt.64" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_s64.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_s64.c index 8af348ddbe21..ec73bca48692 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_s64.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_s64.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vstrd.64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?: @.*|) +** ... +*/ void -foo (int64_t * base, uint64x2_t offset, int64x2_t value) +foo (int64_t *base, uint64x2_t offset, int64x2_t value) { - vstrdq_scatter_shifted_offset_s64 (base, offset, value); + return vstrdq_scatter_shifted_offset_s64 (base, offset, value); } -/* { dg-final { scan-assembler "vstrd.64" } } */ +/* +**foo1: +** ... +** vstrd.64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?: @.*|) +** ... +*/ void -foo1 (int64_t * base, uint64x2_t offset, int64x2_t value) +foo1 (int64_t *base, uint64x2_t offset, int64x2_t value) { - vstrdq_scatter_shifted_offset (base, offset, value); + return vstrdq_scatter_shifted_offset (base, offset, value); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vstrd.64" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_u64.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_u64.c index bc153a071920..9bdf80039611 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_u64.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrdq_scatter_shifted_offset_u64.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vstrd.64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?: @.*|) +** ... +*/ void -foo (uint64_t * base, uint64x2_t offset, uint64x2_t value) +foo (uint64_t *base, uint64x2_t offset, uint64x2_t value) { - vstrdq_scatter_shifted_offset_u64 (base, offset, value); + return vstrdq_scatter_shifted_offset_u64 (base, offset, value); } -/* { dg-final { scan-assembler "vstrd.64" } } */ +/* +**foo1: +** ... +** vstrd.64 q[0-9]+, \[(?:ip|fp|r[0-9]+), q[0-9]+, uxtw #3\](?: @.*|) +** ... +*/ void -foo1 (uint64_t * base, uint64x2_t offset, uint64x2_t value) +foo1 (uint64_t *base, uint64x2_t offset, uint64x2_t value) { - vstrdq_scatter_shifted_offset (base, offset, value); + return vstrdq_scatter_shifted_offset (base, offset, value); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vstrd.64" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ -- 2.47.2