From f325a91895d8a9167a7f1268569c1877272f897c Mon Sep 17 00:00:00 2001 From: Andreas Kemnade Date: Tue, 13 Jan 2026 16:31:36 +0100 Subject: [PATCH] ARM: dts: imx: e60k02: add tps65185 Wire up the TPS65185 regulator needed for the display. Signed-off-by: Andreas Kemnade Signed-off-by: Shawn Guo --- arch/arm/boot/dts/nxp/imx/e60k02.dtsi | 35 ++++++++++++++++++- .../boot/dts/nxp/imx/imx6sl-tolino-shine3.dts | 26 ++++++++++++++ .../boot/dts/nxp/imx/imx6sll-kobo-clarahd.dts | 26 ++++++++++++++ 3 files changed, 86 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/nxp/imx/e60k02.dtsi b/arch/arm/boot/dts/nxp/imx/e60k02.dtsi index 0029c12f16c8e..aac7b9ef76275 100644 --- a/arch/arm/boot/dts/nxp/imx/e60k02.dtsi +++ b/arch/arm/boot/dts/nxp/imx/e60k02.dtsi @@ -23,6 +23,14 @@ stdout-path = &uart1; }; + epd_pmic_supply: regulator-epd-pmic-in { + compatible = "regulator-fixed"; + regulator-name = "epd_pmic_supply"; + gpio = <&gpio2 14 GPIO_ACTIVE_HIGH>; + enable-active-high; + startup-delay-us = <20000>; + }; + gpio_keys: gpio-keys { compatible = "gpio-keys"; @@ -119,8 +127,33 @@ vdd-supply = <&ldo5_reg>; }; - /* TODO: TPS65185 PMIC for E Ink at 0x68 */ + tps65185: pmic@68 { + compatible = "ti,tps65185"; + reg = <0x68>; + interrupt-parent = <&gpio2>; + interrupts = <9 IRQ_TYPE_LEVEL_LOW>; + vin-supply = <&epd_pmic_supply>; + pwr-good-gpios = <&gpio2 13 GPIO_ACTIVE_HIGH>; + vcom-ctrl-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>; + wakeup-gpios = <&gpio2 7 GPIO_ACTIVE_HIGH>; + enable-gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>; + + regulators { + vcom_reg: vcom { + regulator-name = "vcom"; + }; + + vposneg_reg: vposneg { + regulator-name = "vposneg"; + regulator-min-microvolt = <15000000>; + regulator-max-microvolt = <15000000>; + }; + v3p3_reg: v3p3 { + regulator-name = "v3p3"; + }; + }; + }; }; &i2c3 { diff --git a/arch/arm/boot/dts/nxp/imx/imx6sl-tolino-shine3.dts b/arch/arm/boot/dts/nxp/imx/imx6sl-tolino-shine3.dts index 5ba6f15e9ed5a..58b9ccd9b605d 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6sl-tolino-shine3.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6sl-tolino-shine3.dts @@ -26,6 +26,11 @@ compatible = "kobo,tolino-shine3", "fsl,imx6sl"; }; +&epd_pmic_supply { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_epd_pmic_supply>; +}; + &gpio_keys { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpio_keys>; @@ -59,6 +64,12 @@ >; }; + pinctrl_epd_pmic_supply: epdc-pmic-supplygrp { + fsl,pins = < + MX6SL_PAD_EPDC_PWRWAKEUP__GPIO2_IO14 0x40010059 + >; + }; + pinctrl_gpio_keys: gpio-keysgrp { fsl,pins = < MX6SL_PAD_SD1_DAT1__GPIO5_IO08 0x17059 /* PWR_SW */ @@ -159,6 +170,16 @@ >; }; + pinctrl_tps65185_gpio: tps65185-gpio-grp { + fsl,pins = < + MX6SL_PAD_EPDC_VCOM0__GPIO2_IO03 0x40010059 /* vcom_ctrl */ + MX6SL_PAD_EPDC_PWRCTRL0__GPIO2_IO07 0x40010059 /* wakeup */ + MX6SL_PAD_EPDC_PWRCTRL1__GPIO2_IO08 0x40010059 /* enable */ + MX6SL_PAD_EPDC_PWRCTRL2__GPIO2_IO09 0x17059 /* nINT */ + MX6SL_PAD_EPDC_PWRSTAT__GPIO2_IO13 0x17059 /* pwr-good */ + >; + }; + pinctrl_uart1: uart1grp { fsl,pins = < MX6SL_PAD_UART1_TXD__UART1_TX_DATA 0x1b0b1 @@ -308,6 +329,11 @@ pinctrl-0 = <&pinctrl_ricoh_gpio>; }; +&tps65185 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_tps65185_gpio>; +}; + &uart1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6sll-kobo-clarahd.dts b/arch/arm/boot/dts/nxp/imx/imx6sll-kobo-clarahd.dts index 18c9ac8f7560e..1000ee8b807aa 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6sll-kobo-clarahd.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6sll-kobo-clarahd.dts @@ -36,6 +36,11 @@ soc-supply = <&dcdc1_reg>; }; +&epd_pmic_supply { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_epd_pmic_supply>; +}; + &gpio_keys { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpio_keys>; @@ -69,6 +74,12 @@ >; }; + pinctrl_epd_pmic_supply: epdc-pmic-supplygrp { + fsl,pins = < + MX6SLL_PAD_EPDC_PWR_WAKE__GPIO2_IO14 0x40010059 + >; + }; + pinctrl_gpio_keys: gpio-keysgrp { fsl,pins = < MX6SLL_PAD_SD1_DATA1__GPIO5_IO08 0x17059 /* PWR_SW */ @@ -169,6 +180,16 @@ >; }; + pinctrl_tps65185_gpio: tps65185-gpio-grp { + fsl,pins = < + MX6SLL_PAD_EPDC_VCOM0__GPIO2_IO03 0x40010059 /* vcom_ctrl */ + MX6SLL_PAD_EPDC_PWR_CTRL0__GPIO2_IO07 0x40010059 /* wakeup */ + MX6SLL_PAD_EPDC_PWR_CTRL1__GPIO2_IO08 0x40010059 /* enable */ + MX6SLL_PAD_EPDC_PWR_CTRL2__GPIO2_IO09 0x17059 /* nINT */ + MX6SLL_PAD_EPDC_PWR_STAT__GPIO2_IO13 0x17059 /* pwr-good */ + >; + }; + pinctrl_uart1: uart1grp { fsl,pins = < MX6SLL_PAD_UART1_TXD__UART1_DCE_TX 0x1b0b1 @@ -310,6 +331,11 @@ pinctrl-0 = <&pinctrl_ricoh_gpio>; }; +&tps65185 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_tps65185_gpio>; +}; + &uart1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1>; -- 2.47.3