From f4156fbf7d6d641f8aade8028e87cf302350c3c0 Mon Sep 17 00:00:00 2001 From: Kewen Lin Date: Thu, 18 Jan 2024 00:00:52 -0600 Subject: [PATCH] testsuite, rs6000: Adjust fold-vec-extract-char.p7.c [PR111850] As PR101169 comment #c4 shows, previsouly the addi count update on fold-vec-extract-char.p7.c covered a sub-optimal code gen issue. On trunk, pass fold-mem-offsets helps to recover the best code sequence, so this patch is to revert the count back to the original which matches the optimal addi count. PR testsuite/111850 gcc/testsuite/ChangeLog: * gcc.target/powerpc/fold-vec-extract-char.p7.c: Update the checking count of addi to 6. --- gcc/testsuite/gcc.target/powerpc/fold-vec-extract-char.p7.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-char.p7.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-char.p7.c index 29a8aa84db28..42599c214e43 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-char.p7.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-char.p7.c @@ -11,7 +11,7 @@ /* one extsb (extend sign-bit) instruction generated for each test against unsigned types */ -/* { dg-final { scan-assembler-times {\maddi\M} 9 } } */ +/* { dg-final { scan-assembler-times {\maddi\M} 6 } } */ /* { dg-final { scan-assembler-times {\mli\M} 6 } } */ /* { dg-final { scan-assembler-times {\mstxvw4x\M|\mstvx\M|\mstxv\M} 6 } } */ /* -m32 target uses rlwinm in place of rldicl. */ -- 2.47.2