From f6702aa05acc8986c87ed4c14f70ca1d9f5ab998 Mon Sep 17 00:00:00 2001 From: Laveesh Bansal Date: Tue, 6 Jan 2026 15:54:25 +0000 Subject: [PATCH] Documentation: hwmon: coretemp: Update supported CPUs and TjMax values Update the coretemp documentation to reflect current driver capabilities: - Extend the supported CPU model list to include Atom processors from Bonnell through Jasper Lake, maintaining the original format with model numbers and adding X86_FEATURE_DTHERM as the actual detection mechanism. Added models: 0x37 (Bay Trail), 0x4a (Merrifield), 0x4c (Cherry Trail), 0x5a (Moorefield), 0x5c (Apollo Lake), 0x7a (Gemini Lake), 0x96 (Elkhart Lake), 0x9c (Jasper Lake) - Update the description to note that per-package temperature sensing is available on Sandy Bridge and all newer processors - Clarify that TjMax is read from MSR_IA32_TEMPERATURE_TARGET on modern CPUs (Nehalem and newer) - Add TjMax values for newer Atom processor families to Appendix A: - 22nm Silvermont/Bay Trail: E38xx at 110C, Z37xx at 90C - 22nm Silvermont/Moorefield: Z35xx at 90C - 14nm Airmont/Cherry Trail: Z8xxx at 90C - 14nm Goldmont/Apollo Lake: 105C - 14nm Goldmont Plus/Gemini Lake: 105C - 10nm Tremont/Elkhart Lake: 105C - 10nm Tremont/Jasper Lake: 105C TjMax values obtained from Intel ARK and official datasheets: - E3845: https://www.intel.com/content/www/us/en/products/sku/78475/intel-atom-processor-e3845-2m-cache-1-91-ghz/specifications.html - Z3600/Z3700: https://www.intel.com/content/dam/www/public/us/en/documents/datasheets/atom-z36xxx-z37xxx-datasheet-vol-1.pdf Signed-off-by: Laveesh Bansal Link: https://lore.kernel.org/r/20260106155426.547872-2-laveeshb@laveeshbansal.com Signed-off-by: Guenter Roeck --- Documentation/hwmon/coretemp.rst | 59 ++++++++++++++++++++++++++------ 1 file changed, 49 insertions(+), 10 deletions(-) diff --git a/Documentation/hwmon/coretemp.rst b/Documentation/hwmon/coretemp.rst index c609329e3bc45..7a5fbb37b0f33 100644 --- a/Documentation/hwmon/coretemp.rst +++ b/Documentation/hwmon/coretemp.rst @@ -2,17 +2,21 @@ Kernel driver coretemp ====================== Supported chips: - * All Intel Core family + * All Intel Core family and Atom processors with Digital Thermal Sensor (DTS) Prefix: 'coretemp' - CPUID: family 0x6, models + CPUID: family 0x6, models with X86_FEATURE_DTHERM, including: - 0xe (Pentium M DC), 0xf (Core 2 DC 65nm), - 0x16 (Core 2 SC 65nm), 0x17 (Penryn 45nm), - 0x1a (Nehalem), 0x1c (Atom), 0x1e (Lynnfield), - 0x26 (Tunnel Creek Atom), 0x27 (Medfield Atom), - - 0x36 (Cedar Trail Atom) + - 0x36 (Cedar Trail Atom), 0x37 (Bay Trail Atom), + - 0x4a (Merrifield Atom), 0x4c (Cherry Trail Atom), + - 0x5a (Moorefield Atom), 0x5c (Apollo Lake Atom), + - 0x7a (Gemini Lake Atom), + - 0x96 (Elkhart Lake Atom), 0x9c (Jasper Lake Atom) Datasheet: @@ -28,9 +32,9 @@ Description This driver permits reading the DTS (Digital Temperature Sensor) embedded inside Intel CPUs. This driver can read both the per-core and per-package -temperature using the appropriate sensors. The per-package sensor is new; -as of now, it is present only in the SandyBridge platform. The driver will -show the temperature of all cores inside a package under a single device +temperature using the appropriate sensors. The per-package sensor is +available on Sandy Bridge and all newer processors. The driver will show +the temperature of all cores inside a package under a single device directory inside hwmon. Temperature is measured in degrees Celsius and measurement resolution is @@ -56,10 +60,11 @@ tempX_label Contains string "Core X", where X is processor where Y is the package number. ================= ======================================================== -On CPU models which support it, TjMax is read from a model-specific register. -On other models, it is set to an arbitrary value based on weak heuristics. -If these heuristics don't work for you, you can pass the correct TjMax value -as a module parameter (tjmax). +On modern CPUs (Nehalem and newer), TjMax is read from the +MSR_IA32_TEMPERATURE_TARGET register. On older models without this MSR, +TjMax is determined using lookup tables or heuristics. If these don't work +for your CPU, you can pass the correct TjMax value as a module parameter +(tjmax). Appendix A. Known TjMax lists (TBD): Some information comes from ark.intel.com @@ -100,6 +105,40 @@ Process Processor TjMax(C) D2700/2550/2500 100 N2850/2800/2650/2600 100 +22nm Atom Processors (Silvermont/Bay Trail) + E3845/3827/3826/3825/3815/3805 110 + Z3795/3775/3770/3740/3736/3735/3680 90 + +22nm Atom Processors (Silvermont/Moorefield) + Z3580/3570/3560/3530 90 + +14nm Atom Processors (Airmont/Cherry Trail) + x5-Z8550/Z8500/Z8350/Z8330/Z8300 90 + x7-Z8750/Z8700 90 + +14nm Atom Processors (Goldmont/Apollo Lake) + x5-E3940/E3930 105 + x7-E3950 105 + +14nm Celeron/Pentium Processors + (Goldmont/Apollo Lake) + J3455/J3355 105 + N3450/N3350 105 + N4200 105 + +14nm Celeron/Pentium Processors + (Goldmont Plus/Gemini Lake) + J4105/J4005 105 + N4100/N4000 105 + N5000 105 + +10nm Atom Processors (Tremont/Elkhart Lake) + x6000E 105 + +10nm Celeron/Pentium Processors + (Tremont/Jasper Lake) + N4500/N5100/N6000 series 105 + 45nm Xeon Processors 5400 Quad-Core X5492, X5482, X5472, X5470, X5460, X5450 85 E5472, E5462, E5450/40/30/20/10/05 85 -- 2.47.3