From f77d8675c1adfb7bad559c1183161db5e39e4a4d Mon Sep 17 00:00:00 2001 From: Imre Deak Date: Fri, 9 May 2025 21:03:39 +0300 Subject: [PATCH] drm/i915/dp_mst: Enable fractional link bpps on MST if the bpp is forced Enable using a fractional (compressed) link bpp on MST links, if this is supported and the link bpp is forced. Fractional link bpps will be enabled by default as a follow-up change after testing this functionality within a set of commonly used MST monitors and docks/hubs which support it. Reviewed-by: Ankit Nautiyal Signed-off-by: Imre Deak Link: https://lore.kernel.org/r/20250509180340.554867-13-imre.deak@intel.com --- drivers/gpu/drm/i915/display/intel_dp.c | 6 +++++- drivers/gpu/drm/i915/display/intel_dp.h | 2 ++ drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 +- 3 files changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 3021395dead2d..91a34d474463a 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -2103,7 +2103,7 @@ static int dsc_src_max_compressed_bpp(struct intel_dp *intel_dp) /* * Note: for pre-13 display you still need to check the validity of each step. */ -static int intel_dp_dsc_bpp_step_x16(const struct intel_connector *connector) +int intel_dp_dsc_bpp_step_x16(const struct intel_connector *connector) { struct intel_display *display = to_intel_display(connector); u8 incr = drm_dp_dsc_sink_bpp_incr(connector->dp.dsc_dpcd); @@ -2111,6 +2111,10 @@ static int intel_dp_dsc_bpp_step_x16(const struct intel_connector *connector) if (DISPLAY_VER(display) < 14 || !incr) return fxp_q4_from_int(1); + if (connector->mst.dp && + !connector->link.force_bpp_x16 && !connector->mst.dp->force_dsc_fractional_bpp_en) + return fxp_q4_from_int(1); + /* fxp q4 */ return fxp_q4_from_int(1) / incr; } diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h index 0b8a9b939070f..eff3414c05dbf 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.h +++ b/drivers/gpu/drm/i915/display/intel_dp.h @@ -212,4 +212,6 @@ int intel_dp_dsc_min_src_compressed_bpp(void); int intel_dp_compute_min_hblank(struct intel_crtc_state *crtc_state, const struct drm_connector_state *conn_state); +int intel_dp_dsc_bpp_step_x16(const struct intel_connector *connector); + #endif /* __INTEL_DP_H__ */ diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c index 13b2bd3ec8607..57602606acd5a 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c @@ -499,7 +499,7 @@ static int mst_stream_dsc_compute_link_config(struct intel_dp *intel_dp, "DSC Sink supported compressed min bpp " FXP_Q4_FMT " compressed max bpp " FXP_Q4_FMT "\n", FXP_Q4_ARGS(min_compressed_bpp_x16), FXP_Q4_ARGS(max_compressed_bpp_x16)); - bpp_step_x16 = fxp_q4_from_int(1); + bpp_step_x16 = intel_dp_dsc_bpp_step_x16(connector); max_compressed_bpp_x16 = min(max_compressed_bpp_x16, fxp_q4_from_int(crtc_state->pipe_bpp) - bpp_step_x16); -- 2.47.2