From f7f14b108880ed736c6d77b7f077980523a8ae66 Mon Sep 17 00:00:00 2001 From: Eugene Lepshy Date: Wed, 31 Jul 2024 21:45:49 +0300 Subject: [PATCH] drm/msm/a6xx: Add A642L speedbin (0x81) According to downstream, A642L's speedbin is 129 and uses 4 as index Signed-off-by: Eugene Lepshy Signed-off-by: Danila Tikhonov Reviewed-by: Konrad Dybcio Patchwork: https://patchwork.freedesktop.org/patch/606722/ Signed-off-by: Rob Clark --- drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_catalog.c b/drivers/gpu/drm/msm/adreno/a6xx_catalog.c index 68ba9aed5506e..99f0ee1a2edea 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_catalog.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_catalog.c @@ -869,6 +869,7 @@ static const struct adreno_info a6xx_gpus[] = { .speedbins = ADRENO_SPEEDBINS( { 0, 0 }, { 117, 0 }, + { 129, 4 }, { 172, 2 }, /* Called speedbin 1 downstream, but let's not break things! */ { 190, 1 }, ), -- 2.39.5