From f8e9ab36076f0adc77056e9061e30e75ed96109f Mon Sep 17 00:00:00 2001 From: Julian Seward Date: Sat, 28 May 2011 11:05:44 +0000 Subject: [PATCH] Remove another memory reference from the arm dispatcher loop, by using the fact that all {VG,VEX}_TRC_VALUES have their lowest bit set. All other targets can benefit from this trick too. git-svn-id: svn://svn.valgrind.org/valgrind/trunk@11781 --- coregrind/m_dispatch/dispatch-arm-linux.S | 6 ++---- coregrind/pub_core_dispatch_asm.h | 8 +++++++- 2 files changed, 9 insertions(+), 5 deletions(-) diff --git a/coregrind/m_dispatch/dispatch-arm-linux.S b/coregrind/m_dispatch/dispatch-arm-linux.S index 20b13facde..f3de4459b7 100644 --- a/coregrind/m_dispatch/dispatch-arm-linux.S +++ b/coregrind/m_dispatch/dispatch-arm-linux.S @@ -85,10 +85,9 @@ VG_(run_innerloop__dispatch_unprofiled): modified guest state ptr */ /* Has the guest state pointer been messed with? If yes, exit. */ - ldr r1, [sp, #0] movw r3, #:lower16:VG_(dispatch_ctr) + tst r8, #1 - cmp r8, r1 movt r3, #:upper16:VG_(dispatch_ctr) bne gsp_changed @@ -142,10 +141,9 @@ VG_(run_innerloop__dispatch_profiled): modified guest state ptr */ /* Has the guest state pointer been messed with? If yes, exit. */ - ldr r1, [sp, #0] movw r3, #:lower16:VG_(dispatch_ctr) + tst r8, #1 - cmp r8, r1 movt r3, #:upper16:VG_(dispatch_ctr) bne gsp_changed diff --git a/coregrind/pub_core_dispatch_asm.h b/coregrind/pub_core_dispatch_asm.h index d08183bb8d..77a7afecf2 100644 --- a/coregrind/pub_core_dispatch_asm.h +++ b/coregrind/pub_core_dispatch_asm.h @@ -41,7 +41,13 @@ #include "libvex_trc_values.h" /* And some more of our own. These must not have the same values as - those from libvex_trc_values.h. (viz, 60 or below is safe). */ + those from libvex_trc_values.h. (viz, 60 or below is safe). + + These values *must* be odd (have bit 0 set) because the dispatchers + (coregrind/m_dispatch/dispatch-*-*.S) use this fact to distinguish + a TRC value from the unchanged baseblock pointer -- which has 0 as + its lowest bit. +*/ #define VG_TRC_BORING 29 /* no event; just keep going */ #define VG_TRC_INNER_FASTMISS 37 /* TRC only; means fast-cache miss. */ #define VG_TRC_INNER_COUNTERZERO 41 /* TRC only; means bb ctr == 0 */ -- 2.47.2