From fd9a12dca213f097e0fa617c27af98b864df5efe Mon Sep 17 00:00:00 2001 From: Luis Machado Date: Thu, 5 Nov 2020 22:50:42 -0300 Subject: [PATCH] Use CLR DWARF register and PCC/CSP Remove code to return LR for a CLR DWARF register. For the pure capability ABI, set pc to PCC and sp to CSP. gdb/ChangeLog: 2020-11-11 Luis Machado * aarch64-tdep.c (aarch64_dwarf_reg_to_regnum): Don't return LR for CLR. (aarch64_gdbarch_init): Set pc to PCC and sp to CSP for pure cap ABI. --- gdb/aarch64-tdep.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/gdb/aarch64-tdep.c b/gdb/aarch64-tdep.c index 8788097ba5c..4834c77ef6f 100644 --- a/gdb/aarch64-tdep.c +++ b/gdb/aarch64-tdep.c @@ -2617,10 +2617,6 @@ aarch64_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg) if (tdep->has_capability ()) { - /* FIXME-Morello: Redirect CLR to LR for now. */ - if (reg == AARCH64_DWARF_CLR) - return AARCH64_LR_REGNUM; - if (reg >= AARCH64_DWARF_C0 && reg <= AARCH64_DWARF_C0 + 30) return tdep->cap_reg_base + (reg - AARCH64_DWARF_C0); @@ -4440,6 +4436,9 @@ aarch64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) /* Set address class hooks for capabilities. */ if (feature_capability) { + set_gdbarch_sp_regnum (gdbarch, tdep->cap_reg_csp); + set_gdbarch_pc_regnum (gdbarch, tdep->cap_reg_pcc); + /* Address manipulation. */ set_gdbarch_addr_bits_remove (gdbarch, aarch64_addr_bits_remove); -- 2.47.2