From fd9a3a36fdcf14d1678c469e8b9033a46aa6c6fb Mon Sep 17 00:00:00 2001 From: Wilco Dijkstra Date: Thu, 27 Feb 2025 20:34:34 +0000 Subject: [PATCH] Revert "AArch64: Add vector logp1 alias for log1p" This reverts commit a991a0fc7c051d7ef2ea7778e0a699f22d4e53d7. --- bits/libm-simd-decl-stubs.h | 11 ----------- math/bits/mathcalls.h | 2 +- sysdeps/aarch64/fpu/Versions | 7 ------- sysdeps/aarch64/fpu/advsimd_f32_protos.h | 1 - sysdeps/aarch64/fpu/bits/math-vector.h | 8 -------- sysdeps/aarch64/fpu/log1p_advsimd.c | 2 -- sysdeps/aarch64/fpu/log1p_sve.c | 2 -- sysdeps/aarch64/fpu/log1pf_advsimd.c | 3 --- sysdeps/aarch64/fpu/log1pf_sve.c | 2 -- sysdeps/unix/sysv/linux/aarch64/libmvec.abilist | 5 ----- 10 files changed, 1 insertion(+), 42 deletions(-) diff --git a/bits/libm-simd-decl-stubs.h b/bits/libm-simd-decl-stubs.h index 5019e8e25c..08a41c46ad 100644 --- a/bits/libm-simd-decl-stubs.h +++ b/bits/libm-simd-decl-stubs.h @@ -253,17 +253,6 @@ #define __DECL_SIMD_log1pf64x #define __DECL_SIMD_log1pf128x -#define __DECL_SIMD_logp1 -#define __DECL_SIMD_logp1f -#define __DECL_SIMD_logp1l -#define __DECL_SIMD_logp1f16 -#define __DECL_SIMD_logp1f32 -#define __DECL_SIMD_logp1f64 -#define __DECL_SIMD_logp1f128 -#define __DECL_SIMD_logp1f32x -#define __DECL_SIMD_logp1f64x -#define __DECL_SIMD_logp1f128x - #define __DECL_SIMD_atanh #define __DECL_SIMD_atanhf #define __DECL_SIMD_atanhl diff --git a/math/bits/mathcalls.h b/math/bits/mathcalls.h index 92856becc4..6cb594b6ff 100644 --- a/math/bits/mathcalls.h +++ b/math/bits/mathcalls.h @@ -126,7 +126,7 @@ __MATHCALL (log2p1,, (_Mdouble_ __x)); __MATHCALL (log10p1,, (_Mdouble_ __x)); /* Return log(1 + X). */ -__MATHCALL_VEC (logp1,, (_Mdouble_ __x)); +__MATHCALL (logp1,, (_Mdouble_ __x)); #endif #if defined __USE_XOPEN_EXTENDED || defined __USE_ISOC99 diff --git a/sysdeps/aarch64/fpu/Versions b/sysdeps/aarch64/fpu/Versions index 015211f5f4..cc15ce2d1e 100644 --- a/sysdeps/aarch64/fpu/Versions +++ b/sysdeps/aarch64/fpu/Versions @@ -135,11 +135,4 @@ libmvec { _ZGVsMxv_tanh; _ZGVsMxv_tanhf; } - GLIBC_2.41 { - _ZGVnN2v_logp1; - _ZGVnN2v_logp1f; - _ZGVnN4v_logp1f; - _ZGVsMxv_logp1; - _ZGVsMxv_logp1f; - } } diff --git a/sysdeps/aarch64/fpu/advsimd_f32_protos.h b/sysdeps/aarch64/fpu/advsimd_f32_protos.h index 5909bb4ce9..097d403ffe 100644 --- a/sysdeps/aarch64/fpu/advsimd_f32_protos.h +++ b/sysdeps/aarch64/fpu/advsimd_f32_protos.h @@ -36,7 +36,6 @@ libmvec_hidden_proto (V_NAME_F2(hypot)); libmvec_hidden_proto (V_NAME_F1(log10)); libmvec_hidden_proto (V_NAME_F1(log1p)); libmvec_hidden_proto (V_NAME_F1(log2)); -libmvec_hidden_proto (V_NAME_F1(logp1)); libmvec_hidden_proto (V_NAME_F1(log)); libmvec_hidden_proto (V_NAME_F2(pow)); libmvec_hidden_proto (V_NAME_F1(sin)); diff --git a/sysdeps/aarch64/fpu/bits/math-vector.h b/sysdeps/aarch64/fpu/bits/math-vector.h index f295fe185d..7484150131 100644 --- a/sysdeps/aarch64/fpu/bits/math-vector.h +++ b/sysdeps/aarch64/fpu/bits/math-vector.h @@ -113,10 +113,6 @@ # define __DECL_SIMD_log2 __DECL_SIMD_aarch64 # undef __DECL_SIMD_log2f # define __DECL_SIMD_log2f __DECL_SIMD_aarch64 -# undef __DECL_SIMD_logp1 -# define __DECL_SIMD_logp1 __DECL_SIMD_aarch64 -# undef __DECL_SIMD_logp1f -# define __DECL_SIMD_logp1f __DECL_SIMD_aarch64 # undef __DECL_SIMD_pow # define __DECL_SIMD_pow __DECL_SIMD_aarch64 # undef __DECL_SIMD_powf @@ -184,7 +180,6 @@ __vpcs __f32x4_t _ZGVnN4v_logf (__f32x4_t); __vpcs __f32x4_t _ZGVnN4v_log10f (__f32x4_t); __vpcs __f32x4_t _ZGVnN4v_log1pf (__f32x4_t); __vpcs __f32x4_t _ZGVnN4v_log2f (__f32x4_t); -__vpcs __f32x4_t _ZGVnN4v_logp1f (__f32x4_t); __vpcs __f32x4_t _ZGVnN4vv_powf (__f32x4_t, __f32x4_t); __vpcs __f32x4_t _ZGVnN4v_sinf (__f32x4_t); __vpcs __f32x4_t _ZGVnN4v_sinhf (__f32x4_t); @@ -212,7 +207,6 @@ __vpcs __f64x2_t _ZGVnN2v_log (__f64x2_t); __vpcs __f64x2_t _ZGVnN2v_log10 (__f64x2_t); __vpcs __f64x2_t _ZGVnN2v_log1p (__f64x2_t); __vpcs __f64x2_t _ZGVnN2v_log2 (__f64x2_t); -__vpcs __f64x2_t _ZGVnN2v_logp1 (__f64x2_t); __vpcs __f64x2_t _ZGVnN2vv_pow (__f64x2_t, __f64x2_t); __vpcs __f64x2_t _ZGVnN2v_sin (__f64x2_t); __vpcs __f64x2_t _ZGVnN2v_sinh (__f64x2_t); @@ -245,7 +239,6 @@ __sv_f32_t _ZGVsMxv_logf (__sv_f32_t, __sv_bool_t); __sv_f32_t _ZGVsMxv_log10f (__sv_f32_t, __sv_bool_t); __sv_f32_t _ZGVsMxv_log1pf (__sv_f32_t, __sv_bool_t); __sv_f32_t _ZGVsMxv_log2f (__sv_f32_t, __sv_bool_t); -__sv_f32_t _ZGVsMxv_logp1f (__sv_f32_t, __sv_bool_t); __sv_f32_t _ZGVsMxvv_powf (__sv_f32_t, __sv_f32_t, __sv_bool_t); __sv_f32_t _ZGVsMxv_sinf (__sv_f32_t, __sv_bool_t); __sv_f32_t _ZGVsMxv_sinhf (__sv_f32_t, __sv_bool_t); @@ -273,7 +266,6 @@ __sv_f64_t _ZGVsMxv_log (__sv_f64_t, __sv_bool_t); __sv_f64_t _ZGVsMxv_log10 (__sv_f64_t, __sv_bool_t); __sv_f64_t _ZGVsMxv_log1p (__sv_f64_t, __sv_bool_t); __sv_f64_t _ZGVsMxv_log2 (__sv_f64_t, __sv_bool_t); -__sv_f64_t _ZGVsMxv_logp1 (__sv_f64_t, __sv_bool_t); __sv_f64_t _ZGVsMxvv_pow (__sv_f64_t, __sv_f64_t, __sv_bool_t); __sv_f64_t _ZGVsMxv_sin (__sv_f64_t, __sv_bool_t); __sv_f64_t _ZGVsMxv_sinh (__sv_f64_t, __sv_bool_t); diff --git a/sysdeps/aarch64/fpu/log1p_advsimd.c b/sysdeps/aarch64/fpu/log1p_advsimd.c index 1263587201..9d18578ce6 100644 --- a/sysdeps/aarch64/fpu/log1p_advsimd.c +++ b/sysdeps/aarch64/fpu/log1p_advsimd.c @@ -58,5 +58,3 @@ VPCS_ATTR float64x2_t V_NAME_D1 (log1p) (float64x2_t x) return log1p_inline (x, &d->d); } - -strong_alias (V_NAME_D1 (log1p), V_NAME_D1 (logp1)) diff --git a/sysdeps/aarch64/fpu/log1p_sve.c b/sysdeps/aarch64/fpu/log1p_sve.c index b21cfb2c90..04f7e5720e 100644 --- a/sysdeps/aarch64/fpu/log1p_sve.c +++ b/sysdeps/aarch64/fpu/log1p_sve.c @@ -116,5 +116,3 @@ svfloat64_t SV_NAME_D1 (log1p) (svfloat64_t x, svbool_t pg) return y; } - -strong_alias (SV_NAME_D1 (log1p), SV_NAME_D1 (logp1)) diff --git a/sysdeps/aarch64/fpu/log1pf_advsimd.c b/sysdeps/aarch64/fpu/log1pf_advsimd.c index 00006fc703..f2d47962fe 100644 --- a/sysdeps/aarch64/fpu/log1pf_advsimd.c +++ b/sysdeps/aarch64/fpu/log1pf_advsimd.c @@ -93,6 +93,3 @@ VPCS_ATTR float32x4_t V_NAME_F1 (log1p) (float32x4_t x) libmvec_hidden_def (V_NAME_F1 (log1p)) HALF_WIDTH_ALIAS_F1 (log1p) -strong_alias (V_NAME_F1 (log1p), V_NAME_F1 (logp1)) -libmvec_hidden_def (V_NAME_F1 (logp1)) -HALF_WIDTH_ALIAS_F1 (logp1) diff --git a/sysdeps/aarch64/fpu/log1pf_sve.c b/sysdeps/aarch64/fpu/log1pf_sve.c index 18a185c838..4f17c44e2d 100644 --- a/sysdeps/aarch64/fpu/log1pf_sve.c +++ b/sysdeps/aarch64/fpu/log1pf_sve.c @@ -42,5 +42,3 @@ svfloat32_t SV_NAME_F1 (log1p) (svfloat32_t x, svbool_t pg) return sv_log1pf_inline (x, pg); } - -strong_alias (SV_NAME_F1 (log1p), SV_NAME_F1 (logp1)) diff --git a/sysdeps/unix/sysv/linux/aarch64/libmvec.abilist b/sysdeps/unix/sysv/linux/aarch64/libmvec.abilist index 98687cae0d..b685106954 100644 --- a/sysdeps/unix/sysv/linux/aarch64/libmvec.abilist +++ b/sysdeps/unix/sysv/linux/aarch64/libmvec.abilist @@ -128,8 +128,3 @@ GLIBC_2.40 _ZGVsMxvv_hypot F GLIBC_2.40 _ZGVsMxvv_hypotf F GLIBC_2.40 _ZGVsMxvv_pow F GLIBC_2.40 _ZGVsMxvv_powf F -GLIBC_2.41 _ZGVnN2v_logp1 F -GLIBC_2.41 _ZGVnN2v_logp1f F -GLIBC_2.41 _ZGVnN4v_logp1f F -GLIBC_2.41 _ZGVsMxv_logp1 F -GLIBC_2.41 _ZGVsMxv_logp1f F -- 2.47.2