From fe784c1ca73eb5f2cd49e259bf7ab0e84428f2f4 Mon Sep 17 00:00:00 2001 From: Martin Liska Date: Fri, 15 Sep 2017 14:14:40 +0200 Subject: [PATCH] Backport r249728 2017-09-15 Martin Liska Backport from mainline 2017-06-28 Martin Liska PR sanitizer/81224 * asan.c (instrument_derefs): Bail out inner references that are hard register variables. 2017-09-15 Martin Liska Backport from mainline 2017-06-28 Martin Liska PR sanitizer/81224 * gcc.dg/asan/pr81224.c: New test. From-SVN: r252813 --- gcc/ChangeLog | 9 +++++++++ gcc/asan.c | 3 +++ gcc/testsuite/ChangeLog | 8 ++++++++ gcc/testsuite/gcc.dg/asan/pr81224.c | 11 +++++++++++ 4 files changed, 31 insertions(+) create mode 100644 gcc/testsuite/gcc.dg/asan/pr81224.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 38cbf7dff759..df6a3116d0ff 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,12 @@ +2017-09-15 Martin Liska + + Backport from mainline + 2017-06-28 Martin Liska + + PR sanitizer/81224 + * asan.c (instrument_derefs): Bail out inner references + that are hard register variables. + 2017-09-15 Martin Liska Backport from mainline diff --git a/gcc/asan.c b/gcc/asan.c index 8e359681fc43..3edbdf37612d 100644 --- a/gcc/asan.c +++ b/gcc/asan.c @@ -1802,6 +1802,9 @@ instrument_derefs (gimple_stmt_iterator *iter, tree t, || bitsize != size_in_bytes * BITS_PER_UNIT) return; + if (TREE_CODE (inner) == VAR_DECL && DECL_HARD_REGISTER (inner)) + return; + if (TREE_CODE (inner) == VAR_DECL && offset == NULL_TREE && bitpos >= 0 diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 576064b4f2c7..f79cb0d3ff60 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,11 @@ +2017-09-15 Martin Liska + + Backport from mainline + 2017-06-28 Martin Liska + + PR sanitizer/81224 + * gcc.dg/asan/pr81224.c: New test. + 2017-09-15 Martin Liska Backport from mainline diff --git a/gcc/testsuite/gcc.dg/asan/pr81224.c b/gcc/testsuite/gcc.dg/asan/pr81224.c new file mode 100644 index 000000000000..def5cb69aec3 --- /dev/null +++ b/gcc/testsuite/gcc.dg/asan/pr81224.c @@ -0,0 +1,11 @@ +/* PR sanitizer/80659 */ +/* { dg-do compile { target { i?86-*-* x86_64-*-* } } } */ +/* { dg-additional-options "-msse2" } */ + +int a; +int +b () +{ + register __attribute__ ((__vector_size__ (4 * sizeof (int)))) int c asm("xmm0"); + return c[a]; +} -- 2.47.2