From cf84e8ee8668623e267f778a5dd090dfad18de37 Mon Sep 17 00:00:00 2001 From: Chukun Pan Date: Sun, 31 Aug 2025 22:01:15 +0800 Subject: [PATCH] rockchip: add HINLINK H66K / H68K support Hardware (common): - RK3568 SoC - 2/4GB LPDDR4 - 1x HDMI Type A - 3.5mm jack with mic - 1x PCIE 2.0 WiFi slot - 1x USB 3.0, 2x USB 2.0 - 2x 2.5GbE RTL8125B Ethernet - MicroSD card slot / eMMC 32GB Additions to HINLINK H68K: - 2x 1GbE RTL8211F/YT8531 Ethernet Installation: Use dd or balenaEtcher to flash the firmware. Signed-off-by: Chukun Pan Link: https://github.com/openwrt/openwrt/pull/21270 Signed-off-by: Hauke Mehrtens --- .../armv8/base-files/etc/board.d/01_leds | 6 + .../armv8/base-files/etc/board.d/02_network | 6 + .../etc/hotplug.d/net/40-net-smp-affinity | 6 + target/linux/rockchip/image/armv8.mk | 24 + ...-arm64-dts-rockchip-Add-HINLINK-H68K.patch | 793 ++++++++++++++++++ ...-arm64-dts-rockchip-Add-HINLINK-H66K.patch | 48 ++ ...rockchip-add-led-aliases-for-HINLINK.patch | 23 + 7 files changed, 906 insertions(+) create mode 100644 target/linux/rockchip/patches-6.12/073-1-v6.18-arm64-dts-rockchip-Add-HINLINK-H68K.patch create mode 100644 target/linux/rockchip/patches-6.12/073-2-v6.18-arm64-dts-rockchip-Add-HINLINK-H66K.patch diff --git a/target/linux/rockchip/armv8/base-files/etc/board.d/01_leds b/target/linux/rockchip/armv8/base-files/etc/board.d/01_leds index f098f55e2c7..4504948034e 100644 --- a/target/linux/rockchip/armv8/base-files/etc/board.d/01_leds +++ b/target/linux/rockchip/armv8/base-files/etc/board.d/01_leds @@ -43,6 +43,12 @@ hinlink,h28k) ucidef_set_led_netdev "wan" "WAN" "blue:wan" "eth1" ucidef_set_led_netdev "lan" "LAN" "amber:lan" "eth0" ;; +hinlink,h66k) + ucidef_set_led_netdev "wan" "WAN" "blue:wan" "eth0" + ;; +hinlink,h68k) + ucidef_set_led_netdev "wan" "WAN" "blue:wan" "eth1" + ;; radxa,e20c) ucidef_set_led_netdev "lan" "LAN" "green:lan" "eth0" ucidef_set_led_netdev "wan" "WAN" "green:wan" "eth1" diff --git a/target/linux/rockchip/armv8/base-files/etc/board.d/02_network b/target/linux/rockchip/armv8/base-files/etc/board.d/02_network index ea4a2cc945c..57f45aab7b0 100644 --- a/target/linux/rockchip/armv8/base-files/etc/board.d/02_network +++ b/target/linux/rockchip/armv8/base-files/etc/board.d/02_network @@ -15,6 +15,7 @@ rockchip_setup_interfaces() friendlyarm,nanopi-r4s|\ friendlyarm,nanopi-r4s-enterprise|\ friendlyarm,nanopi-r6c|\ + hinlink,h66k|\ radxa,rockpi-e|\ xunlong,orangepi-r1-plus|\ xunlong,orangepi-r1-plus-lts) @@ -36,6 +37,9 @@ rockchip_setup_interfaces() friendlyarm,nanopi-r6s) ucidef_set_interfaces_lan_wan 'eth0 eth2' 'eth1' ;; + hinlink,h68k) + ucidef_set_interfaces_lan_wan 'eth0 eth2 eth3' 'eth1' + ;; linkease,easepi-r1) ucidef_set_network_device_path eth2 'platform/3c0400000.pcie/pci0001:10/0001:10:00.0/0001:11:00.0' ucidef_set_network_device_path eth3 'platform/3c0000000.pcie/pci0000:00/0000:00:00.0/0000:01:00.0' @@ -79,6 +83,8 @@ rockchip_setup_macs() friendlyarm,nanopi-r2s|\ friendlyarm,nanopi-r76s|\ hinlink,h28k|\ + hinlink,h66k|\ + hinlink,h68k|\ linkease,easepi-r1|\ lunzn,fastrhino-r66s) wan_mac=$(macaddr_generate_from_mmc_cid mmcblk0) diff --git a/target/linux/rockchip/armv8/base-files/etc/hotplug.d/net/40-net-smp-affinity b/target/linux/rockchip/armv8/base-files/etc/hotplug.d/net/40-net-smp-affinity index d273f53a4b4..66bdcb114ea 100644 --- a/target/linux/rockchip/armv8/base-files/etc/hotplug.d/net/40-net-smp-affinity +++ b/target/linux/rockchip/armv8/base-files/etc/hotplug.d/net/40-net-smp-affinity @@ -32,6 +32,7 @@ case "$(board_name)" in armsom,sige7|\ friendlyarm,nanopi-r3s|\ friendlyarm,nanopi-r5c|\ +hinlink,h66k|\ linkease,easepi-r1|\ lunzn,fastrhino-r66s|\ radxa,e25|\ @@ -72,6 +73,11 @@ hinlink,h28k|\ radxa,e20c) set_interface_core 2 "eth0" ;; +hinlink,h68k) + set_interface_core 2 "eth1" + set_interface_core 4 "eth2" + set_interface_core 8 "eth3" + ;; radxa,rock-5a|\ radxa,rock-5c) set_interface_core 10 "eth1" diff --git a/target/linux/rockchip/image/armv8.mk b/target/linux/rockchip/image/armv8.mk index b9f1fcab0ec..7114a03d4e9 100644 --- a/target/linux/rockchip/image/armv8.mk +++ b/target/linux/rockchip/image/armv8.mk @@ -192,6 +192,30 @@ define Device/hinlink_h28k endef TARGET_DEVICES += hinlink_h28k +define Device/hinlink_h6xk + $(Device/rk3568) + DEVICE_VENDOR := HINLINK + DEVICE_PACKAGES := kmod-ata-ahci-dwc kmod-mt7921e kmod-r8169 wpad-basic-mbedtls +endef + +define Device/hinlink_h66k + $(Device/hinlink_h6xk) + DEVICE_MODEL := H66K + DEVICE_DTS := rk3568-hinlink-h66k + UBOOT_DEVICE_NAME := hinlink-h66k-rk3568 +endef +TARGET_DEVICES += hinlink_h66k + +define Device/hinlink_h68k + $(Device/hinlink_h6xk) + DEVICE_MODEL := H68K + DEVICE_ALT0_VENDOR := LinkStar + DEVICE_ALT0_MODEL := H68K + DEVICE_DTS := rk3568-hinlink-h68k + UBOOT_DEVICE_NAME := hinlink-h68k-rk3568 +endef +TARGET_DEVICES += hinlink_h68k + define Device/linkease_easepi-r1 $(Device/rk3568) DEVICE_VENDOR := LinkEase diff --git a/target/linux/rockchip/patches-6.12/073-1-v6.18-arm64-dts-rockchip-Add-HINLINK-H68K.patch b/target/linux/rockchip/patches-6.12/073-1-v6.18-arm64-dts-rockchip-Add-HINLINK-H68K.patch new file mode 100644 index 00000000000..b1e53005c1e --- /dev/null +++ b/target/linux/rockchip/patches-6.12/073-1-v6.18-arm64-dts-rockchip-Add-HINLINK-H68K.patch @@ -0,0 +1,793 @@ +From 86a504b82f8d0e34f99ab9607712e7942c919fa3 Mon Sep 17 00:00:00 2001 +From: Chukun Pan +Date: Mon, 18 Aug 2025 18:00:08 +0800 +Subject: [PATCH] arm64: dts: rockchip: Add HINLINK H68K + +The HINLINK H68K is a development board with the +Rockchip RK3568 SoC. It has the following features: + +- 2/4GB LPDDR4 +- 1x HDMI Type A +- 3.5mm jack with mic +- 1x PCIE 2.0 WiFi slot +- 1x USB 3.0, 2x USB 2.0 +- 2x 1GbE RTL8211F Ethernet +- 2x 2.5GbE RTL8125B Ethernet +- MicroSD card slot / eMMC 32GB + +Signed-off-by: Chukun Pan +Link: https://lore.kernel.org/r/20250818100009.170202-4-amadeus@jmu.edu.cn +Signed-off-by: Heiko Stuebner +--- + arch/arm64/boot/dts/rockchip/Makefile | 1 + + .../boot/dts/rockchip/rk3568-hinlink-h68k.dts | 83 +++ + .../boot/dts/rockchip/rk3568-hinlink-opc.dtsi | 666 ++++++++++++++++++ + 3 files changed, 750 insertions(+) + create mode 100644 arch/arm64/boot/dts/rockchip/rk3568-hinlink-h68k.dts + create mode 100644 arch/arm64/boot/dts/rockchip/rk3568-hinlink-opc.dtsi + +--- a/arch/arm64/boot/dts/rockchip/Makefile ++++ b/arch/arm64/boot/dts/rockchip/Makefile +@@ -116,6 +116,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-ea + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb1-v10.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-fastrhino-r66s.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-fastrhino-r68s.dtb ++dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-hinlink-h68k.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-lubancat-2.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-mecsbc.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nanopi-r5c.dtb +--- /dev/null ++++ b/arch/arm64/boot/dts/rockchip/rk3568-hinlink-h68k.dts +@@ -0,0 +1,83 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++ ++/dts-v1/; ++ ++#include "rk3568-hinlink-opc.dtsi" ++ ++/ { ++ model = "HINLINK H68K"; ++ compatible = "hinlink,h68k", "rockchip,rk3568"; ++ ++ aliases { ++ ethernet0 = &gmac0; ++ ethernet1 = &gmac1; ++ }; ++}; ++ ++&gmac0 { ++ assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; ++ assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>; ++ assigned-clock-rates = <0>, <125000000>; ++ clock_in_out = "output"; ++ phy-handle = <&rgmii_phy0>; ++ phy-mode = "rgmii-id"; ++ phy-supply = <&vcc3v3_sys>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&gmac0_miim ++ &gmac0_tx_bus2 ++ &gmac0_rx_bus2 ++ &gmac0_rgmii_clk ++ &gmac0_rgmii_bus ++ &gmac0_rstn>; ++ status = "okay"; ++}; ++ ++&gmac1 { ++ assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; ++ assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>; ++ assigned-clock-rates = <0>, <125000000>; ++ clock_in_out = "output"; ++ phy-handle = <&rgmii_phy1>; ++ phy-mode = "rgmii-id"; ++ phy-supply = <&vcc3v3_sys>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&gmac1m1_miim ++ &gmac1m1_tx_bus2 ++ &gmac1m1_rx_bus2 ++ &gmac1m1_rgmii_clk ++ &gmac1m1_rgmii_bus ++ &gmac1_rstn>; ++ status = "okay"; ++}; ++ ++&mdio0 { ++ rgmii_phy0: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <0x1>; ++ reset-assert-us = <20000>; ++ reset-deassert-us = <100000>; ++ reset-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>; ++ }; ++}; ++ ++&mdio1 { ++ rgmii_phy1: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <0x1>; ++ reset-assert-us = <20000>; ++ reset-deassert-us = <100000>; ++ reset-gpios = <&gpio1 RK_PB0 GPIO_ACTIVE_LOW>; ++ }; ++}; ++ ++&pinctrl { ++ gmac { ++ gmac0_rstn: gmac0-rstn { ++ rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ gmac1_rstn: gmac1-rstn { ++ rockchip,pins = <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++}; +--- /dev/null ++++ b/arch/arm64/boot/dts/rockchip/rk3568-hinlink-opc.dtsi +@@ -0,0 +1,666 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++ ++#include ++#include ++#include ++#include ++#include ++#include "rk3568.dtsi" ++ ++/ { ++ aliases { ++ mmc0 = &sdhci; ++ mmc1 = &sdmmc0; ++ }; ++ ++ chosen { ++ stdout-path = "serial2:1500000n8"; ++ }; ++ ++ hdmi-con { ++ compatible = "hdmi-connector"; ++ type = "a"; ++ ++ port { ++ hdmi_con_in: endpoint { ++ remote-endpoint = <&hdmi_out_con>; ++ }; ++ }; ++ }; ++ ++ ir-receiver { ++ compatible = "gpio-ir-receiver"; ++ gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_LOW>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pwm3_ir_m0>; ++ }; ++ ++ keys { ++ compatible = "gpio-keys"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&factory>; ++ ++ button-factory { ++ label = "factory"; ++ linux,code = ; ++ gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>; ++ debounce-interval = <50>; ++ }; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&green_led>, <&red_led>, <&work_led>; ++ ++ led-0 { ++ color = ; ++ function = LED_FUNCTION_WAN; ++ gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger = "netdev"; ++ }; ++ ++ led-1 { ++ color = ; ++ function = LED_FUNCTION_DISK; ++ gpios = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>; ++ }; ++ ++ led-2 { ++ color = ; ++ function = LED_FUNCTION_STATUS; ++ gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger = "default-on"; ++ }; ++ }; ++ ++ vcc0v9_2g5: regulator-0v9-vcc-2g5 { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc0v9_2g5"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <900000>; ++ vin-supply = <&vcc5v0_sys>; ++ }; ++ ++ vcc12v_dcinp: regulator-12v-vcc-dcinp { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc12v_dcinp"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <12000000>; ++ regulator-max-microvolt = <12000000>; ++ }; ++ ++ vcc3v3_pi6c_05: regulator-3v3-vcc-pi6c-05 { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&lan_power_en>; ++ regulator-name = "vcc3v3_pi6c_05"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&vcc5v0_sys>; ++ }; ++ ++ vcc3v3_sd: regulator-3v3-vcc-sd { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sd_pwren>; ++ regulator-name = "vcc3v3_sd"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&vcc3v3_sys>; ++ }; ++ ++ vcc3v3_sys: regulator-3v3-vcc-sys { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc3v3_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&vcc5v0_sys>; ++ }; ++ ++ vcc5v0_sys: regulator-5v0-vcc-sys { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc5v0_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&vcc12v_dcinp>; ++ }; ++ ++ vcc5v0_usb30_otg0: regulator-5v0-vcc-usb30-otg0 { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&usb_power_en>; ++ regulator-name = "vcc5v0_usb30_otg0"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&vcc5v0_sys>; ++ }; ++}; ++ ++&combphy0 { ++ status = "okay"; ++}; ++ ++&combphy1 { ++ status = "okay"; ++}; ++ ++&combphy2 { ++ status = "okay"; ++}; ++ ++&cpu0 { ++ cpu-supply = <&vdd_cpu>; ++}; ++ ++&cpu1 { ++ cpu-supply = <&vdd_cpu>; ++}; ++ ++&cpu2 { ++ cpu-supply = <&vdd_cpu>; ++}; ++ ++&cpu3 { ++ cpu-supply = <&vdd_cpu>; ++}; ++ ++&gpu { ++ mali-supply = <&vdd_gpu>; ++ status = "okay"; ++}; ++ ++&hdmi { ++ avdd-0v9-supply = <&vdda0v9_image>; ++ avdd-1v8-supply = <&vcca1v8_image>; ++ status = "okay"; ++}; ++ ++&hdmi_in { ++ hdmi_in_vp0: endpoint { ++ remote-endpoint = <&vp0_out_hdmi>; ++ }; ++}; ++ ++&hdmi_out { ++ hdmi_out_con: endpoint { ++ remote-endpoint = <&hdmi_con_in>; ++ }; ++}; ++ ++&hdmi_sound { ++ status = "okay"; ++}; ++ ++&i2c0 { ++ status = "okay"; ++ ++ vdd_cpu: regulator@1c { ++ compatible = "tcs,tcs4525"; ++ reg = <0x1c>; ++ fcs,suspend-voltage-selector = <1>; ++ regulator-name = "vdd_cpu"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <800000>; ++ regulator-max-microvolt = <1150000>; ++ regulator-ramp-delay = <2300>; ++ vin-supply = <&vcc5v0_sys>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ rk809: pmic@20 { ++ compatible = "rockchip,rk809"; ++ reg = <0x20>; ++ #clock-cells = <1>; ++ interrupt-parent = <&gpio0>; ++ interrupts = ; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pmic_int>; ++ system-power-controller; ++ wakeup-source; ++ ++ vcc1-supply = <&vcc3v3_sys>; ++ vcc2-supply = <&vcc3v3_sys>; ++ vcc3-supply = <&vcc3v3_sys>; ++ vcc4-supply = <&vcc3v3_sys>; ++ vcc5-supply = <&vcc3v3_sys>; ++ vcc6-supply = <&vcc3v3_sys>; ++ vcc7-supply = <&vcc3v3_sys>; ++ vcc8-supply = <&vcc3v3_sys>; ++ vcc9-supply = <&vcc3v3_sys>; ++ ++ regulators { ++ vdd_logic: DCDC_REG1 { ++ regulator-name = "vdd_logic"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-initial-mode = <0x2>; ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-ramp-delay = <6001>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_gpu: DCDC_REG2 { ++ regulator-name = "vdd_gpu"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-initial-mode = <0x2>; ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-ramp-delay = <6001>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_ddr: DCDC_REG3 { ++ regulator-name = "vcc_ddr"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-initial-mode = <0x2>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vdd_npu: DCDC_REG4 { ++ regulator-name = "vdd_npu"; ++ regulator-initial-mode = <0x2>; ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-ramp-delay = <6001>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_1v8: DCDC_REG5 { ++ regulator-name = "vcc_1v8"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdda0v9_image: LDO_REG1 { ++ regulator-name = "vdda0v9_image"; ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <900000>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdda_0v9: LDO_REG2 { ++ regulator-name = "vdda_0v9"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <900000>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdda0v9_pmu: LDO_REG3 { ++ regulator-name = "vdda0v9_pmu"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <900000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <900000>; ++ }; ++ }; ++ ++ vccio_acodec: LDO_REG4 { ++ regulator-name = "vccio_acodec"; ++ regulator-always-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vccio_sd: LDO_REG5 { ++ regulator-name = "vccio_sd"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc3v3_pmu: LDO_REG6 { ++ regulator-name = "vcc3v3_pmu"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++ }; ++ ++ vcca_1v8: LDO_REG7 { ++ regulator-name = "vcca_1v8"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcca1v8_pmu: LDO_REG8 { ++ regulator-name = "vcca1v8_pmu"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcca1v8_image: LDO_REG9 { ++ regulator-name = "vcca1v8_image"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_3v3: SWITCH_REG1 { ++ regulator-name = "vcc_3v3"; ++ regulator-always-on; ++ regulator-boot-on; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc3v3: SWITCH_REG2 { ++ regulator-name = "vcc3v3"; ++ regulator-always-on; ++ regulator-boot-on; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ }; ++ }; ++}; ++ ++&i2c2 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c2m1_xfer>; ++ status = "okay"; ++}; ++ ++&i2s0_8ch { ++ status = "okay"; ++}; ++ ++&pcie2x1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&wifi_perstn>; ++ reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>; ++ vpcie3v3-supply = <&vcc3v3_pi6c_05>; ++ status = "okay"; ++}; ++ ++&pcie30phy { ++ data-lanes = <1 2>; ++ status = "okay"; ++}; ++ ++&pcie3x1 { ++ num-lanes = <1>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&lan_resetb>; ++ reset-gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>; ++ vpcie3v3-supply = <&vcc3v3_pi6c_05>; ++ status = "okay"; ++}; ++ ++&pcie3x2 { ++ num-lanes = <1>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&lan_reseta>; ++ reset-gpios = <&gpio2 RK_PD0 GPIO_ACTIVE_HIGH>; ++ vpcie3v3-supply = <&vcc3v3_pi6c_05>; ++ status = "okay"; ++}; ++ ++&pinctrl { ++ keys { ++ factory: factory { ++ rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ leds { ++ green_led: green-led { ++ rockchip,pins = <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ red_led: red-led { ++ rockchip,pins = <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ work_led: work-led { ++ rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ ir { ++ pwm3_ir_m0: pwm3-ir-m0 { ++ rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ mmc { ++ sd_pwren: sd-pwren { ++ rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ pcie { ++ lan_power_en: lan-power-en { ++ rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ lan_reseta: lan-reseta { ++ rockchip,pins = <2 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ lan_resetb: lan-resetb { ++ rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ wifi_perstn: wifi-perstn { ++ rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ pmic { ++ pmic_int: pmic-int { ++ rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ usb { ++ usb_power_en: usb-power-en { ++ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++}; ++ ++&pmu_io_domains { ++ pmuio1-supply = <&vcc3v3_pmu>; ++ pmuio2-supply = <&vcc3v3_pmu>; ++ vccio1-supply = <&vccio_acodec>; ++ vccio2-supply = <&vcc_1v8>; ++ vccio3-supply = <&vccio_sd>; ++ vccio4-supply = <&vcc_1v8>; ++ vccio5-supply = <&vcc_3v3>; ++ vccio6-supply = <&vcc_1v8>; ++ vccio7-supply = <&vcc_3v3>; ++ status = "okay"; ++}; ++ ++&pwm0 { ++ status = "okay"; ++}; ++ ++&saradc { ++ vref-supply = <&vcca_1v8>; ++ status = "okay"; ++}; ++ ++/* Via Type-C adapter */ ++&sata0 { ++ status = "okay"; ++}; ++ ++&sdhci { ++ bus-width = <8>; ++ cap-mmc-highspeed; ++ max-frequency = <200000000>; ++ mmc-hs200-1_8v; ++ non-removable; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>; ++ vmmc-supply = <&vcc_3v3>; ++ vqmmc-supply = <&vcc_1v8>; ++ status = "okay"; ++}; ++ ++&sdmmc0 { ++ bus-width = <4>; ++ cap-sd-highspeed; ++ cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; ++ disable-wp; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; ++ sd-uhs-sdr50; ++ vmmc-supply = <&vcc3v3_sd>; ++ vqmmc-supply = <&vccio_sd>; ++ status = "okay"; ++}; ++ ++&tsadc { ++ rockchip,hw-tshut-mode = <1>; ++ rockchip,hw-tshut-polarity = <0>; ++ status = "okay"; ++}; ++ ++&uart2 { ++ status = "okay"; ++}; ++ ++&usb_host0_ehci { ++ status = "okay"; ++}; ++ ++&usb_host0_ohci { ++ status = "okay"; ++}; ++ ++&usb_host1_ehci { ++ status = "okay"; ++}; ++ ++&usb_host1_ohci { ++ status = "okay"; ++}; ++ ++&usb_host1_xhci { ++ status = "okay"; ++}; ++ ++&usb2phy0 { ++ status = "okay"; ++}; ++ ++&usb2phy0_host { ++ phy-supply = <&vcc5v0_usb30_otg0>; ++ status = "okay"; ++}; ++ ++&usb2phy1 { ++ status = "okay"; ++}; ++ ++&usb2phy1_host { ++ phy-supply = <&vcc5v0_usb30_otg0>; ++ status = "okay"; ++}; ++ ++&usb2phy1_otg { ++ phy-supply = <&vcc5v0_usb30_otg0>; ++ status = "okay"; ++}; ++ ++&vop { ++ assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; ++ assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; ++ status = "okay"; ++}; ++ ++&vop_mmu { ++ status = "okay"; ++}; ++ ++&vp0 { ++ vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { ++ reg = ; ++ remote-endpoint = <&hdmi_in_vp0>; ++ }; ++}; diff --git a/target/linux/rockchip/patches-6.12/073-2-v6.18-arm64-dts-rockchip-Add-HINLINK-H66K.patch b/target/linux/rockchip/patches-6.12/073-2-v6.18-arm64-dts-rockchip-Add-HINLINK-H66K.patch new file mode 100644 index 00000000000..976868e5cc8 --- /dev/null +++ b/target/linux/rockchip/patches-6.12/073-2-v6.18-arm64-dts-rockchip-Add-HINLINK-H66K.patch @@ -0,0 +1,48 @@ +From bb9ef44f05c9558d58e3c9da141e93af1aa11c1f Mon Sep 17 00:00:00 2001 +From: Chukun Pan +Date: Mon, 18 Aug 2025 18:00:09 +0800 +Subject: [PATCH] arm64: dts: rockchip: Add HINLINK H66K + +The HINLINK H66K is a development board with the +Rockchip RK3568 SoC. It has the following features: + +- 2/4GB LPDDR4 +- 1x HDMI Type A +- 3.5mm jack with mic +- 1x PCIE 2.0 WiFi slot +- 1x USB 3.0, 2x USB 2.0 +- 2x 2.5GbE RTL8125B Ethernet +- MicroSD card slot / eMMC 32GB + +Signed-off-by: Chukun Pan +Link: https://lore.kernel.org/r/20250818100009.170202-5-amadeus@jmu.edu.cn +Signed-off-by: Heiko Stuebner +--- + arch/arm64/boot/dts/rockchip/Makefile | 1 + + arch/arm64/boot/dts/rockchip/rk3568-hinlink-h66k.dts | 10 ++++++++++ + 2 files changed, 11 insertions(+) + create mode 100644 arch/arm64/boot/dts/rockchip/rk3568-hinlink-h66k.dts + +--- a/arch/arm64/boot/dts/rockchip/Makefile ++++ b/arch/arm64/boot/dts/rockchip/Makefile +@@ -116,6 +116,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-ea + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb1-v10.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-fastrhino-r66s.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-fastrhino-r68s.dtb ++dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-hinlink-h66k.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-hinlink-h68k.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-lubancat-2.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-mecsbc.dtb +--- /dev/null ++++ b/arch/arm64/boot/dts/rockchip/rk3568-hinlink-h66k.dts +@@ -0,0 +1,10 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++ ++/dts-v1/; ++ ++#include "rk3568-hinlink-opc.dtsi" ++ ++/ { ++ model = "HINLINK H66K"; ++ compatible = "hinlink,h66k", "rockchip,rk3568"; ++}; diff --git a/target/linux/rockchip/patches-6.12/121-arm64-dts-rockchip-add-led-aliases-for-HINLINK.patch b/target/linux/rockchip/patches-6.12/121-arm64-dts-rockchip-add-led-aliases-for-HINLINK.patch index ce70a695759..a1cda8f22b8 100644 --- a/target/linux/rockchip/patches-6.12/121-arm64-dts-rockchip-add-led-aliases-for-HINLINK.patch +++ b/target/linux/rockchip/patches-6.12/121-arm64-dts-rockchip-add-led-aliases-for-HINLINK.patch @@ -21,3 +21,26 @@ color = ; function = LED_FUNCTION_STATUS; gpios = <&gpio4 RK_PB7 GPIO_ACTIVE_LOW>; +--- a/arch/arm64/boot/dts/rockchip/rk3568-hinlink-opc.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3568-hinlink-opc.dtsi +@@ -11,6 +11,11 @@ + aliases { + mmc0 = &sdhci; + mmc1 = &sdmmc0; ++ ++ led-boot = &led_work; ++ led-failsafe = &led_work; ++ led-running = &led_work; ++ led-upgrade = &led_work; + }; + + chosen { +@@ -66,7 +71,7 @@ + gpios = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>; + }; + +- led-2 { ++ led_work: led-2 { + color = ; + function = LED_FUNCTION_STATUS; + gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>; -- 2.47.3