git.ipfire.org Git - thirdparty/kernel/stable-queue.git/blob

   1 From 4dc49062a7e9c0c7261807fb855df1c611eb78c3 Mon Sep 17 00:00:00 2001
   2 From: Yaliang Wang <Yaliang.Wang@windriver.com>
   3 Date: Mon, 17 Oct 2022 01:19:01 +0800
   4 Subject: mtd: spi-nor: gigadevice: gd25q256: replace gd25q256_default_init with gd25q256_post_bfpt
   5
   6 From: Yaliang Wang <Yaliang.Wang@windriver.com>
   7
   8 commit 4dc49062a7e9c0c7261807fb855df1c611eb78c3 upstream.
   9
  10 When utilizing PARSE_SFDP to initialize the flash parameter, the
  11 deprecated initializing method spi_nor_init_params_deprecated() and the
  12 function spi_nor_manufacturer_init_params() within it will never be
  13 executed, which results in the default_init hook function will also never
  14 be executed.
  15
  16 This is okay for 'D' generation of GD25Q256, because 'D' generation is
  17 implementing the JESD216B standards, it has QER field defined in BFPT,
  18 parsing the SFDP can properly set the quad_enable function. The 'E'
  19 generation also implements the JESD216B standards, and it has the same
  20 status register definitions as 'D' generation, parsing the SFDP to set
  21 the quad_enable function should also work for 'E' generation.
  22
  23 However, the same thing can't apply to 'C' generation. 'C' generation
  24 'GD25Q256C' implements the JESD216 standards, and it doesn't have the
  25 QER field defined in BFPT, since it does have QE bit in status register
  26 1, the quad_enable hook needs to be tweaked to properly set the
  27 quad_enable function, this can be done in post_bfpt fixup hook.
  28
  29 Fixes: 047275f7de18 ("mtd: spi-nor: gigadevice: gd25q256: Init flash based on SFDP")
  30 Reported-by: kernel test robot <lkp@intel.com>
  31 Signed-off-by: Yaliang Wang <Yaliang.Wang@windriver.com>
  32 [tudor.ambarus@microchip.com: Update comment in gd25q256_post_bfpt]
  33 Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
  34 Cc: stable@vger.kernel.org
  35 Link: https://lore.kernel.org/r/20221016171901.1483542-2-yaliang.wang@windriver.com
  36 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  37 ---
  38  drivers/mtd/spi-nor/gigadevice.c |   24 +++++++++++++++++-------
  39  1 file changed, 17 insertions(+), 7 deletions(-)
  40
  41 --- a/drivers/mtd/spi-nor/gigadevice.c
  42 +++ b/drivers/mtd/spi-nor/gigadevice.c
  43 @@ -8,19 +8,29 @@
  44
  45  #include "core.h"
  46
  47 -static void gd25q256_default_init(struct spi_nor *nor)
  48 +static int
  49 +gd25q256_post_bfpt(struct spi_nor *nor,
  50 +                  const struct sfdp_parameter_header *bfpt_header,
  51 +                  const struct sfdp_bfpt *bfpt)
  52  {
  53         /*
  54 -        * Some manufacturer like GigaDevice may use different
  55 -        * bit to set QE on different memories, so the MFR can't
  56 -        * indicate the quad_enable method for this case, we need
  57 -        * to set it in the default_init fixup hook.
  58 +        * GD25Q256C supports the first version of JESD216 which does not define
  59 +        * the Quad Enable methods. Overwrite the default Quad Enable method.
  60 +        *
  61 +        * GD25Q256 GENERATION | SFDP MAJOR VERSION | SFDP MINOR VERSION
  62 +        *      GD25Q256C      | SFDP_JESD216_MAJOR | SFDP_JESD216_MINOR
  63 +        *      GD25Q256D      | SFDP_JESD216_MAJOR | SFDP_JESD216B_MINOR
  64 +        *      GD25Q256E      | SFDP_JESD216_MAJOR | SFDP_JESD216B_MINOR
  65          */
  66 -       nor->params->quad_enable = spi_nor_sr1_bit6_quad_enable;
  67 +       if (bfpt_header->major == SFDP_JESD216_MAJOR &&
  68 +           bfpt_header->minor == SFDP_JESD216_MINOR)
  69 +               nor->params->quad_enable = spi_nor_sr1_bit6_quad_enable;
  70 +
  71 +       return 0;
  72  }
  73
  74  static const struct spi_nor_fixups gd25q256_fixups = {
  75 -       .default_init = gd25q256_default_init,
  76 +       .post_bfpt = gd25q256_post_bfpt,
  77  };
  78
  79  static const struct flash_info gigadevice_nor_parts[] = {