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   1 From stable+bounces-189148-greg=kroah.com@vger.kernel.org Thu Oct 23 18:15:45 2025
   2 From: Babu Moger <babu.moger@amd.com>
   3 Date: Thu, 23 Oct 2025 11:12:40 -0500
   4 Subject: x86/resctrl: Fix miscount of bandwidth event when reactivating previously unavailable RMID
   5 To: <stable@vger.kernel.org>
   6 Message-ID: <20251023161240.75240-1-babu.moger@amd.com>
   7
   8 From: Babu Moger <babu.moger@amd.com>
   9
  10 Users can create as many monitoring groups as the number of RMIDs supported
  11 by the hardware. However, on AMD systems, only a limited number of RMIDs
  12 are guaranteed to be actively tracked by the hardware. RMIDs that exceed
  13 this limit are placed in an "Unavailable" state.
  14
  15 When a bandwidth counter is read for such an RMID, the hardware sets
  16 MSR_IA32_QM_CTR.Unavailable (bit 62). When such an RMID starts being tracked
  17 again the hardware counter is reset to zero. MSR_IA32_QM_CTR.Unavailable
  18 remains set on first read after tracking re-starts and is clear on all
  19 subsequent reads as long as the RMID is tracked.
  20
  21 resctrl miscounts the bandwidth events after an RMID transitions from the
  22 "Unavailable" state back to being tracked. This happens because when the
  23 hardware starts counting again after resetting the counter to zero, resctrl
  24 in turn compares the new count against the counter value stored from the
  25 previous time the RMID was tracked.
  26
  27 This results in resctrl computing an event value that is either undercounting
  28 (when new counter is more than stored counter) or a mistaken overflow (when
  29 new counter is less than stored counter).
  30
  31 Reset the stored value (arch_mbm_state::prev_msr) of MSR_IA32_QM_CTR to
  32 zero whenever the RMID is in the "Unavailable" state to ensure accurate
  33 counting after the RMID resets to zero when it starts to be tracked again.
  34
  35 Example scenario that results in mistaken overflow
  36 ==================================================
  37 1. The resctrl filesystem is mounted, and a task is assigned to a
  38    monitoring group.
  39
  40    $mount -t resctrl resctrl /sys/fs/resctrl
  41    $mkdir /sys/fs/resctrl/mon_groups/test1/
  42    $echo 1234 > /sys/fs/resctrl/mon_groups/test1/tasks
  43
  44    $cat /sys/fs/resctrl/mon_groups/test1/mon_data/mon_L3_*/mbm_total_bytes
  45    21323            <- Total bytes on domain 0
  46    "Unavailable"    <- Total bytes on domain 1
  47
  48    Task is running on domain 0. Counter on domain 1 is "Unavailable".
  49
  50 2. The task runs on domain 0 for a while and then moves to domain 1. The
  51    counter starts incrementing on domain 1.
  52
  53    $cat /sys/fs/resctrl/mon_groups/test1/mon_data/mon_L3_*/mbm_total_bytes
  54    7345357          <- Total bytes on domain 0
  55    4545             <- Total bytes on domain 1
  56
  57 3. At some point, the RMID in domain 0 transitions to the "Unavailable"
  58    state because the task is no longer executing in that domain.
  59
  60    $cat /sys/fs/resctrl/mon_groups/test1/mon_data/mon_L3_*/mbm_total_bytes
  61    "Unavailable"    <- Total bytes on domain 0
  62    434341           <- Total bytes on domain 1
  63
  64 4.  Since the task continues to migrate between domains, it may eventually
  65     return to domain 0.
  66
  67     $cat /sys/fs/resctrl/mon_groups/test1/mon_data/mon_L3_*/mbm_total_bytes
  68     17592178699059  <- Overflow on domain 0
  69     3232332         <- Total bytes on domain 1
  70
  71 In this case, the RMID on domain 0 transitions from "Unavailable" state to
  72 active state. The hardware sets MSR_IA32_QM_CTR.Unavailable (bit 62) when
  73 the counter is read and begins tracking the RMID counting from 0.
  74
  75 Subsequent reads succeed but return a value smaller than the previously
  76 saved MSR value (7345357). Consequently, the resctrl's overflow logic is
  77 triggered, it compares the previous value (7345357) with the new, smaller
  78 value and incorrectly interprets this as a counter overflow, adding a large
  79 delta.
  80
  81 In reality, this is a false positive: the counter did not overflow but was
  82 simply reset when the RMID transitioned from "Unavailable" back to active
  83 state.
  84
  85 Here is the text from APM [1] available from [2].
  86
  87 "In PQOS Version 2.0 or higher, the MBM hardware will set the U bit on the
  88 first QM_CTR read when it begins tracking an RMID that it was not
  89 previously tracking. The U bit will be zero for all subsequent reads from
  90 that RMID while it is still tracked by the hardware. Therefore, a QM_CTR
  91 read with the U bit set when that RMID is in use by a processor can be
  92 considered 0 when calculating the difference with a subsequent read."
  93
  94 [1] AMD64 Architecture Programmer's Manual Volume 2: System Programming
  95     Publication # 24593 Revision 3.41 section 19.3.3 Monitoring L3 Memory
  96     Bandwidth (MBM).
  97
  98   [ bp: Split commit message into smaller paragraph chunks for better
  99     consumption. ]
 100
 101 Fixes: 4d05bf71f157d ("x86/resctrl: Introduce AMD QOS feature")
 102 Signed-off-by: Babu Moger <babu.moger@amd.com>
 103 Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
 104 Reviewed-by: Reinette Chatre <reinette.chatre@intel.com>
 105 Tested-by: Reinette Chatre <reinette.chatre@intel.com>
 106 Cc: stable@vger.kernel.org # needs adjustments for <= v6.17
 107 Link: https://bugzilla.kernel.org/show_bug.cgi?id=206537 # [2]
 108 (cherry picked from commit 15292f1b4c55a3a7c940dbcb6cb8793871ed3d92)
 109 [babu.moger@amd.com: Fix conflict for v6.6 stable]
 110 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 111 ---
 112  arch/x86/kernel/cpu/resctrl/monitor.c |    8 ++++++--
 113  1 file changed, 6 insertions(+), 2 deletions(-)
 114
 115 --- a/arch/x86/kernel/cpu/resctrl/monitor.c
 116 +++ b/arch/x86/kernel/cpu/resctrl/monitor.c
 117 @@ -241,11 +241,15 @@ int resctrl_arch_rmid_read(struct rdt_re
 118         if (!cpumask_test_cpu(smp_processor_id(), &d->cpu_mask))
 119                 return -EINVAL;
 120
 121 +       am = get_arch_mbm_state(hw_dom, rmid, eventid);
 122 +
 123         ret = __rmid_read(rmid, eventid, &msr_val);
 124 -       if (ret)
 125 +       if (ret) {
 126 +               if (am && ret == -EINVAL)
 127 +                       am->prev_msr = 0;
 128                 return ret;
 129 +       }
 130
 131 -       am = get_arch_mbm_state(hw_dom, rmid, eventid);
 132         if (am) {
 133                 am->chunks += mbm_overflow_count(am->prev_msr, msr_val,
 134                                                  hw_res->mbm_width);