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   1 From 10ab329b5db7e592a3a60b4594e4e5f40b60c45c Mon Sep 17 00:00:00 2001
   2 From: Takahisa Tanaka <mc74hc00@gmail.com>
   3 Date: Mon, 14 Jan 2013 11:01:57 +0900
   4 Subject: watchdog: sp5100_tco: Fix wrong indirect I/O access for getting value of reserved bits
   5
   6 From: Takahisa Tanaka <mc74hc00@gmail.com>
   7
   8 commit 10ab329b5db7e592a3a60b4594e4e5f40b60c45c upstream.
   9
  10 In case of SB800 or later chipset and re-programming MMIO address(*),
  11 sp5100_tco module may read incorrect value of reserved bit, because the module
  12 reads a value from an incorrect I/O address. However, this bug doesn't cause
  13 a problem, because when re-programming MMIO address, by chance the module
  14 writes zero (this is BIOS's default value) to the low three bits of register.
  15 * In most cases, PC with SB8x0 or later chipset doesn't need to re-programming
  16   MMIO address, because such PC can enable AcpiMmio and can use 0xfed80b00 for
  17   watchdog register base address.
  18
  19 This patch fixes this bug.
  20
  21 Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=43176
  22 Signed-off-by: Takahisa Tanaka <mc74hc00@gmail.com>
  23 Tested-by: Paul Menzel <paulepanter@users.sourceforge.net>
  24 Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
  25 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  26
  27 ---
  28  drivers/watchdog/sp5100_tco.c |    5 +++--
  29  1 file changed, 3 insertions(+), 2 deletions(-)
  30
  31 --- a/drivers/watchdog/sp5100_tco.c
  32 +++ b/drivers/watchdog/sp5100_tco.c
  33 @@ -500,14 +500,15 @@ static unsigned char sp5100_tco_setupdev
  34         /* Restore to the low three bits, if chipset is SB8x0(or later) */
  35         if (sp5100_tco_pci->revision >= 0x40) {
  36                 u8 reserved_bit;
  37 -               reserved_bit = inb(base_addr) & 0x7;
  38 +               outb(base_addr+0, index_reg);
  39 +               reserved_bit = inb(data_reg) & 0x7;
  40                 val |= (u32)reserved_bit;
  41         }
  42
  43         /* Re-programming the watchdog timer base address */
  44         outb(base_addr+0, index_reg);
  45         /* Low three bits of BASE are reserved */
  46 -       outb((val >>  0) & 0xf8, data_reg);
  47 +       outb((val >>  0) & 0xff, data_reg);
  48         outb(base_addr+1, index_reg);
  49         outb((val >>  8) & 0xff, data_reg);
  50         outb(base_addr+2, index_reg);