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fpga: zynqpl: Add dcache flush support
authorJagannadha Sutradharudu Teki <jagannadha.sutradharudu-teki@xilinx.com>
Fri, 20 Sep 2013 13:09:47 +0000 (18:39 +0530)
committerMichal Simek <michal.simek@xilinx.com>
Fri, 20 Sep 2013 13:20:04 +0000 (15:20 +0200)
commit0284db22e86573ff5870df7553e735c47cc9235d
treedbeaf7475caaaeabbf63a978f2cbe1207f812bc9tree | snapshot
parente1808144fdbc79159b72318e6eb8bcab03fd9bf4commit | diff
fpga: zynqpl: Add dcache flush support

Buffers must be cache and dma aligned.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
drivers/fpga/zynqpl.c diff | blob | blame | history
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