]> git.ipfire.org Git - thirdparty/glibc.git/commit
riscv: memcpy_noalignment: Reorder to store via a3, then bump a3
authorYao Zihong <zihong.plct@isrc.iscas.ac.cn>
Thu, 30 Oct 2025 22:49:21 +0000 (17:49 -0500)
committerPeter Bergner <bergner@tenstorrent.com>
Thu, 30 Oct 2025 22:49:21 +0000 (17:49 -0500)
commit09a94c86ca30e2ec5c07a23eae0d9855b631de04
tree6ad0dc315811475d9f5a207f54ed43975418ddb2
parent0698fd462a22d5e0fda71ef1dce04656d17a7c5f
riscv: memcpy_noalignment: Reorder to store via a3, then bump a3

Rewrite the copy micro-step from:

    REG_L  a4, 0(a5)
    addi   a3, a3, SZREG
    addi   a5, a5, SZREG
    REG_S  a4, -SZREG(a3)

to:

    REG_L  a4, 0(a5)
    addi   a5, a5, SZREG
    REG_S  a4, 0(a3)
    addi   a3, a3, SZREG

Semantics are unchanged: both read *(a5_old), write *(a3_old), and then
increment a3/a5 by SZREG. memcpy assumes non-overlapping regions, so the
reordering preserves correctness.

No functional change.

Signed-off-by: Yao Zihong <zihong.plct@isrc.iscas.ac.cn>
Reviewed-by: Peter Bergner <bergner@tenstorrent.com>
sysdeps/riscv/multiarch/memcpy_noalignment.S