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(parent: c81f35c) | patch
drm/amd/display: Add dcn42 register headers
authorRoman Li <Roman.Li@amd.com>
Mon, 2 Feb 2026 22:11:43 +0000 (17:11 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 23 Feb 2026 19:28:32 +0000 (14:28 -0500)
commit2214b716a4bdae0dcaa5f08a190396dec9d8ef2f
tree204051f6b7f435613692b5309317dad53a957550tree | snapshot
parentc81f35cdbab210cb8581a0502ba7355d14570abccommit | diff
drm/amd/display: Add dcn42 register headers

Register headers for the following IPs:
- DCN  4.2.0
- DPCS 4.0.0

Signed-off-by: Roman Li <Roman.Li@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_4_2_0_offset.h [new file with mode: 0644] blob
drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_4_2_0_sh_mask.h [new file with mode: 0644] blob
drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_4_0_0_offset.h [new file with mode: 0644] blob
drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_4_0_0_sh_mask.h [new file with mode: 0644] blob
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