]> git.ipfire.org Git - thirdparty/kernel/stable.git/commit
perf/x86/intel: Add ICL_FIXED_0_ADAPTIVE bit into INTEL_FIXED_BITS_MASK
authorDapeng Mi <dapeng1.mi@linux.intel.com>
Wed, 20 Aug 2025 02:30:31 +0000 (10:30 +0800)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Sun, 2 Nov 2025 13:15:20 +0000 (22:15 +0900)
commit2aef7015d01387ed079ca22e158e828f5e6a4aec
treecb45358be001e98f850d0b46790529288db93970
parent9bdd94885320bc65563c291aafeb584dfff50f97
perf/x86/intel: Add ICL_FIXED_0_ADAPTIVE bit into INTEL_FIXED_BITS_MASK

[ Upstream commit 2676dbf9f4fb7f6739d1207c0f1deaf63124642a ]

ICL_FIXED_0_ADAPTIVE is missed to be added into INTEL_FIXED_BITS_MASK,
add it.

With help of this new INTEL_FIXED_BITS_MASK, intel_pmu_enable_fixed() can
be optimized. The old fixed counter control bits can be unconditionally
cleared with INTEL_FIXED_BITS_MASK and then set new control bits base on
new configuration.

Signed-off-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Kan Liang <kan.liang@linux.intel.com>
Tested-by: Yi Lai <yi1.lai@intel.com>
Link: https://lore.kernel.org/r/20250820023032.17128-7-dapeng1.mi@linux.intel.com
Signed-off-by: Sasha Levin <sashal@kernel.org>
arch/x86/events/intel/core.c
arch/x86/include/asm/perf_event.h
arch/x86/kvm/pmu.h