]> git.ipfire.org Git - thirdparty/kernel/linux.git/commit
cxl/hdm: Add support for 32 switch decoders
authorLi Ming <ming.li@zohomail.com>
Sat, 21 Mar 2026 06:14:59 +0000 (14:14 +0800)
committerDave Jiang <dave.jiang@intel.com>
Fri, 10 Apr 2026 15:32:14 +0000 (08:32 -0700)
commit3624a22783b74ffebaa7d9f286e203604baa06c7
tree47dd3c8a65b93196fe2db48168f8bcf01d356246
parent9b6e1ed28a7f239cc9184101cedc6fec4c3b3dc9
cxl/hdm: Add support for 32 switch decoders

Per CXL r4.0 section 8.2.4.20.1. CXL host bridge and switch ports can
support 32 HDM decoders. Current implementation misses some decoders on
CXL host bridge and switch in the case that the value of Decoder Count
field in CXL HDM decoder Capability Register is greater than or equal to
9.

Update calculation implementation to ensure the decoder count calculation
is correct for CXL host bridge/switch ports.

Signed-off-by: Li Ming <ming.li@zohomail.com>
Reviewed-by: Gregory Price <gourry@gourry.net>
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
Reviewed-by: Alison Schofield <alison.schofield@intel.com>
Link: https://patch.msgid.link/20260321061459.1910205-1-ming.li@zohomail.com
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
drivers/cxl/core/hdm.c
drivers/cxl/cxl.h
drivers/cxl/cxlmem.h