]> git.ipfire.org Git - thirdparty/kernel/linux.git/commit
mips: pci-mt7620: fix bridge register access
authorShiji Yang <yangshiji66@outlook.com>
Wed, 18 Jun 2025 03:42:05 +0000 (11:42 +0800)
committerThomas Bogendoerfer <tsbogend@alpha.franken.de>
Mon, 6 Apr 2026 12:05:58 +0000 (14:05 +0200)
commit3dbb08276836de58fc3097526c4bd9c3abe8f142
tree692bdb756a6182278822c48a9fdd161b65cb3969
parentc7dd395d7b53a66de8503507fe7ef21b8fab3e57
mips: pci-mt7620: fix bridge register access

Host bridge registers and PCI RC control registers have different
memory base. pcie_m32() is used to write the RC control registers
instead of bridge registers. This patch introduces bridge_m32()
and use it to operate bridge registers to fix the access issue.

Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
arch/mips/pci/pci-mt7620.c