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clk: qcom: dispcc-sm6350: Add MDSS_CORE & MDSS_RSCC resets
authorLuca Weiss <luca.weiss@fairphone.com>
Fri, 19 Sep 2025 09:57:24 +0000 (11:57 +0200)
committerBjorn Andersson <andersson@kernel.org>
Wed, 22 Oct 2025 21:36:42 +0000 (16:36 -0500)
commit502099e9c832c95b485835ff58a5f735d9d956a1
treea9c6710c2c1cd0a91b0a352e85e05bdf23eb0ff7tree | snapshot
parentff71d2d85de70ac7aa86f914ff87fb460ab8d14acommit | diff
clk: qcom: dispcc-sm6350: Add MDSS_CORE & MDSS_RSCC resets

Add the offsets for two resets inside the dispcc on SM6350 SoC.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250919-sm6350-mdss-reset-v1-2-48dcac917c73@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
drivers/clk/qcom/dispcc-sm6350.c diff | blob | blame | history
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