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(parent: cb50fae) | patch
drm/amd/display: Clamp min DS DCFCLK value to DCN limit
authorRoman Li <Roman.Li@amd.com>
Sat, 14 Mar 2026 00:34:48 +0000 (20:34 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 23 Mar 2026 18:13:05 +0000 (14:13 -0400)
commit5a90bb2160394fc2fb835ad8142891aea194fe3c
tree4e8fe97bc79d77055bc195b0f53051a0fbacf707tree | snapshot
parentcb50faeb0d7585fed52231627d632462b9f927b0commit | diff
drm/amd/display: Clamp min DS DCFCLK value to DCN limit

[why & how]
DCN has a global limit for minimum DS DCFCLK during any operation.

Adhere to that limit and add a debug flag.

Reviewed-by: Charlene Liu <charlene.liu@amd.com>
Signed-off-by: Ovidiu Bunea <ovidiu.bunea@amd.com>
Signed-off-by: Roman Li <roman.li@amd.com>
Signed-off-by: Chuanyu Tseng <Chuanyu.Tseng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/dcn42_clk_mgr.c diff | blob | blame | history
drivers/gpu/drm/amd/display/dc/dc.h diff | blob | blame | history
drivers/gpu/drm/amd/display/dc/resource/dcn42/dcn42_resource.c diff | blob | blame | history
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