]> git.ipfire.org Git - thirdparty/kernel/linux.git/commit
arm64: dts: intel: agilex5: Drop CPU masks from GICv3 PPI interrupts
authorGeert Uytterhoeven <geert+renesas@glider.be>
Wed, 4 Mar 2026 17:11:02 +0000 (18:11 +0100)
committerDinh Nguyen <dinguyen@kernel.org>
Tue, 31 Mar 2026 02:27:28 +0000 (21:27 -0500)
commit625af11fb9885f202e028ea5afa0037f3014e376
tree3c46ceee46b0ecb71ceab3fda42889065f03cc61
parentbb5f66f36bebb3404307a737973a573c0c05f98a
arm64: dts: intel: agilex5: Drop CPU masks from GICv3 PPI interrupts

Unlike older GIC variants, the GICv3 DT bindings do not support
specifying a CPU mask in PPI interrupt specifiers.  Drop the masks.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi