]> git.ipfire.org Git - thirdparty/linux.git/commit
mtd: spi-nor: winbond: Add W25H02NWxxAM CMP locking support
authorMiquel Raynal <miquel.raynal@bootlin.com>
Tue, 26 May 2026 14:56:49 +0000 (16:56 +0200)
committerPratyush Yadav <pratyush@kernel.org>
Wed, 27 May 2026 12:36:03 +0000 (14:36 +0200)
commit751e4b02c469ac84e390c472fd30e2c512e3f587
treebd83f0279a344b20594e06036aff35f5ffbad55c
parent855599425e1aefb499e7bf90c34f708ebbb63045
mtd: spi-nor: winbond: Add W25H02NWxxAM CMP locking support

This chip has support for the locking complement (CMP) feature. Add
the relevant bit to enable it.

Unfortunately, this chip also comes with an incorrect BFPT table,
indicating the Control Register cannot be read back. This is wrong,
reading back the register works and has no (observed) side effect. The
datasheet clearly indicates supporting the 35h command and all bits from
the CR are marked readable. QE and CMP bits are inside, and can be
properly read back.

Add a fixup for this, otherwise it would defeat the use of the CMP
feature.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Pratyush Yadav <pratyush@kernel.org>
drivers/mtd/spi-nor/winbond.c