]> git.ipfire.org Git - thirdparty/qemu.git/commit
target/arm: Honour FPCR.AH=1 default NaN value in FMAXNMQV, FMINNMQV
authorPeter Maydell <peter.maydell@linaro.org>
Fri, 18 Jul 2025 17:30:31 +0000 (18:30 +0100)
committerPeter Maydell <peter.maydell@linaro.org>
Mon, 21 Jul 2025 10:15:08 +0000 (11:15 +0100)
commit82a1c5c661ef9ab567b7946b75240963c153a3b0
treefbbb16c7fdb730a16173fe9d4be7beda851bf566
parent07327d5f451162a841747836ff05cc6dd6e8c023
target/arm: Honour FPCR.AH=1 default NaN value in FMAXNMQV, FMINNMQV

The FMAXNMQV and FMINNMQV insns use the default NaN as their identity
value for inactive source vector elements. We open-coded this in
sve_helper.c, hoping to avoid a function call. However, this fails
to account for FPCR.AH=1 changing the default NaN value to set the
sign bit. Use a call to floatN_default_nan() to obtain this value.

Fixes: 1de7ecfc12d05 ("target/arm: Implement FADDQV, F{MIN, MAX}{NM}QV for SVE2p1")
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20250718173032.2498900-10-peter.maydell@linaro.org
target/arm/tcg/sve_helper.c