]> git.ipfire.org Git - thirdparty/kernel/linux.git/commit
arm64: dts: qcom: qcs8300: Add EPSS l3 interconnect provider node and CPUCP OPP table...
authorRaviteja Laggyshetty <raviteja.laggyshetty@oss.qualcomm.com>
Tue, 22 Jul 2025 05:50:39 +0000 (05:50 +0000)
committerBjorn Andersson <andersson@kernel.org>
Mon, 11 Aug 2025 21:43:43 +0000 (16:43 -0500)
commitbebacd802b51fae87e04a0f2b6eeb66ac259c14e
tree6d4819cc3c3afb3dfa21535d579e4525cb56ef86
parentdf758a868dbc90cae98044d52a9d753575f50cfa
arm64: dts: qcom: qcs8300: Add EPSS l3 interconnect provider node and CPUCP OPP tables to scale DDR/L3

Add Epoch Subsystem (EPSS) L3 interconnect provider node and OPP tables
required to scale DDR and L3 per freq-domain on QCS8300 platform.
As QCS8300 and SA8775P SoCs have same EPSS hardware, added SA8775P
compatible as fallback for QCS8300 EPSS device node.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Co-developed-by: Imran Shaik <quic_imrashai@quicinc.com>
Signed-off-by: Imran Shaik <quic_imrashai@quicinc.com>
Signed-off-by: Raviteja Laggyshetty <raviteja.laggyshetty@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250722055039.135140-2-raviteja.laggyshetty@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
arch/arm64/boot/dts/qcom/qcs8300.dtsi