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(parent: cd2d36e) | patch
dmaengine: dw-edma: Add Xilinx CPM6-DMA DeviceID
authorDevendra K Verma <devverma@amd.com>
Fri, 5 Jun 2026 11:28:29 +0000 (16:58 +0530)
committerVinod Koul <vkoul@kernel.org>
Mon, 8 Jun 2026 11:32:20 +0000 (17:02 +0530)
commitc4441b95ae8012a99c6fe22b4f56155e0ddbd042
treec4105556709da31c4905f9cfa6e761b369b0b220tree | snapshot
parentcd2d36e8ae61832aaac3bddf5aafdab72821e6b9commit | diff
dmaengine: dw-edma: Add Xilinx CPM6-DMA DeviceID

Add Device ID for AMD (Xilinx) CPM6 DMA IP. This IP enables
64 Read and 64 Write Channels.

Adding the relevant dw_edma_pcie_data to use 8 Read and 8 Write
channels for initial commit.

Signed-off-by: Devendra K Verma <devendra.verma@amd.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Link: https://patch.msgid.link/20260605112829.679697-1-devendra.verma@amd.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
drivers/dma/dw-edma/dw-edma-pcie.c diff | blob | blame | history
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