amdgcn: Remove vector alignment restrictions

amdgcn: Remove vector alignment restrictions

The supported misalignment logic seems to be a bit arbitrary.  Some of it looks
like it was copied from the Arm implementation, although testing shows that the
packed accesses do not work (weird subregs happen).

AMD GCN does have some alignment restrictions on Buffer instructions, but as we
don't use those that's irrelvant.  The Flat and Global instructions (that we do
use) have no such restrictions.

LDS memory -- which can be accessed via Flat instructions -- does have
alignment restrictions, but the compiler is not using LDS for arbitrary
vectors.  If the user deliberately choses to place unaligned data in
low-latency memory then a runtime exception should occur (no silent bad
behaviour), so there's no reason to pessimise the normal case.

gcc/ChangeLog:

	* config/gcn/gcn.cc
	(gcn_vectorize_support_vector_misalignment): Allow any alignment, as
	long as it's not packed.