drm/i915/de: Implement register polling in the display code

drm/i915/de: Implement register polling in the display code

The plan is to move all the mmio stuff into the display code itself.
As a first step implement the register polling in intel_de.c.

Currently i915 and xe implement this stuff in slightly different
ways, so there are some functional changes here. Try to go for a
reasonable middle ground between the i915 and xe implementations:
- the exponential backoff limit is the simpler approach taken
  by i915 (== just clamp the max sleep duration to 1 ms)
- the fast vs. slow timeout handling is similar to i915 where
  we first try the fast timeout and then again the slow timeout
  if the condition still isn't satisfied. xe just adds up the
  timeouts together, which is a bit weird.
- the atomic wait variant uses udelay() like xe, whereas i915
  has no udelay()s in its atomic loop. As a compromise go for a
  fixed 1 usec delay  for short waits, instead of the somewhat
  peculiar xe behaviour where it effectively just does one
  iteration of the loop.
- keep the "use udelay() for < 10 usec waits" logic (which
  more or less mirrors fsleep()), but include an explicit
  might_sleep() even for these short waits when called from
  a non-atomic intel_de_wait*() function. This should prevent
  people from calling the non-atomic functions from the wrong
  place.

Eventually we may want to switch over to poll_timeout*(),
but that lacks the exponential backoff, so a bit too
radical to change in one go.

v2: Initialize ret in intel_de_wait_for_register() to avoid a
    warning from the compiler. This is actually a false positive
    since we always have fast_timeout_us!=0 when slow_timeout_us!=0,
    but the compiler can't see that

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patch.msgid.link/20260323094304.8171-1-ville.syrjala@linux.intel.com