<html>
- <head>
- <meta http-equiv="content-type" content="text/html;charset=iso-8859-1">
- <meta name="generator" content="HTML Tidy, see www.w3.org">
- <title>PPS Clock Discipline</title>
- <link href="scripts/style.css" type="text/css" rel="stylesheet">
- </head>
-
- <body>
- <h3>PPS Clock Discipline</h3>
- <hr>
- <h4>Synopsis</h4>
- <p>Address: 127.127.22.<i>u</i><br>
- Reference ID: <tt>PPS</tt><br>
- Driver ID: <tt>PPS</tt><br>
- Serial or Parallel Port: <tt>/dev/pps<i>u</i></tt><br>
- Requires: PPSAPI interface</p>
- <p>Note: This driver supersedes an older one of the same name. The older driver operated with several somewhat archaic signal interface devices, required intricate configuration and was poorly documented. This driver operates only with the PPSAPI interface proposed as an IETF standard. Note also that the <tt>pps</tt> configuration command has been obsoleted by this driver.</p>
- <h4>Description</h4>
- <p>This driver furnishes an interface for the pulse-per-second (PPS) signal produced by a cesium clock, radio clock or related devices. It can be used to augment the serial timecode generated by a GPS receiver, for example. It can be used to remove accumulated jitter and re-time a secondary server when synchronized to a primary server over a congested, wide-area network and before redistributing the time to local clients. The driver includes extensive signal sanity checks and grooming algorithms. A range gate and frequency discriminator reject noise and signals with incorrect frequency. A multiple-stage median filter rejects jitter due to hardware interrupt and operating system latencies. A trimmed-mean algorithm determines the best time samples. With typical workstations and processing loads, the incidental jitter can be reduced to a few microseconds.</p>
- <p>While this driver can discipline the time and frequency relative to the PPS source, it cannot number the seconds. For this purpose an auxiliary source is required, ordinarily a radio clock operated as a primary reference (stratum 1) source; however, another NTP time server can be used as well. For this purpose, the auxiliary source should be specified as the prefer peer, as described in the <a href="../prefer.html">Mitigation Rules and the <tt>prefer</tt> Keyword</a> page.</p>
+<head>
+<meta http-equiv="content-type" content="text/html;charset=iso-8859-1">
+<meta name="generator" content="HTML Tidy, see www.w3.org">
+<title>PPS Clock Discipline</title>
+<link href="scripts/style.css" type="text/css" rel="stylesheet">
+</head>
+
+<body>
+
+<h3>PPS Clock Discipline</h3>
+<hr>
+
+<p>Last change:
+
+<!-- #BeginDate format:En2m -->22-Apr-2009 15:02<!-- #EndDate -->
+UTC</p>
+
+<h4>Synopsis</h4>
+
+<p>Address: 127.127.22.<i>u</i><br>
+Reference ID: <tt>PPS</tt><br>
+Driver ID: <tt>PPS</tt><br>
+Serial or Parallel Port: <tt>/dev/pps<i>u</i></tt><br>
+Requires: PPSAPI signal interface for PPS signal processing.</p>
+
+<p>Note: This driver supersedes an older one of the same name. The older driver operated with several somewhat archaic signal interface devices, required intricate configuration and was poorly documented. This driver requires the Pulse per Second API (PPSAPI)<sup>1</sup>. Note also that the <tt>pps</tt> configuration command has been obsoleted by this driver.</p>
+
+<h4>Description</h4>
+
+<p>This driver furnishes an interface for the pulse-per-second (PPS) signal produced by a cesium clock, radio clock or related devices. It can be used to augment the serial timecode generated by a GPS receiver, for example. It can be used to remove accumulated jitter and re-time a secondary server when synchronized to a primary server over a congested, wide-area network and before redistributing the time to local clients. The driver includes extensive signal sanity checks and grooming algorithms. A range gate and frequency discriminator reject noise and signals with incorrect frequency. A multiple-stage median filter rejects jitter due to hardware interrupt and operating system latencies. A trimmed-mean algorithm determines the best time samples. With typical workstations and processing loads, the incidental jitter can be reduced to a few microseconds.</p>
+
+<p>While this driver can discipline the time and frequency relative to the PPS source, it cannot number the seconds. For this purpose an auxiliary source is required, ordinarily a radio clock operated as a primary reference (stratum 1) source; however, another NTP time server can be used as well. For this purpose, the auxiliary source should be specified as the prefer peer, as described in the <a href="../prefer.html">Mitigation Rules and the <tt>prefer</tt> Keyword</a> page.</p>
<p>The driver requires the PPSAPI interface<sup>1</sup>, which is a proposed IETF standard. The interface consists of the <tt>timepps.h</tt> header file and associated kernel support. Support for this interface is included in current versions of Solaris, FreeBSD and Linux and proprietary versions of Tru64 (Alpha) and SunOS. See the <a href="../pps.html">Pulse-per-second (PPS) Signal Interfacing</a> page for further information.</p>
<p>The PPS source can be connected via a serial or parallel port, depending on the hardware and operating system. A serial port can be dedicated to the PPS source or shared with another device; however, if dedicated the data leads should not be connected, as noise or unexpected signals can cause <tt>ntpd</tt> to exit.</p>
- <p>A radio clock is usually connected via a serial port and the PPS source connected via a level converter to the data carrier detect (DCD) pin (DB-9 pin 1, DB-25 pin 8) of the same connector. In some systems where a parallel port and driver are available, the PPS signal can be connected directly to the ACK pin (pin 10) of the connector. Whether the PPS signal is connected via a dedicated port or shared with another device, the driver opens the device <tt>/dev/pps%d</tt>, where <tt>%d</tt> is the unit number. As with other drivers, links can be used to redirect the logical name to the actual physical device.</p>
- <p>The driver normally operates like any other driver and uses the same mitigation algorithms and PLL/FLL clock discipline incorporated in the daemon. If kernel PLL/FLL support is available, the kernel PLL/FLL clock discipline can be used instead. The default behavior is not to use the kernel PPS clock discipline, even if present. This driver incorporates a good deal of signal processing to reduce jitter using the median filter and trimmed average algorithms in the driver interface. As the result, performance with minpoll and maxpoll configured at the minimum 4 (16s) is generally better than the kernel PPS discipline. However, fudge flag 3 can be used to enable the kernel PPS discipline if necessary.</p>
- <p>Note that the PPS source is considered valid only if the auxiliary source is the prefer peer, is reachable and is selectable to discipline the system clock. By default the stratum assigned to the PPS source is automatically determined. If the auxiliary source is unreachable or inoperative, the stratum is set to 16. Otherwise it is set to the stratum specified by the <tt>fudge stratum</tt> command, if present, or the auxiliary source stratum if not present. Please note the temptation to masquerade as a primary server by forcing the stratum to zero is decidedly dangerous, as it invites timing loops.</p>
- <p>The <tt>mode</tt> keyword of the <tt>server</tt> command can be used to set the PPSAPI mode bits which determine the capture edge and echo options. See the <tt>/usr/include/sys/timepps.h</tt> header file for the bit definitions, which must be converted to their decimal equivalents. This overrides the fudge <tt>flag2</tt> option.</p>
- <h4>Fudge Factors</h4>
+ <p>A radio clock is usually connected via a serial port and the PPS source
+ connected via a level converter to the data carrier detect (DCD)
+ pin (DB-9 pin 1, DB-25 pin 8) of the same connector. In some systems
+ where a parallel port and driver are available, the PPS signal can
+ be connected directly to the ACK pin (DB25 pin 10) of the connector.
+ Whether the PPS signal is connected via a dedicated port or shared with another
+ device, the driver opens the device <tt>/dev/pps%d</tt>,
+ where <tt>%d</tt> is the unit number. As with other drivers, links can be
+ used to redirect the logical name to the actual physical device.</p>
+ <p>The driver normally operates like any other driver and uses the same mitigation
+ algorithms and PLL/FLL clock discipline incorporated in the daemon.
+ If kernel PLL/FLL support is available, the kernel PLL/FLL clock
+ discipline can be used instead. The default behavior is not to use
+ the kernel PPS clock discipline, even if present. This driver incorporates
+ a good deal of signal processing to reduce jitter using the median
+ filter algorithm in the driver. As the result, performance
+ with <tt>minpoll</tt> configured at 4 (16s) is generally
+ better than the kernel PPS discipline. However, fudge flag 3 can
+ be used to enable the kernel PPS discipline if necessary.</p>
+ <p>This driver
+ is enabled only under one of two conditions (a) a prefer peer other than
+ this driver is among the survivors of the mitigation algorithms or (b)
+ there are no survivors and the <tt>minsane</tt> option
+ of the <tt>tos</tt> command is 0. The prefer peer designates another source
+ that can reliably number the seconds when available . However, if no
+ sources are available, the system clock continues to be disciplined by
+ the PPS driver on an indefinite basis.</p>
+ <p>A scenario where the latter behavior can be most useful is a planetary orbiter
+ fleet, for instance in the vicinity of Mars, where contact between orbiters
+ and Earth only one or two times per Sol (Mars day). These orbiters have a
+ precise timing reference based on an Ultra Stable Oscillator (USO) with accuracy
+ in the order of a Cesium oscillator. A PPS signal is derived from the USO
+ and can be disciplined from Earth on rare occasion or from another orbiter
+ via NTP. In the above scenario the PPS signal disciplines the spacecraft clock
+ between NTP updates.</p>
+ <p>In a similar scenario a PPS signal can be used to discipline the clock between
+ updates produced by the modem driver. This would provide precise synchronization
+ without needing the Internet at all.</p>
+ <h4>Fudge Factors</h4>
<dl>
<dt><tt>time1 <i>time</i></tt>
<dd>Specifies the time offset calibration factor, in seconds and fraction, with default 0.0.
<dt><tt>flag1 0 | 1</tt>
<dd>Not used by this driver.
<dt><tt>flag2 0 | 1</tt>
- <dd>Specifies the PPS signal on-time edge: 0 for assert (default), 1 for clear.
+ <dd>Specifies PPS capture on the rising (assert) pulse edge if 0; falling
+ (clear) edge if 1. (default),
+ 1 for clear.
<dt><tt>flag3 0 | 1</tt>
<dd>Controls the kernel PPS discipline: 0 for disable (default), 1 for enable.
<dt><tt>flag4 0 | 1</tt>
- <dd>Not used by this driver.
+ <dd>Record a timestamp once for each second if 1. Useful for constructing
+ Allan deviation plots..
</dl>
<h4>Additional Information</h4>
<p><a href="../refclock.html">Reference Clock Drivers</a></p>
<html>
- <head>
- <meta http-equiv="content-type" content="text/html;charset=iso-8859-1">
- <title> WWVB/GPS Receivers</title>
- <link href="scripts/style.css" type="text/css" rel="stylesheet">
- </head>
-
- <body>
- <h3>WWVB/GPS Receivers</h3>
- <hr>
- <h4>Synopsis</h4>
- Address: 127.127.4.<i>u</i><br>
- Reference ID: <tt>WWVB</tt><br>
- Driver ID: <tt>WWVB_SPEC</tt><br>
- Serial Port: <tt>/dev/wwvb<i>u</i></tt>; 9600 baud, 8-bits, no parity<br>
- Features: <tt>tty_clk</tt>
- <h4>Description</h4>
- <p>This driver supports all known Spectracom radio and satellite clocks, including the Model 8170 and Netclock/2 WWVB Synchronized Clocks and the Netclock/GPS GPS Master Clock. The claimed accuracy of the WWVB clocks is 100 usec relative to the broadcast signal. These clocks have proven a reliable source of time, except in some parts of the country with high levels of conducted RF interference. WIth the GPS clock the claimed accuracy is 130 ns. However, in most cases the actual accuracy is limited by the precision of the timecode and the latencies of the serial interface and operating system.</p>
- <p>The DIPswitches on these clocks should be set to 24-hour display, AUTO DST off, data format 0 or 2 (see below) and baud rate 9600. If this clock is used as the source for the IRIG Audio Decoder (<tt>refclock_irig.c</tt> in this distribution), set the DIPswitches for AM IRIG output and IRIG format 1 (IRIG B with signature control).</p>
- <p>There are two timecode formats used by these clocks. Format 0, which is available with all clocks, and format 2, which is available with all clocks except the original (unmodified) Model 8170.</p>
- <p>Format 0 (22 ASCII printing characters):<br>
- <cr><lf>i ddd hh:mm:ss TZ=zz<cr><lf></p>
- <p>on-time = first <cr><br>
- i = synchronization flag (' ' = in synch, '?' = out synch)<br>
- hh:mm:ss = hours, minutes, seconds</p>
- <p>The alarm condition is indicated by other than ' ' at <tt>i</tt>, which occurs during initial synchronization and when received signal is lost for about ten hours.</p>
- <p>Format 2 (24 ASCII printing characters):<br>
- lt;cr>lf>iqyy ddd hh:mm:ss.fff ld</p>
- <p>on-time = <cr><br>
- i = synchronization flag (' ' = in synch, '?' = out synch)<br>
- q = quality indicator (' ' = locked, 'A'...'D' = unlocked)<br>
- yy = year (as broadcast)<br>
- ddd = day of year<br>
- hh:mm:ss.fff = hours, minutes, seconds, milliseconds</p>
- <p>The alarm condition is indicated by other than ' ' at <tt>i</tt>, which occurs during initial synchronization and when received signal is lost for about ten hours. The unlock condition is indicated by other than ' ' at <tt>q</tt>.</p>
- <p>The <tt>q</tt> is normally ' ' when the time error is less than 1 ms and a character in the set <tt>A...D</tt> when the time error is less than 10, 100, 500 and greater than 500 ms respectively. The <tt>l</tt> is normally ' ', but is set to <tt>L</tt> early in the month of an upcoming UTC leap second and reset to ' ' on the first day of the following month. The <tt>d</tt> is set to <tt>S</tt> for standard time <tt>S</tt>, <tt>I</tt> on the day preceding a switch to daylight time, <tt>D</tt> for daylight time and <tt>O</tt> on the day preceding a switch to standard time. The start bit of the first <cr> is synchronized to the indicated time as returned.</p>
- <p>This driver does not need to be told which format is in use - it figures out which one from the length of the message. A three-stage median filter is used to reduce jitter and provide a dispersion measure. The driver makes no attempt to correct for the intrinsic jitter of the radio itself, which is a known problem with the older radios.</p>
- <h4>Monitor Data</h4>
- <p>The driver writes each timecode as received to the <tt>clockstats</tt> file. When enabled by the <tt>flag4</tt> fudge flag, a table of quality data maintained internally by the Netclock/2 is retrieved and written to the <tt>clockstats</tt> file when the first timecode message of a new dayis received.</p>
- <h4>Fudge Factors</h4>
- <dl>
- <dt><tt>time1 <i>time</i></tt>
- <dd>Specifies the time offset calibration factor, in seconds and fraction, with default 0.0.
- <dt><tt>time2 <i>time</i></tt>
- <dd>Not used by this driver.
- <dt><tt>stratum <i>number</i></tt>
- <dd>Specifies the driver stratum, in decimal from 0 to 15, with default 0.
- <dt><tt>refid <i>string</i></tt>
- <dd>Specifies the driver reference identifier, an ASCII string from one to four characters, with default <tt>WWVB</tt>.
- <dt><tt>flag1 0 | 1</tt>
- <dd>Not used by this driver.
- <dt><tt>flag2 0 | 1</tt>
- <dd>Not used by this driver.
- <dt><tt>flag3 0 | 1</tt>
- <dd>Not used by this driver.
- <dt><tt>flag4 0 | 1</tt>
- <dd>Enable verbose <tt>clockstats</tt> recording if set.
- </dl>
- <hr>
- <script type="text/javascript" language="javascript" src="scripts/footer.txt"></script>
- </body>
+<head>
+<meta http-equiv="content-type" content="text/html;charset=iso-8859-1">
+<title>Spectracom WWVB/GPS Receivers</title>
+<link href="scripts/style.css" type="text/css" rel="stylesheet">
+<style type="text/css">
+<!--
+.style1 {font-family: Symbol}
+-->
+</style>
+</head>
+
+<body>
+
+<h3>Spectracom WWVB/GPS Receivers</h3>
+
+<hr>
+Last update:
+
+<!-- #BeginDate format:En2m -->22-Apr-2009 15:00<!-- #EndDate -->
+UTC</p>
+
+<h4>Synopsis</h4>
+
+<p>Address: 127.127.4.<i>u</i><br>
+Reference ID: <tt>WWVB</tt><br>
+Driver ID: <tt>WWVB_SPEC</tt><br>
+Serial Port: <tt>/dev/wwvb<i>u</i></tt>; 9600 baud, 8-bits, no parity<br>
+Features: Optional PPS signal processing, <tt>tty_clk</tt><br>
+Requires: Optional PPS signal processing requires the PPSAPI signal interface.</p>
+
+<h4>Description</h4>
+
+<p>This driver supports all known Spectracom radio and satellite clocks, including the Model 8170 and Netclock/2 WWVB Synchronized Clocks and the Netclock/GPS GPS Master Clock. The claimed accuracy of the WWVB clocks is 100 <span class="style1">m</span>s relative to the broadcast signal. These clocks have proven a reliable source of time, except in some parts of the country with high levels of conducted RF interference. WIth the GPS clock the claimed accuracy is 130 ns. However, in most cases the actual accuracy is limited by the precision of the timecode and the latencies of the serial interface and operating system.</p>
+
+<p>The DIPswitches on these clocks should be set to 24-hour display, AUTO DST off, data format 0 or 2 (see below) and baud rate 9600. If this clock is used as the source for the IRIG Audio Decoder (<tt>refclock_irig.c</tt> in this distribution), set the DIPswitches for AM IRIG output and IRIG format 1 (IRIG B with signature control).</p>
+
+<p>There are two timecode formats used by these clocks. Format 0, which is available with all clocks, and format 2, which is available with all clocks except the original (unmodified) Model 8170.</p>
+
+<p>Format 0 (22 ASCII printing characters):<br>
+<cr><lf>i ddd hh:mm:ss TZ=zz<cr><lf></p>
+
+<p>on-time = first <cr><br>
+i = synchronization flag (' ' = in synch, '?' = out synch)<br>
+hh:mm:ss = hours, minutes, seconds</p>
+
+<p>The alarm condition is indicated by other than ' ' at <tt>i</tt>, which occurs during initial synchronization and when received signal is lost for about ten hours.</p>
+
+<p>Format 2 (24 ASCII printing characters):<br>
+lt;cr>lf>iqyy ddd hh:mm:ss.fff ld</p>
+
+<p>on-time = <cr><br>
+i = synchronization flag (' ' = in synch, '?' = out synch)<br>
+q = quality indicator (' ' = locked, 'A'...'D' = unlocked)<br>
+yy = year (as broadcast)<br>
+ddd = day of year<br>
+hh:mm:ss.fff = hours, minutes, seconds, milliseconds</p>
+
+<p>The alarm condition is indicated by other than ' ' at <tt>i</tt>, which occurs during initial synchronization and when received signal is lost for about ten hours. The unlock condition is indicated by other than ' ' at <tt>q</tt>.</p>
+
+<p>The <tt>q</tt> is normally ' ' when the time error is less than 1 ms and a character in the set <tt>A...D</tt> when the time error is less than 10, 100, 500 and greater than 500 ms respectively. The <tt>l</tt> is normally ' ', but is set to <tt>L</tt> early in the month of an upcoming UTC leap second and reset to ' ' on the first day of the following month. The <tt>d</tt> is set to <tt>S</tt> for standard time <tt>S</tt>, <tt>I</tt> on the day preceding a switch to daylight time, <tt>D</tt> for daylight time and <tt>O</tt> on the day preceding a switch to standard time. The start bit of the first <cr> is synchronized to the indicated time as returned.</p>
+
+<p>This driver does not need to be told which format is in use - it figures out which one from the length of the message. A three-stage median filter is used to reduce jitter and provide a dispersion measure. The driver makes no attempt to correct for the intrinsic jitter of the radio itself, which is a known problem with the older radios.</p>
+
+<h4<PPS Signal Processing</h4>
+
+<p>When PPS signal processing is enabled, and when the system clock has been set by this or another driver and the PPS signal offset is within 0.4 s of the system clock offset, the PPS signal replaces the timecode for as long as the PPS signal is active. If for some reason the PPS signal fails for one or more poll intervals, the driver reverts to the timecode. If the timecode fails for one or more poll intervals, the PPS signal is disconnected.</p>
+
+<h4>Monitor Data</h4>
+
+<p>The driver writes each timecode as received to the <tt>clockstats</tt> file. When enabled by the <tt>flag4</tt> fudge flag, a table of quality data maintained internally by the Netclock/2 is retrieved and written to the <tt>clockstats</tt> file when the first timecode message of a new day is received.</p>
+
+<h4>Fudge Factors</h4>
+
+<dl>
+<dt><tt>time1 <i>time</i></tt>
+<dd>Specifies the time offset calibration factor, in seconds and fraction, with default 0.0.
+
+<dt><tt>time2 <i>time</i></tt>
+<dd>Not used by this driver.
+
+<dt><tt>stratum <i>number</i></tt>
+<dd>Specifies the driver stratum, in decimal from 0 to 15, with default 0.
+
+<dt><tt>refid <i>string</i></tt>
+<dd>Specifies the driver reference identifier, an ASCII string from one to four characters, with default <tt>WWVB</tt>.
+
+<dt><tt>flag1 0 | 1</tt>
+<dd>Disable PPS signal processing if 0 (default); enable PPS signal processing if 1.
+
+<dt><tt>flag2 0 | 1</tt>
+<dd>If PPS signal processing is enabled, capture the pulse on the rising edge if 0 (default); capture on the falling edge if 1.
+
+<dt><tt>flag3 0 | 1</tt>
+<dd>If PPS signal processing is enabled, use the <tt>ntpd</tt> clock discipline if 0 (default); use the kernel discipline if 1.
+
+<dt><tt>flag4 0 | 1</tt>
+<dd>Enable verbose <tt>clockstats</tt> recording if set.
+
+</dl>
+
+<hr>
+<script type="text/javascript" language="javascript" src="scripts/footer.txt"></script>
+</body>
</html>
\ No newline at end of file
projects / thirdparty / ntp.git / commitdiff
