zynq-afx-nand.dtb \
zynq-afx-nor.dtb \
zynq-afx-qspi.dtb \
- zynq-cse-nand.dtb \
- zynq-cse-nor.dtb \
- zynq-cse-qspi.dtb \
zynq-picozed.dtb \
zynq-zc770-xm010.dtb \
zynq-zc770-xm011.dtb \
+++ /dev/null
-/*
- * Xilinx CSE NAND board DTS
- *
- * Copyright (C) 2015 Xilinx, Inc.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-/dts-v1/;
-#include "zynq-7000.dtsi"
-
-/ {
- model = "Zynq CSE NAND Board";
- compatible = "xlnx,zynq-cse-nand", "xlnx,zynq-7000";
-};
+++ /dev/null
-/*
- * Xilinx CSE NOR board DTS
- *
- * Copyright (C) 2015 Xilinx, Inc.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-/dts-v1/;
-#include "zynq-7000.dtsi"
-
-/ {
- model = "Zynq CSE NOR Board";
- compatible = "xlnx,zynq-cse-nor", "xlnx,zynq-7000";
-};
+++ /dev/null
-/*
- * Xilinx CSE QSPI board DTS
- *
- * Copyright (C) 2015 Xilinx, Inc.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-/dts-v1/;
-
-/ {
- #address-cells = <1>;
- #size-cells = <1>;
- model = "Zynq CSE QSPI Board";
- compatible = "xlnx,zynq-cse-qspi", "xlnx,zynq-7000";
-
- aliases {
- spi0 = &qspi;
- serial0 = &uart1;
- };
-
- memory@fffc0000 {
- device_type = "memory";
- reg = <0xFFFC0000 0x40000>;
- };
-
- amba: amba {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- interrupt-parent = <&intc>;
- ranges;
-
- intc: interrupt-controller@f8f01000 {
- compatible = "arm,cortex-a9-gic";
- #interrupt-cells = <3>;
- interrupt-controller;
- reg = <0xF8F01000 0x1000>,
- <0xF8F00100 0x100>;
- };
-
- qspi: spi@e000d000 {
- clock-names = "ref_clk", "pclk";
- clocks = <&clkc 10>, <&clkc 43>;
- compatible = "xlnx,zynq-qspi-1.0";
- status = "okay";
- interrupt-parent = <&intc>;
- interrupts = <0 19 4>;
- reg = <0xe000d000 0x1000>;
- #address-cells = <1>;
- #size-cells = <0>;
- is-dual = <0>;
- num-cs = <1>;
- flash@0 {
- compatible = "n25q128a11";
- reg = <0x0>;
- spi-tx-bus-width = <1>;
- spi-rx-bus-width = <4>;
- spi-max-frequency = <50000000>;
- #address-cells = <1>;
- #size-cells = <1>;
- partition@qspi-fsbl-uboot {
- label = "qspi-fsbl-uboot";
- reg = <0x0 0x100000>;
- };
- partition@qspi-linux {
- label = "qspi-linux";
- reg = <0x100000 0x500000>;
- };
- partition@qspi-device-tree {
- label = "qspi-device-tree";
- reg = <0x600000 0x20000>;
- };
- partition@qspi-rootfs {
- label = "qspi-rootfs";
- reg = <0x620000 0x5E0000>;
- };
- partition@qspi-bitstream {
- label = "qspi-bitstream";
- reg = <0xC00000 0x400000>;
- };
- };
- };
-
- uart1: serial@e0001000 {
- compatible = "xlnx,xuartps", "cdns,uart-r1p8";
- status = "okay";
- clocks = <&clkc 24>, <&clkc 41>;
- clock-names = "uart_clk", "pclk";
- reg = <0xE0001000 0x1000>;
- interrupts = <0 50 4>;
- };
-
- slcr: slcr@f8000000 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "xlnx,zynq-slcr", "syscon", "simple-bus";
- reg = <0xF8000000 0x1000>;
- ranges;
- clkc: clkc@100 {
- #clock-cells = <1>;
- compatible = "xlnx,ps7-clkc";
- fclk-enable = <0xf>;
- clock-output-names = "armpll", "ddrpll", "iopll", "cpu_6or4x",
- "cpu_3or2x", "cpu_2x", "cpu_1x", "ddr2x", "ddr3x",
- "dci", "lqspi", "smc", "pcap", "gem0", "gem1",
- "fclk0", "fclk1", "fclk2", "fclk3", "can0", "can1",
- "sdio0", "sdio1", "uart0", "uart1", "spi0", "spi1",
- "dma", "usb0_aper", "usb1_aper", "gem0_aper",
- "gem1_aper", "sdio0_aper", "sdio1_aper",
- "spi0_aper", "spi1_aper", "can0_aper", "can1_aper",
- "i2c0_aper", "i2c1_aper", "uart0_aper", "uart1_aper",
- "gpio_aper", "lqspi_aper", "smc_aper", "swdt",
- "dbg_trc", "dbg_apb";
- reg = <0x100 0x100>;
- };
- };
- };
-};
+++ /dev/null
-CONFIG_ARM=y
-CONFIG_SYS_CONFIG_NAME="zynq_cse"
-CONFIG_ARCH_ZYNQ=y
-CONFIG_DEFAULT_DEVICE_TREE="zynq-cse-nand"
-CONFIG_SYS_EXTRA_OPTIONS="CSE_NAND"
-CONFIG_SYS_PROMPT="Zynq> "
-# CONFIG_CMD_BOOTD is not set
-# CONFIG_CMD_BOOTM is not set
-# CONFIG_CMD_GO is not set
-CONFIG_OF_EMBED=y
-# CONFIG_EFI_LOADER is not set
+++ /dev/null
-CONFIG_ARM=y
-CONFIG_SYS_CONFIG_NAME="zynq_cse"
-CONFIG_ARCH_ZYNQ=y
-CONFIG_DEFAULT_DEVICE_TREE="zynq-cse-nor"
-CONFIG_SYS_EXTRA_OPTIONS="CSE_NOR"
-CONFIG_SYS_PROMPT="Zynq> "
-# CONFIG_CMD_BOOTD is not set
-# CONFIG_CMD_BOOTM is not set
-# CONFIG_CMD_GO is not set
-CONFIG_OF_EMBED=y
-# CONFIG_EFI_LOADER is not set
+++ /dev/null
-CONFIG_ARM=y
-CONFIG_SYS_CONFIG_NAME="zynq_cse"
-CONFIG_ARCH_ZYNQ=y
-CONFIG_DEFAULT_DEVICE_TREE="zynq-cse-qspi"
-CONFIG_SYS_EXTRA_OPTIONS="CSE_QSPI"
-CONFIG_SYS_PROMPT="Zynq> "
-# CONFIG_CMD_BDI is not set
-# CONFIG_CMD_CONSOLE is not set
-# CONFIG_CMD_BOOTD is not set
-# CONFIG_CMD_BOOTM is not set
-# CONFIG_CMD_GO is not set
-# CONFIG_CMD_RUN is not set
-# CONFIG_CMD_IMI is not set
-# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_XIMG is not set
-# CONFIG_CMD_EXPORTENV is not set
-# CONFIG_CMD_IMPORTENV is not set
-# CONFIG_CMD_EDITENV is not set
-# CONFIG_CMD_SAVEENV is not set
-# CONFIG_CMD_ENV_EXISTS is not set
-# CONFIG_CMD_CRC32 is not set
-# CONFIG_CMD_DM is not set
-# CONFIG_CMD_LOADB is not set
-# CONFIG_CMD_LOADS is not set
-# CONFIG_CMD_FLASH is not set
-# CONFIG_CMD_FPGA is not set
-# CONFIG_CMD_ECHO is not set
-# CONFIG_CMD_ITEST is not set
-# CONFIG_CMD_SOURCE is not set
-# CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
-# CONFIG_CMD_MISC is not set
-CONFIG_OF_EMBED=y
-CONFIG_SPI_FLASH=y
-CONFIG_SPI_FLASH_BAR=y
-CONFIG_SPI_FLASH_ISSI=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_SPANSION=y
-CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_ZYNQ_QSPI=y
-# CONFIG_EFI_LOADER is not set
sizeof(CONFIG_SYS_PROMPT) + 16)
/* Physical Memory map */
-#if defined(CONFIG_CSE_QSPI) || defined(CONFIG_CSE_NOR)
-# define CONFIG_SYS_TEXT_BASE 0xFFFC0000
-#elif defined(CONFIG_CSE_NAND)
-# define CONFIG_SYS_TEXT_BASE 0x00100000
-#elif defined(CONFIG_ZYNQ_OCM)
+#if defined(CONFIG_ZYNQ_OCM)
# define CONFIG_SYS_TEXT_BASE 0xFFFC0000
#else
# define CONFIG_SYS_TEXT_BASE 0x4000000
+++ /dev/null
-/*
- * (C) Copyright 2013 Xilinx.
- *
- * Configuration settings for the Xilinx Zynq CSE board.
- * See zynq-common.h for Zynq common configs
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef __CONFIG_ZYNQ_CSE_H
-#define __CONFIG_ZYNQ_CSE_H
-
-#define CONFIG_SYS_NO_FLASH
-#define CONFIG_ZYNQ_DCC
-#define _CONFIG_CMD_DEFAULT_H
-#define CONFIG_SKIP_LOWLEVEL_INIT
-#define CONFIG_ENV_IS_NOWHERE
-#define CONFIG_SYS_DCACHE_OFF
-#define CONFIG_SYS_ICACHE_OFF
-#define CONFIG_FIT_DISABLE_SHA256
-
-#if defined(CONFIG_CSE_NAND)
-# define CONFIG_NAND_ZYNQ
-
-#elif defined(CONFIG_CSE_NOR)
-#undef CONFIG_SYS_NO_FLASH
-
-#endif
-
-#include <configs/zynq-common.h>
-
-/* Undef unneeded configs */
-#undef CONFIG_SYS_SDRAM_BASE
-#undef CONFIG_EXTRA_ENV_SETTINGS
-#undef CONFIG_BOARD_LATE_INIT
-#undef CONFIG_FPGA
-#undef CONFIG_FPGA_XILINX
-#undef CONFIG_FPGA_ZYNQPL
-#undef CONFIG_CMD_FPGA
-#undef CONFIG_FIT
-#undef CONFIG_FIT_VERBOSE
-#undef CONFIG_CMD_BOOTZ
-#undef CONFIG_BOOTCOMMAND
-#undef CONFIG_SYS_HUSH_PARSER
-#undef CONFIG_SYS_PROMPT_HUSH_PS2
-#undef CONFIG_BOOTDELAY
-#undef CONFIG_SYS_MALLOC_LEN
-#undef CONFIG_ENV_SIZE
-#undef CONFIG_CMDLINE_EDITING
-#undef CONFIG_AUTO_COMPLETE
-#undef CONFIG_ZLIB
-#undef CONFIG_GZIP
-#undef CONFIG_CMD_SPL
-#undef CONFIG_SYS_LONGHELP
-#undef CONFIG_PARTITIONS
-#undef CONFIG_CMD_FPGA_LOADMK
-#undef CONFIG_CMD_FPGA_LOADP
-#undef CONFIG_CMD_FPGA_LOADBP
-#undef CONFIG_CMD_FPGA_LOADFS
-#undef CONFIG_CMD_GPIO
-#undef CONFIG_ZYNQ_GPIO
-#undef CONFIG_CMD_SPI
-#undef CONFIG_CMD_CLK
-#undef CONFIG_CMD_CACHE
-#undef CONFIG_SYS_CBSIZE
-
-/* Define needed configs */
-#define CONFIG_BOOTDELAY -1 /* -1 to Disable autoboot */
-#define CONFIG_SYS_MALLOC_LEN 0x1000
-#define CONFIG_SYS_CBSIZE 1024
-
-#if defined(CONFIG_CSE_QSPI)
-# define CONFIG_SYS_SDRAM_SIZE (256 * 1024)
-# define CONFIG_SYS_SDRAM_BASE 0xFFFC0000
-# define CONFIG_ENV_SIZE 400
-
-#elif defined(CONFIG_CSE_NAND)
-# define CONFIG_SYS_SDRAM_SIZE (4 * 1024 * 1024)
-# define CONFIG_SYS_SDRAM_BASE 0
-# define CONFIG_ENV_SIZE 0x10000
-
-#elif defined(CONFIG_CSE_NOR)
-# define CONFIG_SYS_SDRAM_SIZE (256 * 1024)
-# define CONFIG_SYS_SDRAM_BASE 0xFFFD0000
-# define CONFIG_ENV_SIZE 1400
-
-#endif
-
-#endif /* __CONFIG_ZYNQ_CSE_H */
projects / thirdparty / u-boot.git / commitdiff
