cxl: Add a cached copy of target_map to cxl_decoder

Add a cached copy of the hardware port-id list that is available at init
before all @dport objects have been instantiated. Change is in preparation
of delayed dport instantiation.

Reviewed-by: Robert Richter <rrichter@amd.com>
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
Tested-by: Robert Richter <rrichter@amd.com>
Reviewed-by: Alison Schofield <alison.schofield@intel.com>
Signed-off-by: Dave Jiang <dave.jiang@intel.com>

diff --git a/drivers/cxl/acpi.c b/drivers/cxl/acpi.c
index 712624cba2b6e020f38b924681c77e2d1472a96c..bb0871d92620631fb58bc41456a51a5d1dc58b39 100644 (file)
--- a/drivers/cxl/acpi.c
+++ b/drivers/cxl/acpi.c
@@ -398,7 +398,6 @@ DEFINE_FREE(del_cxl_resource, struct resource *, if (_T) del_cxl_resource(_T))
 static int __cxl_parse_cfmws(struct acpi_cedt_cfmws *cfmws,
                             struct cxl_cfmws_context *ctx)
 {
-       int target_map[CXL_DECODER_MAX_INTERLEAVE];
        struct cxl_port *root_port = ctx->root_port;
        struct cxl_cxims_context cxims_ctx;
        struct device *dev = ctx->dev;
@@ -416,8 +415,6 @@ static int __cxl_parse_cfmws(struct acpi_cedt_cfmws *cfmws,
        rc = eig_to_granularity(cfmws->granularity, &ig);
        if (rc)
                return rc;
-       for (i = 0; i < ways; i++)
-               target_map[i] = cfmws->interleave_targets[i];
 
        struct resource *res __free(del_cxl_resource) = alloc_cxl_resource(
                cfmws->base_hpa, cfmws->window_size, ctx->id++);
@@ -443,6 +440,8 @@ static int __cxl_parse_cfmws(struct acpi_cedt_cfmws *cfmws,
                .end = cfmws->base_hpa + cfmws->window_size - 1,
        };
        cxld->interleave_ways = ways;
+       for (i = 0; i < ways; i++)
+               cxld->target_map[i] = cfmws->interleave_targets[i];
        /*
         * Minimize the x1 granularity to advertise support for any
         * valid region granularity
@@ -475,7 +474,7 @@ static int __cxl_parse_cfmws(struct acpi_cedt_cfmws *cfmws,
        if (cfmws->interleave_arithmetic == ACPI_CEDT_CFMWS_ARITHMETIC_XOR)
                cxlrd->hpa_to_spa = cxl_xor_hpa_to_spa;
 
-       rc = cxl_decoder_add(cxld, target_map);
+       rc = cxl_decoder_add(cxld);
        if (rc)
                return rc;
 

diff --git a/drivers/cxl/core/hdm.c b/drivers/cxl/core/hdm.c
index e9e1d555cec65c46222d74674b144fce5b8baa1d..cee68bbc7ff6f548eebcfb1708174ab1f3edf909 100644 (file)
--- a/drivers/cxl/core/hdm.c
+++ b/drivers/cxl/core/hdm.c
@@ -21,12 +21,11 @@ struct cxl_rwsem cxl_rwsem = {
        .dpa = __RWSEM_INITIALIZER(cxl_rwsem.dpa),
 };
 
-static int add_hdm_decoder(struct cxl_port *port, struct cxl_decoder *cxld,
-                          int *target_map)
+static int add_hdm_decoder(struct cxl_port *port, struct cxl_decoder *cxld)
 {
        int rc;
 
-       rc = cxl_decoder_add_locked(cxld, target_map);
+       rc = cxl_decoder_add_locked(cxld);
        if (rc) {
                put_device(&cxld->dev);
                dev_err(&port->dev, "Failed to add decoder\n");
@@ -54,7 +53,6 @@ int devm_cxl_add_passthrough_decoder(struct cxl_port *port)
 {
        struct cxl_switch_decoder *cxlsd;
        struct cxl_dport *dport = NULL;
-       int single_port_map[1];
        unsigned long index;
        struct cxl_hdm *cxlhdm = dev_get_drvdata(&port->dev);
 
@@ -73,9 +71,9 @@ int devm_cxl_add_passthrough_decoder(struct cxl_port *port)
 
        xa_for_each(&port->dports, index, dport)
                break;
-       single_port_map[0] = dport->port_id;
+       cxlsd->cxld.target_map[0] = dport->port_id;
 
-       return add_hdm_decoder(port, &cxlsd->cxld, single_port_map);
+       return add_hdm_decoder(port, &cxlsd->cxld);
 }
 EXPORT_SYMBOL_NS_GPL(devm_cxl_add_passthrough_decoder, "CXL");
 
@@ -984,7 +982,7 @@ static int cxl_setup_hdm_decoder_from_dvsec(
 }
 
 static int init_hdm_decoder(struct cxl_port *port, struct cxl_decoder *cxld,
-                           int *target_map, void __iomem *hdm, int which,
+                           void __iomem *hdm, int which,
                            u64 *dpa_base, struct cxl_endpoint_dvsec_info *info)
 {
        struct cxl_endpoint_decoder *cxled = NULL;
@@ -1103,7 +1101,7 @@ static int init_hdm_decoder(struct cxl_port *port, struct cxl_decoder *cxld,
                hi = readl(hdm + CXL_HDM_DECODER0_TL_HIGH(which));
                target_list.value = (hi << 32) + lo;
                for (i = 0; i < cxld->interleave_ways; i++)
-                       target_map[i] = target_list.target_id[i];
+                       cxld->target_map[i] = target_list.target_id[i];
 
                return 0;
        }
@@ -1179,7 +1177,6 @@ int devm_cxl_enumerate_decoders(struct cxl_hdm *cxlhdm,
        cxl_settle_decoders(cxlhdm);
 
        for (i = 0; i < cxlhdm->decoder_count; i++) {
-               int target_map[CXL_DECODER_MAX_INTERLEAVE] = { 0 };
                int rc, target_count = cxlhdm->target_count;
                struct cxl_decoder *cxld;
 
@@ -1207,8 +1204,7 @@ int devm_cxl_enumerate_decoders(struct cxl_hdm *cxlhdm,
                        cxld = &cxlsd->cxld;
                }
 
-               rc = init_hdm_decoder(port, cxld, target_map, hdm, i,
-                                     &dpa_base, info);
+               rc = init_hdm_decoder(port, cxld, hdm, i, &dpa_base, info);
                if (rc) {
                        dev_warn(&port->dev,
                                 "Failed to initialize decoder%d.%d\n",
@@ -1216,7 +1212,7 @@ int devm_cxl_enumerate_decoders(struct cxl_hdm *cxlhdm,
                        put_device(&cxld->dev);
                        return rc;
                }
-               rc = add_hdm_decoder(port, cxld, target_map);
+               rc = add_hdm_decoder(port, cxld);
                if (rc) {
                        dev_warn(&port->dev,
                                 "Failed to add decoder%d.%d\n", port->id, i);

diff --git a/drivers/cxl/core/port.c b/drivers/cxl/core/port.c
index 88f19abf33273abcc789ca13d6e29633a15e0e17..7344048f678eb9162a19e69a8c5bfd3721daa0d3 100644 (file)
--- a/drivers/cxl/core/port.c
+++ b/drivers/cxl/core/port.c
@@ -1715,13 +1715,11 @@ struct cxl_port *cxl_mem_find_port(struct cxl_memdev *cxlmd,
 EXPORT_SYMBOL_NS_GPL(cxl_mem_find_port, "CXL");
 
 static int decoder_populate_targets(struct cxl_switch_decoder *cxlsd,
-                                   struct cxl_port *port, int *target_map)
+                                   struct cxl_port *port)
 {
+       struct cxl_decoder *cxld = &cxlsd->cxld;
        int i;
 
-       if (!target_map)
-               return 0;
-
        device_lock_assert(&port->dev);
 
        if (xa_empty(&port->dports))
@@ -1729,7 +1727,7 @@ static int decoder_populate_targets(struct cxl_switch_decoder *cxlsd,
 
        guard(rwsem_write)(&cxl_rwsem.region);
        for (i = 0; i < cxlsd->cxld.interleave_ways; i++) {
-               struct cxl_dport *dport = find_dport(port, target_map[i]);
+               struct cxl_dport *dport = find_dport(port, cxld->target_map[i]);
 
                if (!dport)
                        return -ENXIO;
@@ -1921,9 +1919,6 @@ EXPORT_SYMBOL_NS_GPL(cxl_endpoint_decoder_alloc, "CXL");
 /**
  * cxl_decoder_add_locked - Add a decoder with targets
  * @cxld: The cxl decoder allocated by cxl_<type>_decoder_alloc()
- * @target_map: A list of downstream ports that this decoder can direct memory
- *              traffic to. These numbers should correspond with the port number
- *              in the PCIe Link Capabilities structure.
  *
  * Certain types of decoders may not have any targets. The main example of this
  * is an endpoint device. A more awkward example is a hostbridge whose root
@@ -1937,7 +1932,7 @@ EXPORT_SYMBOL_NS_GPL(cxl_endpoint_decoder_alloc, "CXL");
  * Return: Negative error code if the decoder wasn't properly configured; else
  *        returns 0.
  */
-int cxl_decoder_add_locked(struct cxl_decoder *cxld, int *target_map)
+int cxl_decoder_add_locked(struct cxl_decoder *cxld)
 {
        struct cxl_port *port;
        struct device *dev;
@@ -1958,7 +1953,7 @@ int cxl_decoder_add_locked(struct cxl_decoder *cxld, int *target_map)
        if (!is_endpoint_decoder(dev)) {
                struct cxl_switch_decoder *cxlsd = to_cxl_switch_decoder(dev);
 
-               rc = decoder_populate_targets(cxlsd, port, target_map);
+               rc = decoder_populate_targets(cxlsd, port);
                if (rc && (cxld->flags & CXL_DECODER_F_ENABLE)) {
                        dev_err(&port->dev,
                                "Failed to populate active decoder targets\n");
@@ -1977,9 +1972,6 @@ EXPORT_SYMBOL_NS_GPL(cxl_decoder_add_locked, "CXL");
 /**
  * cxl_decoder_add - Add a decoder with targets
  * @cxld: The cxl decoder allocated by cxl_<type>_decoder_alloc()
- * @target_map: A list of downstream ports that this decoder can direct memory
- *              traffic to. These numbers should correspond with the port number
- *              in the PCIe Link Capabilities structure.
  *
  * This is the unlocked variant of cxl_decoder_add_locked().
  * See cxl_decoder_add_locked().
@@ -1987,7 +1979,7 @@ EXPORT_SYMBOL_NS_GPL(cxl_decoder_add_locked, "CXL");
  * Context: Process context. Takes and releases the device lock of the port that
  *         owns the @cxld.
  */
-int cxl_decoder_add(struct cxl_decoder *cxld, int *target_map)
+int cxl_decoder_add(struct cxl_decoder *cxld)
 {
        struct cxl_port *port;
 
@@ -2000,7 +1992,7 @@ int cxl_decoder_add(struct cxl_decoder *cxld, int *target_map)
        port = to_cxl_port(cxld->dev.parent);
 
        guard(device)(&port->dev);
-       return cxl_decoder_add_locked(cxld, target_map);
+       return cxl_decoder_add_locked(cxld);
 }
 EXPORT_SYMBOL_NS_GPL(cxl_decoder_add, "CXL");
 

diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c
index 71cc42d052481ad5d57ca1c870dfb1da96726fc1..bba62867df904d17854d8631dcd517dd85193ca2 100644 (file)
--- a/drivers/cxl/core/region.c
+++ b/drivers/cxl/core/region.c
@@ -1510,8 +1510,10 @@ add_target:
                                cxl_rr->nr_targets_set);
                        return -ENXIO;
                }
-       } else
+       } else {
                cxlsd->target[cxl_rr->nr_targets_set] = ep->dport;
+               cxlsd->cxld.target_map[cxl_rr->nr_targets_set] = ep->dport->port_id;
+       }
        inc = 1;
 out_target_set:
        cxl_rr->nr_targets_set += inc;

diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h
index 847e37be42c472647dabbd46c68b6a1badf85cd1..4b858f3d44c62acee66010e6cc2b47b801da84ea 100644 (file)
--- a/drivers/cxl/cxl.h
+++ b/drivers/cxl/cxl.h
@@ -357,6 +357,9 @@ enum cxl_decoder_type {
  * @target_type: accelerator vs expander (type2 vs type3) selector
  * @region: currently assigned region for this decoder
  * @flags: memory type capabilities and locking
+ * @target_map: cached copy of hardware port-id list, available at init
+ *              before all @dport objects have been instantiated. While
+ *              dport id is 8bit, CFMWS interleave targets are 32bits.
  * @commit: device/decoder-type specific callback to commit settings to hw
  * @reset: device/decoder-type specific callback to reset hw settings
 */
@@ -369,6 +372,7 @@ struct cxl_decoder {
        enum cxl_decoder_type target_type;
        struct cxl_region *region;
        unsigned long flags;
+       u32 target_map[CXL_DECODER_MAX_INTERLEAVE];
        int (*commit)(struct cxl_decoder *cxld);
        void (*reset)(struct cxl_decoder *cxld);
 };
@@ -781,9 +785,9 @@ struct cxl_root_decoder *cxl_root_decoder_alloc(struct cxl_port *port,
                                                unsigned int nr_targets);
 struct cxl_switch_decoder *cxl_switch_decoder_alloc(struct cxl_port *port,
                                                    unsigned int nr_targets);
-int cxl_decoder_add(struct cxl_decoder *cxld, int *target_map);
+int cxl_decoder_add(struct cxl_decoder *cxld);
 struct cxl_endpoint_decoder *cxl_endpoint_decoder_alloc(struct cxl_port *port);
-int cxl_decoder_add_locked(struct cxl_decoder *cxld, int *target_map);
+int cxl_decoder_add_locked(struct cxl_decoder *cxld);
 int cxl_decoder_autoremove(struct device *host, struct cxl_decoder *cxld);
 static inline int cxl_root_decoder_autoremove(struct device *host,
                                              struct cxl_root_decoder *cxlrd)

diff --git a/tools/testing/cxl/test/cxl.c b/tools/testing/cxl/test/cxl.c
index 6a25cca5636f75eb130327ce800b4fd69ad60c39..8faf4143d04ef036ed10a61b2f945eabbcc3b2e0 100644 (file)
--- a/tools/testing/cxl/test/cxl.c
+++ b/tools/testing/cxl/test/cxl.c
@@ -651,7 +651,7 @@ static int mock_cxl_add_passthrough_decoder(struct cxl_port *port)
 
 
 struct target_map_ctx {
-       int *target_map;
+       u32 *target_map;
        int index;
        int target_count;
 };
@@ -863,9 +863,7 @@ static int mock_cxl_enumerate_decoders(struct cxl_hdm *cxlhdm,
                target_count = NR_CXL_SWITCH_PORTS;
 
        for (i = 0; i < NR_CXL_PORT_DECODERS; i++) {
-               int target_map[CXL_DECODER_MAX_INTERLEAVE] = { 0 };
                struct target_map_ctx ctx = {
-                       .target_map = target_map,
                        .target_count = target_count,
                };
                struct cxl_decoder *cxld;
@@ -894,6 +892,8 @@ static int mock_cxl_enumerate_decoders(struct cxl_hdm *cxlhdm,
                        cxld = &cxled->cxld;
                }
 
+               ctx.target_map = cxld->target_map;
+
                mock_init_hdm_decoder(cxld);
 
                if (target_count) {
@@ -905,7 +905,7 @@ static int mock_cxl_enumerate_decoders(struct cxl_hdm *cxlhdm,
                        }
                }
 
-               rc = cxl_decoder_add_locked(cxld, target_map);
+               rc = cxl_decoder_add_locked(cxld);
                if (rc) {
                        put_device(&cxld->dev);
                        dev_err(&port->dev, "Failed to add decoder\n");